Target specification
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
March 2011 Doc ID 018508 Rev 1 1/22
1
ST2329I
2-bit dual-supply level translator with auto-direction feature
and integrated pull-up
Features
■18 Mbps (max.) data rate when driven by
a totem pole driver
■6.8 Mbps (max.) data rate when driven by
an open drain pole driver
■Bidirectional level translation, without direction
pin
■Wide VL voltage range of 1.65 V to 3.6 V
■Wide VCC voltage range of 1.80 V to 5.5 V
■Integrated 10 kΩ pull-up on both VCC and VL
sides
■Power-down mode feature; when either supply
is off, all I/Os are in high impedance
■Low quiescent current (max. 4 µA)
■Able to be driven by totem pole and open drain
drivers
■5.5 V tolerant enable pin
■ESD performance on all pins: ±2 kV HBM
■Small package and footprint - QFN10
(1.8 x 1.4 mm) package
Applications
■Low voltage system level translation
■Mobile phones and other mobile devices
■I2C level translation
■UART level translation
Table 1. Device summary
Order code Package Packing
ST2329IQTR QFN10
(1.8 x 1.4 mm)
Tape and reel
(3000 parts per reel)
QFN10 (1.8 x 1.4 mm)
www.st.com
Contents ST2329I
2/22 Doc ID 018508 Rev 1
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Supplementary notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.1 Driver requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.2 Load driving capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.3 Power-off feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 AC characteristics (device driven by open drain driver) . . . . . . . . . . . . . . 11
2.3 AC characteristics (device driven by totem pole driver) . . . . . . . . . . . . . . 13
3 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
ST2329I List of tables
Doc ID 018508 Rev 1 3/22
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. DC characteristics (over recommended operating conditions unless otherwise noted.
All typical values are at TA = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. For test conditions: VL = 1.65 to 1.8 V (load CL = 15 pF; Rup = 4.7 kΩ;
driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 8. For test conditions: VL = 2.5 to 2.7 V (load CL = 15 pF; Rup = 4.7 kΩ;
driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. For test conditions: VL = 2.7 to 3.6 V (load CL = 15 pF; Rup = 4.7 kΩ;
driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 10. For test conditions: VL = 1.65 to 1.8 V (load CL = 15 pF; Rup = 10 kΩ;
driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 11. For test conditions: VL = 2.5 to 2.7 V (load CL = 15 pF; Rup = 10 kΩ;
driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 12. For test conditions: VL = 2.7 to 3.6 V (load CL = 15 pF; Rup = 10 kΩ;
driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 13. Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. Waveform symbol value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 15. Mechanical data for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . 17
Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
List of figures ST2329I
4/22 Doc ID 018508 Rev 1
List of figures
Figure 1. Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 5. Waveform - propagation delay (f = 1 MHz, 50% duty cycle). . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 6. Waveform - output enable/disable (f = 1 MHz, 50% duty cycle) . . . . . . . . . . . . . . . . . . . . . 15
Figure 7. Package outline for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . 16
Figure 8. Footprint recommendation for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . 17
Figure 9. Carrier tape for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . . . . 18
Figure 10. Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch - back view . . . . . . . . . 19
Figure 11. Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch - front view. . . . . . . . . . 20
ST2329I Description
Doc ID 018508 Rev 1 5/22
1 Description
ST2329I is a 2-bit dual-supply level translator which provides the level shifting capability to
allow data transfer in a multi-voltage system. Externally applied voltages, VCC and VL, set
the logic levels on either side of the device. It utilizes a transmission gate based design that
allows bidirectional level translation without a control pin.
The ST2329I accepts VL from 1.65 V to 3.6 V and VCC from 1.80 V to 5.5 V, making it ideal
for data transfer between low-voltage ASICs/PLD and higher voltage systems. This device
has a tri-state output mode which can be used to disable all the I/Os.
The ST2329I supports power-down mode when VCC is grounded/floating and the device is
disabled via the OE pin. The device has integrated 10 kΩ pull-ups on both sides.
Pin configuration ST2329I
6/22 Doc ID 018508 Rev 1
2 Pin configuration
Figure 1. Pin configuration
Figure 2. Device block diagram
1. ST2329I has 2 channels. For simplicity, the diagram above shows only 1 channel.
2. When OE is LOW, all I/Os are in high impedance mode.
Table 2. Pin description
QFN10 pin no Symbol Name and function
1, 2 I/OVL1 to I/OVL2 Data inputs/outputs
8, 7 I/OVCC1 to I/OVCC2 Data inputs/outputs
3 OE Output enable input
6 GND Ground
10 VLSupply voltage
9V
CC Supply voltage
4, 5 NC No connect
1&.,TOPTHROUGHVIEW
!-
6##
ST2329I Pin configuration
Doc ID 018508 Rev 1 7/22
Figure 3. Typical application diagram
1. External pull-up resistors are optional. Only needed if a pull-up value lower than 10 kΩ is desired.
2.1 Supplementary notes
2.1.1 Driver requirements
The ST2329I may be driven by an open drain or totem pole driver and the nature of the
device output is “open drain”. It must not be used to drive a pull-down resistor as the
impedance of the output at HIGH state depends on the pull-up resistor placed at the I/Os.
As the device has pull-up resistors on both I/OVCC and I/OVL ports, the user needs to ensure
that the driver is able to sink the required amount of current. For example, if the settings are
VCC = 5.5 V, VL = 4.3 V, and the pull-up resistor is 10 kΩ, then the driver must be able to sink
at least (5.5 V / 10 kΩ) + (4.3 V / 10 kΩ) ≈
1 mA and still meet VIL requirements of ST2329I.
2.1.2 Load driving capability
To support the open drain system, the one-shot transistor is turned on only during high
transition at the output side. When it drives a high state, after the one-shot transistor turned
off, only the pull-up resistor is able to maintain the state. In this case, the resistive load is not
recommended.
2.1.3 Power-off feature
In some applications where it might be required to turn off one of the power supplies
powering up the level translator, the user may turn OFF the VCC only when the OE pin is low
(device is disabled). There is no current consumption in VL due to floating gates or other
causes, and the I/Os are in a high impedance state in this mode.
6,6##
/%
)/6, )/6##
)/6, )/6##
6,
SYSTEM
CONTROLLER
6##
SYSTEM
CONTROLLER
6##6##
6,
6,
6,6##
!-
Pin configuration ST2329I
8/22 Doc ID 018508 Rev 1
Table 3. Truth table
Enable Bidirectional input/output
OE I/OVCC I/OVL
H(1)
1. High level VL power supply referred.
H(2)
2. High level VCC power supply referred.
H(1)
H(1) LL
LZ
(3)
3. Z = high impedance.
Z
Table 4. Absolute maximum ratings
Symbol Parameter Value Unit
VLSupply voltage –0.3 to 4.6 V
VCC Supply voltage –0.3 to 6.5 V
VOE DC control input voltage –0.3 to 6.5 V
VI/OVL DC I/OVL input voltage (OE = GND or VL)–0.3 to V
L + 0.3 V
VI/OVCC DC I/OVCC input voltage (OE = GND or VL) –0.3 to VCC + 0.3 V
IIK DC input diode current –20 mA
II/OVL DC output current ±25 mA
II/OVCC DC output current ±258 mA
ISCTOUT Short-circuit duration, continuous 40 mA
PDPower dissipation(1)
1. 500 mW: 65 °C derated to 300 mW by 10 mW/°C: 65 °C to 85 °C.
500 mW
TSTG Storage temperature –65 to 150 °C
TL Lead temperature (10 seconds) 300 °C
ESD Electrostatic discharge protection (HBM) ±2 KV
Table 5. Recommended operating conditions
Symbol Parameter Min. Typ. Max. Unit
VLSupply voltage 1.65 3.6 V
VCC(1)
1. VCC must be greater than VL.
Supply voltage 1.8 5.5 V
VOE
Input voltage (OE output enable pin, VL power
supply referred) 03.6V
VI/OVL I/OVL voltage 0 VLV
VI/OVCC I/OVCC voltage 0 VCC V
TOP Operating temperature –40 85 °C
dt/dV Input rise and fall time 0 1 ns/V
ST2329I Pin configuration
Doc ID 018508 Rev 1 9/22
Table 6. DC characteristics (over recommended operating conditions unless otherwise noted.
All typical values are at TA = 25 °C)
Symbol Parameter
Test conditions Value
Unit
VLVCC
TA = 25 °C –40 to 85 °C
Min. Typ. Max. Min. Max.
VIHL
High level input
voltage on VL side
(I/OVL)
1.65
VL to 5.5 —
1.4 1.4
V
2.0 1.6 1.6
2.5 2.0 2.0
3.0 2.4 2.4
3.6 2.8 2.8
VILL
Low level input
voltage on VL side
(I/OVL)
1.65
VL to 5.5 —
0.3 0.3
V
2.0 0.4 0.4
2.5 0.5 0.5
3.0 0.6 0.6
3.6 0.8 0.8
VIHC
High level input
voltage on VCC
side (I/OVCC)
1.65 to
VCC
1.65
—
1.4 1.6
V
2.0 1.6 2.3
2.5 2.3 2.7
3.0 2.7 3.3
3.6 3.3 3.5
5.5 4.2 4.2
VILC
Low level input
voltage on VCC
side (I/OVCC)
1.65 to
VCC
1.65
—
0.3
V
2.0 0.3
2.5 0.3
3.0 0.5
3.6 0.5
5.5 0.5
VIH-OE
High level input
voltage (OE)
1.65
VL to 5.5 —
1.0 1.0 V
2.0 1.2 1.2
2.5 1.4 1.4
3.0 1.6 1.6
3.6 2.0 2.0
Pin configuration ST2329I
10/22 Doc ID 018508 Rev 1
VIL-OE
Low level input
voltage (OE)
1.65
VL to 5.5 —
0.33 0.33 V
2.0 0.40 0.40
2.5 0.50 0.50
3.0 0.60 0.60
3.6 0.75 0.75
VOLL
Low level output
voltage (I/OVL)1.65 to 3.6 VL to 5.5 IO=1.0 mA
I/OVCC
≤
0.15 V 0.40 0.40 V
VOLC
Low level output
voltage (I/OVCC)1.65 to 3.6 VL to 5.5 IO=1.0 mA
I/OVL
≤
0.15 V 0.40 0.40 V
IOE
Control input
leakage current
(OE)
1.65 to 3.6 VL to 5.5 VOE = GND or VL±0.1 ±0.1 µA
IIO_LKG
High impedance
leakage current
(I/OVL, I/OVCC)
1.65 to 3.6 VL to 5.5 OE = GND ±0.1 ±0.1 µA
IQVCC
Quiescent supply
current VCC
1.65 to 3.6 VL to 5.5
Only pull-up
resistor
connected to I/O
33.5 6 µA
IQVL
Quiescent supply
current VL
1.65 to 3.6 VL to 5.5
Only pull-up
resistor
connected to I/O
0.01 0.1 1 µA
IZ-VCC
High impedance
quiescent supply
current VCC
1.65 to 3.6 VL to 5.5
OE = GND; only
pull-up resistor
connected to I/O
33.5 6 µA
IZ-VL
High impedance
quiescent supply
current VL
1.65 to 3.6 VL to 5.5
OE = GND; only
pull-up resistor
connected to I/O
0.01 0.1 1 µA
Table 6. DC characteristics (over recommended operating conditions unless otherwise noted.
All typical values are at TA = 25 °C) (continued)
Symbol Parameter
Test conditions Value
Unit
VLVCC
TA = 25 °C –40 to 85 °C
Min. Typ. Max. Min. Max.
ST2329I Pin configuration
Doc ID 018508 Rev 1 11/22
2.2 AC characteristics (device driven by open drain driver)
Table 7. For test conditions: VL = 1.65 to 1.8 V (load CL = 15 pF; Rup = 4.7 kΩ;
driver tr = tf
≤
2 ns) overtemperature range –40 °C to 85 °C
Symbol Parameter
VCC = 1.8 - 2.5 V VCC = 2.7 - 3.6 V VCC = 4.3 - 5.5 V
Unit
Min. Max. Min. Max. Min. Max.
tRVCC Rise time I/OVCC 80 60 45 ns
tFVCC Fall time I/OVCC 23.2 33.9 53.3 ns
tRVL Rise time I/OVL 60 45 35 ns
tFVL Fall time I/OVL 16.4 17.6 16.9 ns
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPLH 3.4 2 ns
tPLH 13.9 19.1 30.2 ns
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPLH 222.6ns
tPLH 8.6 9 9.5 ns
tPZL tPZH
tPLZ tPHZ
Output enable and disable time En 10 10 10 ns
Dis 40 40 40 ns
DRData rate(1) 1.8 2.2 3.4 MHz
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%.
Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an
effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor.
Table 8. For test conditions: VL = 2.5 to 2.7 V (load CL = 15 pF; Rup = 4.7 kΩ;
driver tr = tf
≤
2 ns) overtemperature range –40 °C to 85 °C
Symbol Parameter
VCC = 2.7 - 3.6 V VCC = 4.3 - 5.5 V
Unit
Min. Max. Min. Max.
tRVCC Rise time I/OVCC 70 50 ns
tFVCC Fall time I/OVVCC 14.8 19.1 ns
tRVL Rise time I/OVL 50 35 ns
tFVL Fall time I/OVL 9.8 10 ns
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPLH 22ns
tPLH 8.2 11.6 ns
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPLH 22ns
tPLH 5.3 5.9 ns
tPZL tPZH
tPLZ tPHZ
Output enable and disable time En 6 6 ns
Dis 40 40 ns
DRData rate(1) 2.2 3.0 MHz
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%.
Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an
effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor.
Pin configuration ST2329I
12/22 Doc ID 018508 Rev 1
Table 9. For test conditions: VL = 2.7 to 3.6 V (load CL = 15 pF; Rup = 4.7 kΩ;
driver tr = tf
≤
2 ns) overtemperature range –40 °C to 85 °C
Symbol Parameter
VCC = 4.3 - 5.5 V
Unit
Min. Max.
tRVCC Rise time I/OVCC 55 ns
tFVCC Fall time I/OVCC 17.2 ns
tRVL Rise time I/OVL 40 ns
tFVL Fall time I/OVL 9.7 ns
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPLH 2ns
tPLH 10.6 ns
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPLH 2ns
tPLH 4.8 ns
tPZL tPZH
tPLZ tPHZ
Output enable and disable time
En 6 ns
Dis 40 ns
DR Data rate(1)
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15%
of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle
deviation is not less than 30%.
Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up
resistor, an effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor.
3.0 MHz
ST2329I Pin configuration
Doc ID 018508 Rev 1 13/22
2.3 AC characteristics (device driven by totem pole driver)
Table 10. For test conditions: VL = 1.65 to 1.8 V (load CL = 15 pF; Rup = 10 kΩ;
driver tr = tf
≤
2 ns) overtemperature range –40 °C to 85 °C
Symbol Parameter
VCC = 1.8 - 2.5 V VCC = 2.7 - 3.6 V VCC = 4.3 - 5.5 V
Unit
Min. Max. Min. Max. Min. Max.
tRVCC Rise time I/OVCC 7.2 4.6 1.4 ns
tFVCC Fall time I/OVCC 23.2 33.9 53.3 ns
tRVL Rise time I/OVL 5.9 5.7 5.5 ns
tFVL Fall time I/OVL 16.4 17.6 16.9 ns
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPLH 5.5 4.1 3.6 ns
tPLH 13.9 19.1 30.2 ns
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPLH 4.5 3.9 3.6 ns
tPLH 8.6 9.0 9.5 ns
tPZL tPZH
tPLZ tPHZ
Output enable and disable time En 10 10 10 ns
Dis 40 40 40 ns
DRData rate(1) 6.4 4.5 3.0 MHz
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%.
Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an
effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor.
Table 11. For test conditions: VL = 2.5 to 2.7 V (load CL = 15 pF; Rup = 10 kΩ;
driver tr = tf
≤
2 ns) overtemperature range –40 °C to 85 °C
Symbol Parameter
VCC = 2.7 - 3.6 V VCC= 4.3 - 5.5 V
Unit
Min. Max. Min. Max.
tRVCC Rise time I/OVCC 3.8 2.8 ns
tFVCC Fall time I/OVCC 14.8 19.1 ns
tRVL Rise time I/OVL 3.3 3.2 ns
tFVL Fall time I/OVL 9.8 10.0 ns
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPLH 3.2 2.8 ns
tPLH 8.2 11.6 ns
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPLH 2.6 2.0 ns
tPLH 5.3 5.9 ns
tPZL tPZH
tPLZ tPHZ
Output enable and disable time En 6 6 ns
Dis 40 40 ns
DR Data rate(1) 96.8MHz
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%.
Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an
effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor.
Pin configuration ST2329I
14/22 Doc ID 018508 Rev 1
Figure 4. Test circuit
Note: The pull-up resistors shown in the above test circuit are optional and are only needed if total
pull-up on either end of the level translator needs to be lower than 10 k
Ω
. In applications
where 10 k
Ω
is sufficient, the external pull-up resistor is not required.
Table 12. For test conditions: VL = 2.7 to 3.6 V (load CL = 15 pF; Rup = 10 kΩ;
driver tr = tf
≤
2 ns) overtemperature range –40 °C to 85 °C
Symbol Parameter
VCC = 4.3 - 5.5 V
Unit
Min. Max.
tRVCC Rise time I/OVCC 2.9 ns
tFVCC Fall time I/OVCC 17.2 ns
tRVL Rise time I/OVL 3.0 ns
tFVL Fall time I/OVL 9.7 ns
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPHL 2.7 ns
tPHL 10.6 ns
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPHL 1.9 ns
tPHL 4.8 ns
tPZL tPZH
tPLZ tPHZ
Output enable and disable time
En 6 ns
Dis 40 ns
DRData rate(1)
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15%
of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle
deviation is not less than 30%.
Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up
resistor, an effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor.
7.2 MHz
Table 13. Test circuit
Test
Switch
Driving I/OVL Driving I/OVCC Open drain driving
tPLH, tPHL Open Open Open
!-
0ULSE
GENERATOR
2UP 2UP
6,
6,
6,6##
6##
6##
#,
/PEN
'.$
$54
ST2329I Pin configuration
Doc ID 018508 Rev 1 15/22
Figure 5. Waveform - propagation delay (f = 1 MHz, 50% duty cycle)
Figure 6. Waveform - output enable/disable (f = 1 MHz, 50% duty cycle)
Table 14. Waveform symbol value
Symbol
Driving I/OVL Driving I/OVCC
1.8 V
≤
VL
≤
VCC
≤
2.5 V
3.3 V
≤
VL
≤
VCC
≤
5.0 V
1.8 V
≤
VL
≤
VCC
≤
2.5 V
3.3 V
≤
VL
≤
VCC
≤
5.0 V
VIH VLVLVCC VCC
VIM 50% VL 50% VL50% VCC 50% VCC
VOM 50% VCC 50% VCC 50% VCC 50% VCC
VXVOL +15 V VOL +0.3 V VOL +0.15 V VOL +0.3 V
VYVOH –15 V VOH –0.3 V VOH –0.15 V VOH –0.3 V
!-
NS NS
)/6,
)/6,
)/6##
)/6##
6)-
6/-
6)-
6/-
6)(
6/(
6/,
)/6##
'.$
T0,( T0,(
!-
NS NS
6)-
6)-
6)-
6)(
6/(
69
'.$
T0:( T0(:
'.$
/%
)NPUTHIGH
)NPUTLOW
6,OR6##
68
6/,
6)-
T0:, T0,:
Package information ST2329I
16/22 Doc ID 018508 Rev 1
3 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at www.st.com. ECOPACK
is an ST trademark.
Figure 7. Package outline for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Z8_ME
Bottom view
910
e/2
A3
b (10x)
L (10x)
6
8
e
3
2
1
Pin 1 ID
e
54
7
0.15
0.10
910
6
8
3
2
1
54
7E
E/2
Pin 1 ID
D
D/2
To p view
ST2329I Package information
Doc ID 018508 Rev 1 17/22
Figure 8. Footprint recommendation for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Table 15. Mechanical data for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Symbol
millimeters inches Note
Typ. Min. Max. Typ. Min. Max.
A 0.5 0.45 0.55 0.02 0.018 0.022
A1 0.02 0 0.05 0.001 0 0.002
A3 0.13 0.005
b 0.2 0.15 0.25 0.008 0.006 0.01
D 1.8 1.75 1.85 0.071 0.069 0.073
E 1.4 1.35 1.45 0.055 0.053 0.057
e0.4 0.016
L 0.4 0.35 0.45 0.016 0.014 0.018
!-
Package information ST2329I
18/22 Doc ID 018508 Rev 1
Figure 9. Carrier tape for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
2REF !
"
+
#/6%2
!
"
+
!-
ST2329I Package information
Doc ID 018508 Rev 1 19/22
Figure 10. Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch - back
view
!-
#,
%-"/33%$2)"3
2!)3%$MM
7)$4(MM
"!#+ 6)%7
"!#+ 6)%7
2
2
-!8
n
Package information ST2329I
20/22 Doc ID 018508 Rev 1
Figure 11. Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch - front
view
!-
8882%02%3%.433500,)%2g3
,/'//2.!-%/04)/.
4%84(%)'(4MM()'(8
MM7)$%%-"/33%$,%44%23
8
8
8
#,
3,/4
!0!24
0,!#%3
3%%$%4!),"
3%%$%4!),#
&2/.43)$%
-!8
n
03
03
2%&
2%&
2%&4%84(%)'(4
$%4!),# $%4!),"
-).
n
ST2329I Revision history
Doc ID 018508 Rev 1 21/22
4 Revision history
Table 16. Document revision history
Date Revision Changes
02-Mar-2011 1 Initial release.
ST2329I
22/22 Doc ID 018508 Rev 1
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