PD-93988A IRFE9120 REPETITIVE AVALANCHE AND dv/dt RATED (R) HEXFET TRANSISTORS SURFACE MOUNT (LCC-18) JANTX2N6845U JANTXV2N6845U REF:MIL-PRF-19500/563 100V, P-CHANNEL Product Summary Part Number IRFE9120 BVDSS -100V RDS(on) 0.60 ID -4.0A LCC-18 The leadless chip carrier (LCC) package represents the logical next step in the continual evolution of surface mount technology. Desinged to be a close replacement for the TO-39 package, the LCC will give designers the extra flexibility they need to increase circuit board density. International Rectifier has engineered the LCC package to meet the specific needs of the power market by increasing the size of the bottom source pad, thereby enhancing the thermal and electrical performance. The lid of the package is grounded to the source to reduce RF interference. Features: Surface Mount Small Footprint Alternative to TO-39 Package Hermetically Sealed Dynamic dv/dt Rating Avalanche Energy Rating Simple Drive Requirements Light Weight n ESD Rating: Class 1B per MIL-STD-750, Method 1020 n n n n n n n n Absolute Maximum Ratings Parameter ID @ VGS = -10V, TC = 25C ID @ VGS = -10V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction Storage Temperature Range Pckg. Mounting Surface Temp. Weight Units -4.0 -2.6 -16 20 0.16 20 364 -4.0 2.0 -5.0 -55 to 150 300 (for 5 S) 0.42 (typical) A W W/C V mJ A mJ V/ns C g For footnotes refer to the last page www.irf.com 1 10/30/15 IRFE9120 Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified) Parameter Min BVDSS Drain-to-Source Breakdown Voltage -100 BV DSS /T J Temperature Coefficient of Breakdown -- Voltage RDS(on) Static Drain-to-Source On-State -- Resistance -- VGS(th) Gate Threshold Voltage -2.0 g fs Forward Transconductance 1.25 IDSS Zero Gate Voltage Drain Current -- -- Typ Max Units -- -- V -0.10 -- V/C -- -- -- -- -- -- 0.60 0.69 -4.0 -- -25 -250 IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 6.1 -100 100 16.3 4.7 9.0 60 100 50 70 -- C iss C oss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance -- -- -- 380 170 45 -- -- -- Test Conditions VGS = 0V, ID = -1.0mA Reference to 25C, ID = -1.0mA nC VGS = -10V, ID = -2.6A VGS = -10V, ID = -4.0A VDS = VGS, ID = -250A VDS = -15V, IDS = -2.6A VDS = -80V, VGS = 0V VDS = -80V VGS = 0V, TJ = 125C VGS = -20V VGS = 20V VGS = -10V, ID = -4.0A VDS = -50V ns VDD = -50V, ID = -4.0A, VGS = -10V, RG = 7.5 V S A nA nH pF Measured from the center of drain pad to center of source pad VGS = 0V, VDS = -25V f = 1.0MHz Source-Drain Diode Ratings and Characteristics Parameter Min Typ Max Units IS ISM Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) -- -- -- -- -4.0 -16 A VSD t rr Q RR Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- -- -- -- -- -- -4.8 200 3.1 V nS c ton Forward Turn-On Time Test Conditions Tj = 25C, IS = -4.0A, VGS = 0V Tj = 25C, IF = -4.0A, di/dt -100A/s VDD -50V Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD. Thermal Resistance Parameter RthJC RthJ-PCB Junction to Case Junction to PC Board Min Typ Max Units -- -- -- -- 6.25 26 C/W Test Conditions Soldered to a copper clad PC board Note: Corresponding Spice and Saber models are available on International Rectifier Website. For footnotes refer to the last page 2 www.irf.com IRFE9120 Fig 1. Typical Output Characteristics Fig 3. Typical Transfer Characteristics www.irf.com Fig 2. Typical Output Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFE9120 13 a& a& bb 13 4 Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area www.irf.com IRFE9120 RD V DS VGS RG D.U.T. + V DD -10V Pulse Width 1 s Duty Factor 0.1 % Fig 10a. Switching Time Test Circuit td(on) tr t d(off) tf VGS 10% Fig 9. Maximum Drain Current Vs. Case Temperature 90% VDS Fig 10b. Switching Time Waveforms Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFE9120 L VDS D.U.T RG -20V 10V IAS VDD A DRIVER 0.01 tp 10V 15V Fig 12a. Unclamped Inductive Test Circuit EAS , Single Pulse Avalanche Energy (mJ) 1000 900 TOP 800 BOTTOM 700 ID -1.8A -2.5A -4.0A 600 500 400 300 200 100 0 I AS 25 50 75 100 125 150 Starting T J , Junction Temperature (C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current tp V(BR)DSS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. QG -10 V 50K 12V QGS .2F .3F QGD D.U.T. VG +VDS VGS -3mA Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform 6 Fig 13b. Gate Charge Test Circuit www.irf.com IRFE9120 Footnotes: Repetitive Rating; Pulse width limited by maximum junction temperature. VDD = -25V, starting TJ = 25C, Peak IL = -4.0A, L = 45.5mH, VGS = 10V ISD -4.0A, di/dt -110A/s, VDD -100V, TJ 150C Suggested RG = 7.5 Pulse width 300 s; Duty Cycle 2% Case Outline and Dimensions -- LCC-18 IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105 IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 10/2015 www.irf.com 7