HD74ALVC162834A
18-bit Universal Bus Driver with 3-state Outputs
and Inverted Latch Enable
ADE-205-293A (Z)
2nd. Edition
November 1999
Description
The HD74ALVC162834A is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation.
Data flow from A to Y is controlled by the output enable (OE). The device operates in the transparent mode
when the latch enable (LE) is low. When LE is low, the A data is latched if the clock (CLK) input is held
at a high or low logic level. If the LE is high, the A data is stored in the latch/flip flop on the low to high
transition of CLK. When OE is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a
pullup registor; the minimum value of the registor is determined by the current sinking capability of the
driver.
All outputs, which are designed to sink up to 12 mA, include series dumping resistors to reduce overshoot
and undershoot.
Features
• Supports PC133 and meets “PC SDRAM registered DIMM specification, Rev. 1.1”
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±12 mA (@VCC = 3.0 V)
• All outputs have series dumping resistors, so no external resistors are required
• tpd (CLK to Y) = 3.5 ns (Max) (@VCC = 3.3±0.3 V, CL = 50 pF, Ta = 0 to 85°C)
• tpd (CLK to Y) = 2.5 ns (Max) (@VCC = 3.3±0.3 V, CL = 30 pF, Ta = 0 to 85°C)
HD74ALVC162834A
2
Function Table
Inputs
OE LE CLK A Output Y
HXXXZ
LLXLL
LLXHH
LH↑LL
LH↑HH
L H L or H X Y0 *1
H : High level
L : Low level
X : Immaterial
Z : High impedance
↑ : Low to high transition
Note: 1. Output level before the indicated steady-state input conditions were established.
HD74ALVC162834A
3
Pin Arrangement
(Top view)
1
2
3
4
5
6
7
8
9
10
VCC
NC
NC
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y17
Y16
Y18
OE
LE
11
12
13
14
15
16
17
18
19
20
21
22
23
24 33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
GND
GND
GND
GND 25
26
27
28
A17
32 GND
31 A18
30 CLK
29 GND
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
GND
A6
A5
A4
A3
A2
A1
GND
NC
VCC
GND
VCC VCC
GND
HD74ALVC162834A
4
Absolute Maximum Ratings
Item Symbol Ratings Unit Conditions
Supply voltage range VCC –0.5 to 4.6 V
Input voltage range *1 VI–0.5 to 4.6 V
Output voltage range *1, 2VO–0.5 to VCC+0.5 V
Input clamp current IIK –50 mA VI < 0
Output clamp current IOK ±50 mA VO < 0 or VO > VCC
Continuous output current IO±50 mA VO = 0 to VCC
VCC, GND current / pin ICC or IGND ±100 mA
Maximum power dissipation
at Ta = 55°C (in still air) *3 PT1 W TSSOP
Storage temperature range Tstg –65 to 150 °C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the
device. These are stress ratings only, and functional operation of the device at these or any other conditions
beyond those indicated under “recommended operating condition” is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability.
Notes: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. The input and output positive-voltage ratings may be exceeded up to 4.6 V if the input and output
clamp-current ratings are observed.
3. The maximum power dissipation is calculated using a junction temperature of 150°C and board
trace length of 750 mils.
Recommended Operating Conditions
Item Symbol Min Max Unit Conditions
Supply voltage VCC 2.3 3.6 V
Input voltage VI0V
CC V
Output voltage VO0V
CC V
High-level output current IOH —–6mAV
CC = 2.3 V
—–8 V
CC = 2.7 V
— –12 VCC = 3.0 V
Low-level output current IOL — 6 mA VCC = 2.3 V
—8 V
CC = 2.7 V
—12 V
CC = 3.0 V
Input transition rise or fall rate ∆t/∆v 0 10 ns/V
Operating free-air temperature Ta –40 85 °C
Note: Unused or floating control pins must be held high or low.
HD74ALVC162834A
5
Logic Diagram
OE
LE
A1
27
30
28
54
3Y1
CLK
C1
1D
CLK
To seventeen other channels
HD74ALVC162834A
6
Electrical Characteristics
Ta = –40 to 85°C
Item Symbol VCC (V) Min Max Unit Test Conditions
Input voltage VIH 2.3 to 2.7 1.7 — V
2.7 to 3.6 2.0 —
VIL 2.3 to 2.7 — 0.7 V
2.7 to 3.6 — 0.8
Output voltage VOH 2.3 to 3.6 VCC–0.2 — V IOH = –100 µA
2.3 1.9 — IOH = –4 mA, VIH = 1.7 V
2.3 1.7 — IOH = –6 mA, VIH = 1.7 V
3.0 2.4 — IOH = –6 mA, VIH = 2.0 V
2.7 2.0 — IOH = –8 mA, VIH = 2.0 V
3.0 2.0 — IOH = –12 mA, VIH = 2.0 V
VOL 2.3 to 3.6 — 0.2 V IOL = 100 µA
2.3 — 0.4 IOL = 4 mA, VIL = 0.7 V
2.3 — 0.55 IOL = 6 mA, VIL = 0.7 V
3.0 — 0.55 IOL = 6 mA, VIL = 0.8 V
2.7 — 0.6 IOL = 8 mA, VIL = 0.8 V
3.0 — 0.8 IOL = 12 mA, VIL = 0.8 V
Input current IIN 3.6 — ±5.0 µAV
IN = VCC or GND
Off state output current IOZ 3.6 — ±10 µAV
OUT = VCC or GND
Quiescent supply current ICC 3.6 — 40 µAV
IN = VCC or GND
∆ICC 3.0 to 3.6 — 750 µA One input at (V
CC
–0.6)V,
other inputs at VCC or GND
HD74ALVC162834A
7
Switching Characteristics (Ta = –40 to 85°C)
Item Symbol VCC (V) Min Typ Max Unit From (Input) To (Output)
Maximum clock fmax 2.5±0.2 150 — — MHz
frequency 2.7 150 — —
3.3±0.3 150 — —
Propagation delay time tPLH 2.5±0.2 1.0 — 5.0 ns A Y
tPHL 2.7 — — 5.0
3.3±0.3 1.0 — 4.2
2.5±0.2 1.4 — 6.3 LE Y
2.7 — — 6.1
3.3±0.3 1.4 — 5.4
2.5±0.2 1.4 — 6.3 CLK Y
2.7 — — 6.1
3.3±0.3 1.4 — 5.4
Output enable time tZH 2.5±0.2 1.4 — 6.3 ns OE Y
tZL 2.7 — — 6.5
3.3±0.3 1.1 — 5.5
Output disable time tHZ 2.5±0.2 1.0 — 4.7 ns OE Y
tLZ 2.7 — — 4.9
3.3±0.3 1.3 — 4.5
Input capacitance CIN 3.3 3.3 4.0 4.5 pF Control inputs
3.3 3.0 6.0 9.0 Data inputs
Output capacitance CO3.3 3.0 7.0 9.0 pF Y ports
HD74ALVC162834A
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Switching Characteristics (Ta = –40 to 85°C) (cont)
Item Symbol VCC (V) Min Typ Max Unit From (Input)
Setup time tsu 2.5±0.2 2.2 — — ns Data before CLK↑
2.7 2.1 — —
3.3±0.3 1.7 — —
2.5±0.2 1.2 — — Data before LE↑
2.7 1.6 — — CLK “H”
3.3±0.3 1.3 — —
2.5±0.2 1.4 — — Data before LE↑
2.7 1.5 — — CLK “L”
3.3±0.3 1.2 — —
Hold time th2.5±0.2 0.6 — — ns Data after CLK↑
2.7 0.6 — —
3.3±0.3 0.7 — —
2.5±0.2 1.2 — — Data after LE↑
2.7 1.1 — — CLK “H” or “L”
3.3±0.3 1.1 — —
Pulse width tw2.5±0.2 3.3 — — ns LE “L”
2.7 3.3 — —
3.3±0.3 3.3 — —
2.5±0.2 3.3 — — CLK “H” or “L”
2.7 3.3 — —
3.3±0.3 3.3 — —
Switching Characteristics (Ta = 0 to 85°C)
Item Symbol VCC (V) Min Typ Max Unit FROM
(Input) TO
(Output)
Propagation delay time CL=50pF tPLH, tPHL 3.3±0.3 1.4 — 3.5 ns CLK Y
CL=30pF 3.3±0.3 0.7 — 2.5 CLK Y
Setup time tsu 3.3±0.3 1.0 — — ns Data before CLK↑
Hold time th3.3±0.3 0.6 — — ns Data after CLK↑
HD74ALVC162834A
9
Operating Characteristics (Ta = 25°C)
Item Symbol VCC = 2.5±0.2 V VCC = 3.3±0.3 V Unit Test Conditions
Typ Typ
Power dissipation Outputs enable Cpd 22.0 24.5 pF CL = 0, f = 10 MHz
capacitance Outputs disable 5.0 6.0
HD74ALVC162834A
10
Test Circuit
500 ΩCL
500 ΩS1
*1
See under table
GND
OPEN
Load Circuit for Outputs
Symbol
t / t
PLH PHL OPEN
GND
CC
2 × V 6.0 V
t / t
ZH HZ
t / t
ZL LZ
t / t / t
su h w
30 pF 50 pF
CL
OPEN
GND
Vcc=2.7V,
3.3±0.3V
Vcc=2.5±0.2V
Note: 1. CL includes probe and jig capacitance.
HD74ALVC162834A
11
Waveforms – 1
tPLH tPHL
VOH
VOL
GND
VIH
Vref Vref
Vref Vref
Input
Output
10 %
90 %
trf
t
10 %
90 %
Waveforms – 2
tsu th
tw
GND
VIH
GND
VIH
GND
VIH
Timing Input
Data Input
Input
10 %
90 %
tr
Vref
Vref Vref
Vref
Vref
HD74ALVC162834A
12
Waveforms – 3
Vref1
Vref2
tZL tLZ
tZH tHZ VOH
VOL
VCC
V +0.15 V
OL
V –0.15 V
OH
V +0.3 V
OL
V –0.3 V
OH
VCC
CC
Waveform - A
Output
Control
Waveform - B
GND
VIH
TEST
VIH
Vref
Vref1
Vref2
1/2 V 1.5 V
2.7 V
VOH1
VOL1
3.0 V
GND GND
Vcc=2.7V,
3.3±0.3V
Vcc=2.5±0.2V
10 % 10 %
90 % 90 %
tr
tf
Vref
Vref
Vref
Vref
≈VOH1
≈VOL1
Notes: 1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.0 ns, tf ≤ 2.0 ns. (VCC = 2.5±0.2 V)
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. (VCC = 2.7 V, 3.3±0.3 V)
2. Waveform – A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
HD74ALVC162834A
13
IV Characteristics for Register Output (Measured value)
0.0 0.5 1.0 1.5 2.0 2.5 3.0
-100
-80
-60
-40
-20
0
Weak condition HIGH
Vcc = 3.0 V, Ta = 85°C
V (V)
OH
I (mA)
OH
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
-150
-120
-90
-60
-30
0
Strong condition HIGH
Vcc = 3.6 V, Ta = 0°C
V (V)
OH
I (mA)
OH
HD74ALVC162834A
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0.0 0.5 1.0 1.5 2.0 2.5 3.0
0
20
40
60
80
100
120
Weak condition LOW
Vcc = 3.0 V, Ta = 85°C
V (V)
OL
I (mA)
OL
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
0
30
60
90
120
150
Strong condition LOW
Vcc = 3.6 V, Ta = 0°C
V (V)
OL
I (mA)
OL
HD74ALVC162834A
15
Package Dimensions
Unit : mm
Hitachi code
EIAJ code
JEDEC code
TTP-56D
—
—
0.08 M
0.10
0.20
0.15 ± 0.05
8.10 ± 0.3
0.40 Max
128
2956
+0.1
–0.05
+0.3
–0.1
14.00
+0.3
–0.1
6.10
1.20 max
10° Max
0.50
0.05 Min
0.50 ± 0.1
HD74ALVC162834A
16
Cautions
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intellectual property rights, in connection with use of the information contained in this document.
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received the latest product standards or specifications before final design, purchase or use.
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contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
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Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
Copyright © Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
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