Vishay Siliconix
Si1557DH
Document Number: 71944
S10-1054-Rev. C, 03-May-10
www.vishay.com
1
N- and P-Channel 1.8 V (G-S) MOSFET
FEATURES
Halogen-free According to IEC 61249-2-21
Definition
TrenchFET® Power MOSFETs
Thermally Enhanced SC-70 Package
Fast Switching to Minimize Gate and Switching
Losses
Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
Baseband dc-to-dc Converter Switch for Portable
Electronics
PRODUCT SUMMARY
VDS (V) RDS(on) (Ω)I
D (A)
N-Channel 12
0.235 at VGS = 4.5 V 1.3
0.280 at VGS = 2.5 V 1.2
0.340 at VGS = 1.8 V 1.0
P-Channel - 12
0.535 at VGS = - 4.5 V - 0.86
0.880 at VGS = - 2.5 V - 0.67
1.26 at VGS = - 1.8 V - 0.56
SOT-363
SC-70 (6-LEADS)
6
4
1
2
3
5
Top View
S1
G1
D2
D1
G2
S2
Marking Code
EC XX
Lot Traceability
and Date Code
Part # Code
YY
Ordering Information: Si1557DH-T1-E3 (Lead (Pb)-free)
Si1557DH-T1-GE3 (Lead (Pb)-free and Halogen-free)
Notes:
a. Surface mounted on 1" x 1" FR4 board.
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter Symbol
N-Channel P-Channel
Unit
5 s Steady State 5 s Steady State
Drain-Source Voltage VDS 12 - 12 V
Gate-Source Voltage VGS ± 8
Continuous Drain Current (TJ = 150 °C)aTA = 25 °C ID
1.3 1.2 - 0.86 - 0.77
A
TA = 85 °C 0.9 0.8 - 0.62 - 0.55
Pulsed Drain Current IDM 3- 2
Continuous Source Current (Diode Conduction)aIS0.5 0.39 - 0.5 - 0.39
Maximum Power DissipationaTA = 25 °C PD
0.6 0.47 0.6 0.47 W
TA = 85 °C 0.3 0.25 0.3 0.25
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to 150 °C
THERMAL RESISTANCE RATINGS
Parameter Symbol Typical Maximum Unit
Maximum Junction-to-Ambientat 5 s RthJA
170 210
°C/W
Steady State 220 265
Maximum Junction-to-Foot (Drain) Steady State RthJF 105 125
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Document Number: 71944
S10-1054-Rev. C, 03-May-10
Vishay Siliconix
Si1557DH
Notes:
a. Pulse test; pulse width 300 µs, duty cycle 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter Symbol Test Conditions Min. Typ. Max. Unit
Static
Gate Threshold Voltage VGS(th)
VDS = VGS, ID = 100 µA N-Ch 0.45 1 V
VDS = VGS, ID = - 100 µA P-Ch - 0.45 1
Gate-Body Leakage IGSS VDS = 0 V, VGS = ± 8 V N-Ch ± 100 nA
P-Ch ± 100
Zero Gate Voltage Drain Current IDSS
VDS = 9.6 V, VGS = 0 V N-Ch 1
µA
VDS = - 9.6 V, VGS = 0 V P-Ch - 1
VDS = 9.6 V, VGS = 0 V, TJ = 85 °C N-Ch 5
VDS = - 9.6 V, VGS = 0 V, TJ = 85 °C P-Ch - 5
On-State Drain CurrentaID(on) VDS 5 V, VGS = 4.5 V N-Ch 3 A
VDS - 5 V, VGS = - 4.5 V P-Ch - 2
Drain-Source On-State ResistanceaRDS(on)
VGS = 4.5 V, ID = 1.2 A N-Ch 0.195 0.235
Ω
VGS = - 4.5 V, ID = - 0.77 A P-Ch 0.445 0.535
VGS = 2.5 V, ID = 1.0 A N-Ch 0.230 0.280
VGS = - 2.5 V, ID = - 0.6 A P-Ch 0.735 0.880
VGS = 1.8 V, ID = 0.2 A N-Ch 0.284 0.340
VGS = - 1.8 V, ID = - 0.2 A P-Ch 1.05 1.26
Forward Transconductanceagfs
VDS = 5 V, ID = 1.2 A N-Ch 0.8 S
VDS = - 5 V, ID = - 0.77 A P-Ch 1.2
Diode Forward VoltageaVSD
IS = 0.39 A, VGS = 0 V N-Ch 0.8 1.2 V
IS = - 0.39 A, VGS = 0 V P-Ch - 0.8 - 1.2
Dynamicb
Total Gate Charge Qg N-Channel
VDS = 6 V, VGS = 4.5 V, ID = 1.2 A
P-Channel
VDS = - 6 V, VGS = - 4.5 V, ID = - 0.1 A
N-Ch 0.8 1.2
nC
P-Ch 1.1 1.8
Gate-Source Charge Qgs
N-Ch 0.15
P-Ch 0.3
Gate-Drain Charge Qgd N-Ch 0.20
P-Ch 0.25
Tur n - O n D e l ay Time td(on) N-Channel
VDD = 6 V, RL = 12 Ω
ID 0.5 A, VGEN = 4.5 V, Rg = 6 Ω
P-Channel
VDD = - 6 V, RL = 12 Ω
ID - 0.5 A, VGEN = - 4.5 V, Rg = 6 Ω
N-Ch 15 25
ns
P-Ch 17 25
Rise Time tr
N-Ch 25 40
P-Ch 30 45
Turn-Off Delay Time td(off) N-Ch 25 40
P-Ch 15 25
Fall Time tf
N-Ch 10 15
P-Ch 10 15
Source-Drain Reverse Recovery Time trr
IF = 0.39 A, dI/dt = 100 A/µs N-Ch 20 40
IF = - 0.39 A, dI/dt = 100 A/µs P-Ch 25 40
Document Number: 71944
S10-1054-Rev. C, 03-May-10
www.vishay.com
3
Vishay Siliconix
Si1557DH
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Output Characteristics
On-Resistance vs. Drain Current
Gate Charge
0
1
2
3
4
01234
VGS = 5 V thru 2.5 V
2V
VDS
- Drain-to-Source Voltage (V)
ID - Drain Current (A)
1.5 V
1 V
RDS(on)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
01234
ID
- Drain Current (A)
VGS = 2.5 V
VGS = 4.5 V
VGS = 1.8 V
- On-Resistance (Ω)
0
1
2
3
4
5
0.0 0.2 0.4 0.6 0.8 1.0
VDS = 6 V
ID = 1.2 A
- Gate-to-Source Voltage (V)
Qg - Total Gate Charge (nC)
VGS
Transfer Characteristics
Capacitance
On-Resistance vs. Junction Temperature
0
1
2
3
4
0.0 0.5 1.0 1.5 2.0 2.5
TC = - 55 °C
125 °C
25 °C
VGS
- Gate-to-Source Voltage (V)
- Drain Current (A)ID
0
20
40
60
80
100
036912
VDS
- Drain-to-Source Voltage (V)
Crss
Coss
Ciss
C - Capacitance (pF)
0.6
0.8
1.0
1.2
1.4
1.6
- 50 - 25 0 25 50 75 100 125 150
VGS = 4.5 V
ID = 1.2 A
TJ - Junction Temperature (°C)
(Normalized)
- On-Resistance RDS(on)
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Document Number: 71944
S10-1054-Rev. C, 03-May-10
Vishay Siliconix
Si1557DH
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Source-Drain Diode Forward Voltage
Threshold Voltage
0.0 0.2 0.4 0.6 0.81.0 1.2
TJ = 150 °C
TJ = 25 °C
4
0.1
VSD - Source-to-Drain Voltage (V)
- Source Current (A)I
S
1
- 0.4
- 0.3
- 0.2
- 0.1
0.0
0.1
0.2
- 50 - 25 0 25 50 75 100 125 150
ID = 100 µA
Variance (V)VGS(th)
TJ - Temperature (°C)
On-Resistance vs. Gate-to-Source Voltage
Single Pulse Power
0.0
0.1
0.2
0.3
0.4
0.5
0.6
012345
ID = 1.2 A
- On-Resistance (Ω) RDS(on)
VGS - Gate-to-Source Voltage (V)
ID = 0.2 A
0
3
5
1
2
Power (W)
Time (s)
4
1 100 6001010-1
10-2
10-3
Safe Operating Area, Junction-to-Ambient
VDS - Drain-to-Source Voltage (V)
10
1
0.1 1 10 100
0.01
1 ms
- Drain Current (A)ID
0.1
TA = 25 °C
Single Pulse 1 s, 10 s, DC
Limited
by RDS(on)*
10 ms
100 ms
ID Limited
IDM Limited
BVDSS
Limited
* V
GS
minimum VGS at which RDS(on)
is specified
>
Document Number: 71944
S10-1054-Rev. C, 03-May-10
www.vishay.com
5
Vishay Siliconix
Si1557DH
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Normalized Thermal Transient Impedance, Junction-to-Ambient
10-3 10-2 1 10 60010-1
10-4 100
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Normalized Effective Transient
Thermal Impedance
1. Duty Cycle, D =
2. Per Unit Base = R
thJA
= 220 °C/W
3. T
JM
- T
A
= P
DM
Z
thJA(t)
t
1
t
2
t
1
t
2
Notes:
4. Surface Mounted
P
DM
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
10
-3
10
-2
11010
-1
10
-4
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Square Wave Pulse Duration (s)
Normalized Effective Transient
Thermal Impedance
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Document Number: 71944
S10-1054-Rev. C, 03-May-10
Vishay Siliconix
Si1557DH
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Output Characteristics
On-Resistance vs. Drain Current
Gate Charge
0.0
0.5
1.0
1.5
2.0
2.5
3.0
01234
VGS
thru 3.5 V
= 5 V
2 V
VDS - Drain-to-Source Voltage (V)
- Drain Current (A)ID
1.5 V
2.5 V
3 V
R
DS(on)
0.0
0.4
0.8
1.2
1.6
2.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0
ID - Drain Current (A)
VGS = 2.5
V
VGS = 4.5 V
VGS = 1.8 V
- On-Resistance (Ω)
0
1
2
3
4
5
0.0 0.3 0.6 0.9 1.2 1.5
VDS = 6 V
ID = 0.8 A
- Gate-to-Source Voltage (V)
Qg - Total Gate Charge (nC)
V
GS
Transfer Characteristics
Capacitance
On-Resistance vs. Junction Temperature
0.0
0.5
1.0
1.5
2.0
2.5
3.0
01234
TC = - 55 °C
125 °C
25 °C
VGS - Gate-to-Source Voltage (V)
- Drain Current (A)I
D
0
40
80
120
160
036912
VDS - Drain-to-Source Voltage (V)
Crss
Coss
Ciss
C - Capacitance (pF)
0.6
0.8
1.0
1.2
1.4
1.6
- 50 - 25 0 25 50 75 100 125 150
VGS = 4.5 V
ID = 0.8 A
TJ - Junction Temperature (°C)
(Normalized)
- On-ResistanceRDS(on)
Document Number: 71944
S10-1054-Rev. C, 03-May-10
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7
Vishay Siliconix
Si1557DH
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Source-Drain Diode Forward Voltage
Threshold Voltage
0.0 0.2 0.4 0.6 0.81.0 1.2
TJ = 150 °C
TJ = 25 °C
3
0.1
VSD - Source-to-Drain Voltage (V)
- Source Current (A)I
S
1
- 0.2
- 0.1
0.0
0.1
0.2
0.3
- 50 - 25 0 25 50 75 100 125 150
ID = 100 µA
Variance (V)V
GS(th)
TJ - Temperature (°C)
On-Resistance vs. Gate-to-Source Voltage
Single Pulse Power
0.0
0.5
1.0
1.5
2.0
2.5
3.0
012345
ID = 0.8 A
R
DS(on)
VGS - Gate-to-Source Voltage (V)
ID = 0.2 A
- On-Resistance (Ω)
0
3
5
1
2
Power (W)
Time (s)
4
1 100 6001010-1
10-2
10-3
Safe Operating Area, Junction-to-Ambient
VDS - Drain-to-Source Voltage (V)
10
1
0.1 1 10 100
0.01
- Drain Current (A)ID
0.1
1 ms
TA = 25 °C
Single Pulse 1 s, 10 s, DC
Limited
by RDS(on)*
10 ms
100 ms
ID Limited
IDM Limited
BVDSS
Limited
* VGS
minimum VGS at which RDS(on)
is specified
>
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8
Document Number: 71944
S10-1054-Rev. C, 03-May-10
Vishay Siliconix
Si1557DH
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?71944.
Normalized Thermal Transient Impedance, Junction-to-Ambient
10-3 10-2 1 10 60010-1
10-4 100
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Normalized Effective Transient
Thermal Impedance
1. Duty Cycle, D =
2. Per Unit Base = R
thJA
= 220 °C/W
3. T
JM
- T
A
= P
DM
Z
thJA(t)
t
1
t
2
t
1
t
2
Notes:
4. Surface Mounted
P
DM
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
10
-3
10
-2
11010
-1
10
-4
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Square Wave Pulse Duration (s)
Normalized Effective Transient
Thermal Impedance
L
c
E
E1
e
D
e1
A2A
A1
1
-A-
b
-B-
23
654
Package Information
Vishay Siliconix
Document Number: 71154
06-Jul-01 www.vishay.com
1
SCĆ70: 6ĆLEADS
MILLIMETERS INCHES
Dim Min Nom Max Min Nom Max
A0.90 1.10 0.035 0.043
A1 0.10 0.004
A20.80 1.00 0.031 0.039
b0.15 0.30 0.006 0.012
c0.10 0.25 0.004 0.010
D1.80 2.00 2.20 0.071 0.079 0.087
E1.80 2.10 2.40 0.071 0.083 0.094
E11.15 1.25 1.35 0.045 0.049 0.053
e0.65BSC 0.026BSC
e11.20 1.30 1.40 0.047 0.051 0.055
L0.10 0.20 0.30 0.004 0.008 0.012
7_Nom 7_Nom
ECN: S-03946—Rev. B, 09-Jul-01
DWG: 5550
AN816
Vishay Siliconix
Document Number: 71405
12-Dec-03
www.vishay.com
1
Dual-Channel LITTLE FOOTR 6-Pin SC-70 MOSFET
Copper Leadframe Version
Recommended Pad Pattern and Thermal Performance
INTRODUCTION
The new dual 6-pin SC-70 package with a copper leadframe
enables improved on-resistance values and enhanced
thermal performance as compared to the existing 3-pin and
6-pin packages with Alloy 42 leadframes. These devices are
intended for small to medium load applications where a
miniaturized package is required. Devices in this package
come in a range of on-resistance values, in n-channel and
p-channel versions. This technical note discusses pin-outs,
package outlines, pad patterns, evaluation board layout, and
thermal performance for the dual-channel version.
PIN-OUT
Figure 1 shows the pin-out description and Pin 1 identification
for the dual-channel SC-70 device in the 6-pin configuration.
Both n-and p-channel devices are available in this package –
the drawing example below illustrates the p-channel device.
FIGURE 1.
SOT-363
SC-70 (6-LEADS)
6
4
1
2
3
5
Top View
S1
G1
D2
D1
G2
S2
For package dimensions see outline drawing SC-70 (6-Leads)
(http://www.vishay.com/doc?71154)
BASIC PAD PATTERNS
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286) for the SC-70
6-pin basic pad layout and dimensions. This pad pattern is
sufficient for the low-power applications for which this package
is intended. Increasing the drain pad pattern (Figure 2) yields
a reduction in thermal resistance and is a preferred footprint.
FIGURE 2. SC-70 (6 leads) Dual
48 (mil)
16 (mil)
654
321
61 (mil)
26 (mil)
8 (mil)
0.0 (mil)
23 (mil)
71 (mil)
96 (mil)
26 (mil)
87 (mil)
EVALUATION BOARD FOR THE DUAL-
CHANNEL SC70-6
The 6-pin SC-70 evaluation board (EVB) shown in Figure 3
measures 0.6 in. by 0.5 in. The copper pad traces are the same
as described in the previous section, Basic Pad Patterns. The
board allows for examination from the outer pins to the 6-pin
DIP connections, permitting test sockets to be used in
evaluation testing.
The thermal performance of the dual 6-pin SC-70 has been
measured on the EVB, comparing both the copper and Alloy
42 leadframes. This test was then repeated using the 1-inch2
PCB with dual-side copper coating.
A helpful way of displaying the thermal performance of the
6-pin SC-70 dual copper leadframe is to compare it to the
traditional Alloy 42 version.
AN816
Vishay Siliconix
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Document Number: 71405
12-Dec-03
FIGURE 3.
Front of Board SC70-6 Back of Board SC70-6
D1
G2
S2
S1
G1
D2
SC706 DUAL vishay.com
THERMAL PERFORMANCE
Junction-to-Foot Thermal Resistance
(the Package Performance)
Thermal performance for the dual SC-70 6-pin package is
measured as junction-to-foot thermal resistance, in which the
“foot” is the drain lead of the device as it connects with the
body. The junction-to-foot thermal resistance for this device is
typically 80_C/W, with a maximum thermal resistance of
approximately 100_C/W. This data compares favorably with
another compact, dual-channel package – the dual TSOP-6 –
which features a typical thermal resistance of 75_C/W and a
maximum of 90_C/W.
Power Dissipation
The typical RθJA for the dual-channel 6-pin SC-70 with a
copper leadframe is 224_C/W steady-state, compared to
413_C/W for the Alloy 42 version. All figures are based on the
1-inch2 FR4 test board. The following example shows how the
thermal resistance impacts power dissipation for the dual 6-pin
SC-70 package at varying ambient temperatures.
Alloy 42 Leadframe
ALLOY 42 LEADFRAME
Room Ambient 25 _CElevated Ambient 60 _C
PD+TJ(max) *TA
RqJA
PD+150oC*25oC
413oCńW
PD+303 mW
PD+TJ(max) *TA
RqJA
PD+150oC*60oC
413oCńW
PD+218 mW
COOPER LEADFRAME
Room Ambient 25 _CElevated Ambient 60 _C
PD+TJ(max) *TA
RqJA
PD+150oC*25oC
224oCńW
PD+558 mW
PD+TJ(max) *TA
RqJA
PD+150oC*60oC
224oCńW
PD+402 mW
Although they are intended for low-power applications,
devices in the 6-pin SC-70 dual-channel configuration will
handle power dissipation in excess of 0.5 W.
TESTING
To further aid the comparison of copper and Alloy 42
leadframes, Figures 4 and 5 illustrate the dual-channel 6-pin
SC-70 thermal performance on two different board sizes and
pad patterns. The measured steady-state values of RθJA for
the dual 6-pin SC-70 with varying leadframes are as follows:
LITTLE FOOT 6-PIN SC-70
Alloy 42 Copper
1) Minimum recommended pad pattern on
the EVB board (see Figure 3). 518_C/W 344_C/W
2) Industry standard 1-inch2 PCB with
maximum copper both sides. 413_C/W 224_C/W
The results indicate that designers can reduce thermal
resistance (θJA) by 34% simply by using the copper leadframe
device as opposed to the Alloy 42 version. In this example, a
174_C/W reduction was achieved without an increase in board
area. If an increase in board size is feasible, a further 120_C/W
reduction can be obtained by utilizing a 1-inch2. PCB area.
The Dual copper leadframe versions have the following suffix:
Dual: Si19xxEDH
Compl.: Si15xxEDH
AN816
Vishay Siliconix
Document Number: 71405
12-Dec-03
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3
Time (Secs)
FIGURE 4. Dual SC70-6 Thermal Performance on EVB
Thermal Resistance (C/W)
0
1
500
100
200
100 1000
300
1010-1
10-2
10-3
10-4
10-5
Alloy 42
400
Time (Secs)
FIGURE 5. Dual SC70-6 Comparison on 1-inch2 PCB
Thermal Resistance (C/W)
0
1
500
100
200
100 1000
300
1010-1
10-2
10-3
10-4
10-5
400
Copper
Copper
Alloy
42
Application Note 826
Vishay Siliconix
www.vishay.com Document Number: 72602
18 Revision: 21-Jan-08
APPLICATION NOTE
RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead
0.096
(2.438)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.067
(1.702)
0.026
(0.648)
0.045
(1.143)
0.016
(0.406)
0.026
(0.648)
0.010
(0.241)
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Revision: 02-Oct-12 1Document Number: 91000
Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.