3.3 V, ±15 kV ESD-Protected, Half- and
Full-Duplex, RS-485/RS-422 Transceivers
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2006–2009 Analog Devices, Inc. All rights reserved.
FEATURES
TIA/EIA RS-485/RS-422 compliant
±15 kV ESD protection on RS-485 input/output pins
Data rates
ADM3070E/ADM3071E/ADM3072E: 250 kbps
ADM3073E/ADM3074E/ADM3075E: 500 kbps
ADM3076E/ADM3077E/ADM3078E: 16 Mbps
Half- and full-duplex options
True fail-safe receiver inputs
Up to 256 nodes on the bus
−40°C to +125°C temperature option
Hot-swap input structure on DE and RE pins
Reduced slew rates for low EMI
Low power shutdown current (all except ADM3071E/
ADM3074E/ADM3077E)
Outputs high-Z when disabled or powered off
Common-mode input range: −7 V to +12 V
Thermal shutdown and short-circuit protection
8-lead and 14-lead narrow SOIC packages
APPLICATIONS
Power/energy metering
Industrial control
Lighting systems
Telecommunications
Security systems
Instrumentation
GENERAL DESCRIPTION
The ADM307xE are 3.3 V, low power data transceivers with
±15 kV ESD protection suitable for full- and half-duplex
communication on multipoint bus transmission lines. They
are designed for balanced data transmission, and they comply
with TIA/EIA standards: RS-485 and RS-422.
The devices have a ⅛ unit load receiver input impedance, which
allows up to 256 transceivers on a bus. Because only one driver
should be enabled at any time, the output of a disabled or powered-
down driver is tristated to avoid overloading the bus.
The receiver inputs have a true fail-safe feature, which eliminates
the need for external bias resistors and ensures a logic high
output level when the inputs are open or shorted. This guar-
antees that the receiver outputs are in a known state before
communication begins and when communication ceases.
FUNCTIONAL BLOCK DIAGRAMS
ADM3070E/
ADM3073E/
ADM3076E
RO
RE
DE
DI
V
CC
A
B
Z
Y
GND
R
D
06285-001
Figure 1.
ADM3071E/
ADM3074E/
ADM3077E
RO
DI
V
CC
A
B
Z
Y
GND
R
D
0
6285-002
Figure 2.
ADM3072E/
ADM3075E/
ADM3078E
RO
RE
DE
DI
V
CC
A
B
GND
D
R
06285-003
Figure 3.
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 4
Timing Specifications—
ADM3070E/ADM3071E/ADM3072E ....................................... 5
Timing Specifications—
ADM3073E/ADM3074E/ADM3075E ....................................... 6
Timing Specifications—
ADM3076E/ADM3077E/ADM3078E ....................................... 7
Absolute Maximum Ratings ............................................................ 8
ESD Caution .................................................................................. 8
Pin Configurations and Function Descriptions ........................... 9
Test Circuits and Switching Characteristics ................................ 10
Typical Performance Characteristics ........................................... 12
Circuit Description......................................................................... 15
Function Tables ........................................................................... 15
Receiver Fail-Safe ....................................................................... 15
Hot-Swap Capability .................................................................. 16
Line Length vs. Data Rate ......................................................... 16
±15 kV ESD Protection ............................................................. 16
Human Body Model .................................................................. 16
256 Transceivers on the Bus ...................................................... 16
Reduced EMI and Reflections .................................................. 16
Low Power Shutdown Mode ..................................................... 17
Driver Output Protection .......................................................... 17
Typical Applications ................................................................... 17
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 20
REVISION HISTORY
8/09—Rev. D to Rev. E
Changes to Ordering Guide .......................................................... 20
4/09—Rev. C to Rev. D
Changes to Ordering Guide .......................................................... 20
1/09—Rev. B to Rev. C
Changes to Ordering Guide .......................................................... 20
8/08—Rev. A to Rev. B
Changes to Table 3 ............................................................................ 5
Changes to Figure 36 ...................................................................... 18
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
10/06—Rev. 0 to Rev. A
Added ADM3077E and ADM3078E ............................... Universal
Changes to Figure 2 and Figure 3 ................................................... 1
Changes to Figure 5 and Figure 6 ................................................... 9
Changes to Figure 34 and Figure 35 ............................................. 17
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
8/06—Revision 0: Initial Version
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 3 of 20
The driver outputs of the 250 kbps and 500 kbps devices are slew
rate limited to reduce EMI and data errors caused by reflections
from improperly terminated buses. Excessive power dissipation
caused by bus contention or by output shorting is prevented
with a thermal shutdown circuit.
The parts are fully specified over the industrial temperature
ranges and are available in 8-lead and 14-lead narrow SOIC
packages.
Table 1. Selection Table
Part No.
Half/Full
Duplex
Data Rate
(Mbps)
Slew Rate
Limited
Driver/Receiver
Enable
Low Power
Shutdown
Nodes on
Bus
±15 kV ESD
on Bus Pins
Pin
Count
ADM3070E Full 0.25 Yes Yes Yes 256 Yes 14
ADM3071E Full 0.25 Yes No No 256 Yes 8
ADM3072E Half 0.25 Yes Yes Yes 256 Yes 8
ADM3073E Full 0.5 Yes Yes Yes 256 Yes 14
ADM3074E Full 0.5 Yes No No 256 Yes 8
ADM3075E Half 0.5 Yes Yes Yes 256 Yes 8
ADM3076E Full 16 No Yes Yes 256 Yes 14
ADM3077E Full 16 No No No 256 Yes 8
ADM3078E Half 16 No Yes Yes 256 Yes 8
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 4 of 20
SPECIFICATIONS
VCC = 3.3 V ± 10%, TA = TMIN to TMAX, unless otherwise noted.
Table 2. ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Outputs
Differential Output Voltage VOD 2.0 VCC V RL = 100 Ω (RS-422) (see Figure 7)
1.5 VCC V RL = 54 Ω (RS-485) (see Figure 7)
V
CC V No load
Δ|VOD| for Complementary Output States1 ΔVOD 0.2 V RL = 54 Ω or 100 Ω (see Figure 7)
Common-Mode Output Voltage VOC V
CC/2 3 V RL = 54 Ω or 100 Ω (see Figure 7)
Δ|VOC| for Complementary Output States1 ΔVOC 0.2 V RL = 54 Ω or 100 Ω (see Figure 7)
Short-Circuit Output Current IOSD 40 250 mA 0 V < VOUT < 12 V
−250 −40 mA −7 V < VOUT < VCC
Short-Circuit Foldback Output Current IOSDF 20 mA (VCC − 1 V) < VOUT < 12 V
−20 mA −7 V < VOUT < +1 V
Output Leakage (Y, Z) Full Duplex IO 125 μA
DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V
−100 μA
DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VIN = −7 V
Logic Inputs
Input High Voltage VIH 2.0 V
DE, DI, RE
Input Low Voltage VIL 0.8 V
DE, DI, RE
Input Hysteresis VHYS 100 mV
DE, DI, RE
Logic Input Current IIN ±1 μA
DE, DI, RE
Input Impedance First Transition 1 10 kΩ DE
Thermal Shutdown Threshold TTS 175 °C
Thermal Shutdown Hysteresis TTSH 15 °C
RECEIVER
Differential Inputs
Differential Input Threshold Voltage VTH −200 −125 −50 mV −7 V < VCM < +12 V
Input Hysteresis ΔVTH 15 mV VA + VB = 0 V
Input Resistance (A, B) RIN 96 kΩ −7 V < VCM < +12 V
Input Current (A, B) IA, IB 125 μA DE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V
−100 μA DE = 0 V, VCC = 0 V or 3.6 V, VIN = −7 V
RO Logic Output
Output High Voltage VOH V
CC − 0.6 V IOUT = −1 mA
Output Low Voltage VOL 0.4 V IOUT = 1 mA
Short-Circuit Output Current IOSR ±80 mA 0 V < VRO < VCC
Tristate Output Leakage Current IOZR ±1 μA VCC = 3.6 V, 0 V < VOUT < VCC
POWER SUPPLY
Supply Current ICC 0.8 1.5 mA
No load, DE = VCC, RE = 0 V
0.8 1.5 mA
No load, DE = VCC, RE = VCC
0.8 1.5 mA
No load, DE = 0 V, RE = 0 V
Shutdown Current ISHDN 0.05 10 μA
DE = 0 V, RE = VCC
ESD PROTECTION
A, B, Y, Z Pins ±15 kV Human body model
All Pins Except A, B, Y, Z Pins ±4 kV Human body model
1 Δ|VOD| and Δ|VOC| are the changes in VOD and VOC, respectively, when the DI input changes state.
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 5 of 20
TIMING SPECIFICATIONS—ADM3070E/ADM3071E/ADM3072E
VCC = 3.3 V ± 10%, TA = TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Maximum Data Rate 250 kbps
Propagation Delay, Low-to-High Level tDPLH 250 1500 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Propagation Delay, High-to-Low Level tDPHL 250 1500 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Rise Time/Fall Time tDR/tDF 350 1600 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
|tDPLH − tDPHL| Differential Driver Output Skew tDSKEW 200 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)1
Enable to Output High tDZH 2500 ns See Figure 10
Enable to Output Low tDZL 2500 ns See Figure 11
Disable Time from Low tDLZ 100 ns See Figure 11
Disable Time from High tDHZ 100 ns See Figure 10
Enable Time from Shutdown to High tDZH(SHDN) 5500 ns See Figure 10
Enable Time from Shutdown to Low tDZL(SHDN) 5500 ns See Figure 11
RECEIVER
Maximum Data Rate 250 kbps
Propagation Delay, Low-to-High Level tRPLH 200 ns CL = 15 pF (see Figure 12 and Figure 13)
Propagation Delay, High-to-Low Level tRPHL 200 ns CL = 15 pF (see Figure 12 and Figure 13)
|tRPLH − tRPHL| Output Skew tRSKEW 30 ns CL = 15 pF (see Figure 12 and Figure 13)
Enable to Output High tRZH 50 ns See Figure 14
Enable to Output Low tRZL 50 ns See Figure 14
Disable Time from Low tRLZ 50 ns See Figure 14
Disable Time from High tRHZ 50 ns See Figure 14
Enable Time from Shutdown to High tRZH(SHDN) 4000 ns See Figure 14
Enable Time from Shutdown to Low tRZL(SHDN) 4000 ns See Figure 14
TIME TO SHUTDOWN tSHDN 50 200 600 ns
1 VCC = 3.3 V.
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 6 of 20
TIMING SPECIFICATIONS—ADM3073E/ADM3074E/ADM3075E
VCC = 3.3 V ± 10%, TA = TMIN to TMAX, unless otherwise noted.
Table 4.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Maximum Data Rate 500 kbps
Propagation Delay, Low-to-High Level tDPLH 180 800 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Propagation Delay, High-to-Low Level tDPHL 180 800 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Rise Time/Fall Time tDR/tDF 200 800 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
|tDPLH − tDPHL| Differential Driver Output Skew tDSKEW 100 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Enable to Output High tDZH 2500 ns See Figure 10
Enable to Output Low tDZL 2500 ns See Figure 11
Disable Time from Low tDLZ 100 ns See Figure 11
Disable Time from High tDHZ 100 ns See Figure 10
Enable Time from Shutdown to High tDZH(SHDN) 4500 ns See Figure 10
Enable Time from Shutdown to Low tDZL(SHDN) 4500 ns See Figure 11
RECEIVER
Maximum Data Rate 500 kbps
Propagation Delay, Low-to-High Level tRPLH 200 ns CL = 15 pF (see Figure 12 and Figure 13)
Propagation Delay, High-to-Low Level tRPHL 200 ns CL = 15 pF (see Figure 12 and Figure 13)
|tRPLH − tRPHL| Output Skew tRSKEW 30 ns CL = 15 pF (see Figure 12 and Figure 13)
Enable to Output High tRZH 50 ns See Figure 14
Enable to Output Low tRZL 50 ns See Figure 14
Disable Time from Low tRLZ 50 ns See Figure 14
Disable Time from High tRHZ 50 ns See Figure 14
Enable Time from Shutdown to High tRZH(SHDN) 4000 ns See Figure 14
Enable Time from Shutdown to Low tRZL(SHDN) 4000 ns See Figure 14
TIME TO SHUTDOWN tSHDN 50 200 600 ns
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 7 of 20
TIMING SPECIFICATIONS—ADM3076E/ADM3077E/ADM3078E
VCC = 3.3 V ± 10%, TA = TMIN to TMAX, unless otherwise noted.
Table 5.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Maximum Data Rate 16 Mbps
Propagation Delay, Low-to-High Level tDPLH 50 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Propagation Delay, High-to-Low Level tDPHL 50 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Rise Time/Fall Time tDR/tDF 15 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
|tDPLH − tDPHL| Differential Driver Output Skew tDSKEW 8 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Enable to Output High tDZH 150 ns See Figure 10
Enable to Output Low tDZL 150 ns See Figure 11
Disable Time from Low tDLZ 100 ns See Figure 11
Disable Time from High tDHZ 100 ns See Figure 10
Enable Time from Shutdown to High tDZH(SHDN) 1250 1800 ns See Figure 10
Enable Time from Shutdown to Low tDZL(SHDN) 1250 1800 ns See Figure 11
RECEIVER
Maximum Data Rate 16 Mbps
Propagation Delay, Low-to-High Level tRPLH 40 75 ns CL = 15 pF (see Figure 12 and Figure 13)
Propagation Delay, High-to-Low Level tRPHL 40 75 ns CL = 15 pF (see Figure 12 and Figure 13)
|tRPLH − tRPHL| Output Skew tRSKEW 8 ns CL = 15 pF (see Figure 12 and Figure 13)
Enable to Output High tRZH 50 ns See Figure 14
Enable to Output Low tRZL 50 ns See Figure 14
Disable Time from Low tRLZ 50 ns See Figure 14
Disable Time from High tRHZ 50 ns See Figure 14
Enable Time from Shutdown to High tRZH(SHDN) 1800 ns See Figure 14
Enable Time from Shutdown to Low tRZL(SHDN) 1800 ns See Figure 14
TIME TO SHUTDOWN tSHDN 50 200 600 ns
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 8 of 20
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 6.
Parameter Rating
VCC to GND −0.3 V to +6 V
Digital Input/Output Voltage (DE, RE, DI) −0.3 V to +6 V
Receiver Output Voltage (RO) −0.3 V to (VCC + 0.3 V)
Driver Output (A, B, Y, Z)/Receiver
Input (A, B) Voltage −8 V to +13 V
Driver Output Current ±250 mA
Operating Temperature Range
ADM307xEA −40°C to +85°C
ADM307xEY −40°C to +125°C
Storage Temperature Range −65°C to +150°C
θJA Thermal Impedance
8-Lead SOIC_N 158°C/W
14-Lead SOIC_N 120°C/W
Lead Temperature, Soldering (20 sec) 260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 9 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC
1
RO
2
RE
3
DE
4
V
CC
14
NC
13
A
12
B
11
DI
5
Z
10
GND
6
Y
9
GND
7
NC
8
NC = NO CONNECT
ADM3070E/
ADM3073E/
ADM3076E
TOP VIEW
(Not to Scale)
06285-004
V
CC 1
RO
2
DI
3
GND
4
A
8
B
7
Z
6
Y
5
ADM3071E/
ADM3074E/
ADM3077E
TOP VIEW
(Not to Scale)
06285-005
RO
1
RE
2
DE
3
DI
4
V
CC
8
B
7
A
6
GND
5
ADM3072E/
ADM3075E/
ADM3078E
TOP VIEW
(Not to Scale)
06285-006
Figure 4. ADM3070E/ADM3073E/ADM3076E
Pin Configuration
Figure 5. ADM3071E/ADM3074E/ADM3077E
Pin Configuration
Figure 6. ADM3072E/ADM3075E/ADM3078E
Pin Configuration
Table 7. Pin Function Descriptions
ADM3070E/
ADM3073E/
ADM3076E
Pin No.
ADM3071E/
ADM3074E/
ADM3077E
Pin No.
ADM3072E/
ADM3075E/
ADM3078E
Pin No. Mnemonic Description
2 2 1 RO
Receiver Output. When enabled, if (A − B) ≥ −50 mV, RO is high. If
(A − B) ≤ −200 mV, RO is low.
3 N/A 2
RE Receiver Output Enable. A low level enables the receiver output.
A high level places it in a high impedance state. If RE is high and DE
is low, the device enters a low power shutdown mode.
4 N/A 3 DE
Driver Output Enable. A high level enables the driver differential
A and B outputs. A low level places it in a high impedance state. If
RE is high and DE is low, the device enters a low power shutdown mode.
5 3 4 DI
Driver Input. With a half-duplex part when the driver is enabled, a
logic low on DI forces A low and B high; a logic high on DI forces
A high and B low. With a full-duplex part when the driver is enabled,
a logic low on DI forces Y low and Z high; a logic high on DI forces
Y high and Z low.
6, 7 4 5 GND
Ground.
9 5 N/A Y Noninverting Driver Output.
N/A N/A 6 A Noninverting Receiver Input A and Noninverting Driver Output A.
12 8 N/A A Noninverting Receiver Input A.
10 6 N/A Z Inverting Driver Output.
N/A N/A 7 B Inverting Receiver Input B and Inverting Driver Output B.
11 7 N/A B Inverting Receiver Input B.
14 1 8 VCC Power Supply, 3.3 V ± 10%. Bypass VCC to GND with a 0.1 μF capacitor.
1, 8, 13 N/A N/A NC No Connect. Not internally connected; can be connected to GND.
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 10 of 20
TEST CIRCUITS AND SWITCHING CHARACTERISTICS
V
OC
R
L
/2
R
L
/2
Z
Y
06285-007
V
OD
Figure 7. Driver DC Test Load
DI
DE
Y
Z
3
V
C
L
R
L
V
OD
06285-008
Figure 8. Driver Timing Test Circuit
V
CC
t
DPLH
t
DR
t
DF
t
DPHL
0V
V
CC
/2
1/2V
O
1/2V
O
DI
Z
Y
V
O
+V
O
–V
O
V
DIFF
10%
90% 90%
10%
V
DIFF
= V (Y) – V (Z)
t
DSKEW
= |
t
DPLH
–
t
DPHL
|
0V
06285-009
Figure 9. Driver Propagation Delays
OUT
S1
0V OR 3V
GENERATOR
R
L
500
50
DE
OUT
C
L
50pF
+
tDZH
,
tDZH(SHDN)
V
OM
= (0 + V
OH
)/2
tDHZ
V
CC
/2
0.25V
V
CC
0V
V
OH
0V
D
06285-010
Figure 10. Driver Enable and Disable Times (tDHZ, tDZH, tDZH(SHDN))
OUT
S1
V
CC
0V OR 3V
GENERATOR
R
L
500
50
DE
OUT
C
L
50pF
+
t
DZL
,
t
DZL(SHDN)
V
OM
= (V
OL
+ V
CC
)/2
t
DLZ
V
CC
/2
0.25V
V
CC
V
CC
0V
V
OL
D
06285-011
Figure 11. Driver Enable and Disable Times (tDZL, tDLZ, tDZL(SHDN))
V
ID
ATE
B
R
RECEIVER
OUTPUT
A
06285-012
Figure 12. Receiver Propagation Delay Test Circuit
NOTES
1. THE RISE TIME AND FALL TIME OF INPUT A AND INPUT B < 4ns.
A
B
RO
V
OL
V
OH
1.5V
+1
V
–1V
t
RPHL
t
RPLH
06285-013
Figure 13. Receiver Propagation Delays
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 11 of 20
t
RZH
,
t
RZH(SHDN)
t
RZL
,
t
RZL(SHDN)
(V
OL
+ V
CC
)/2
t
RHZ
1.5V
t
RLZ
1.5V
1.5V
0.25V
3V
0V
V
CC
V
OL
3V
0V
V
CC
V
OL
3V
0V
V
OH
0V
3V
0V
V
OH
V
OH
/2
0V
0.25V
V
CC
S3 S1
–1.5V
+1.5
V
GENERATOR
1k
50
C
L
15pF
+
V
ID
S2
S1 CLOSED
S2 OPEN
S3 = –1.5V
S1 OPEN
S2 CLOSED
S3 = +1.5V
S1 CLOSED
S2 OPEN
S3 = –1.5V
S1 OPEN
S2 CLOSED
S3 = +1.5V
RE
RO
RE
RO
RE
RO
RE
RO
06285-014
Figure 14. Receiver Enable and Disable Times
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 12 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
06285-020
1.2
0.5
–40
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
–10 20 50 80
1.1
1.0
0.9
0.8
0.7
0.6
110
06285-023
3.30
3.00
–50 125
TEMPERATURE (°C)
OUTPUT HIGH VOLTAGE (V)
3.25
3.20
3.15
3.10
3.05
–25 0 25 50 75 100
I
RO
= –1mA
Figure 15. Supply Current vs. Temperature Figure 18. Receiver Output High Voltage vs. Temperature
06285-021
03
OUTPUT HIGH VOLTAGE (V)
.5
06285-024
0.7
0
–50 125
TEMPERATURE (°C)
OUTPUT LOW VOLTAGE (V)
0.6
0.5
0.4
0.3
0.2
0.1
–25 0 25 50 75 100
I
RO
= 1mA
0.5 1.0 1.5 2.0 2.5 3.0
–
18
0
OUTPUT CURRENT (mA)
–16
–14
–12
–10
–8
–6
–4
–2
Figure 16. Output Current vs. Receiver Output High Voltage Figure 19. Receiver Output Low Voltage vs. Temperature
06285-022
25
0
03
OUTPUT LOW VOLTAGE (V)
OUTPUT CURRENT (mA)
.5
06285-025
100
0
03
DIFFERENTIAL OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
0.5 1.0 1.5 2.0 2.5 3.0
20
15
10
5
.5
0.5 1.0 1.5 2.0 2.5 3.0
90
80
70
60
50
40
30
20
10
Figure 17. Output Current vs. Receiver Output Low Voltage Figure 20. Driver Output Current vs. Differential Output Voltage
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 13 of 20
06285-026
2.6
1.6
–50 125
TEMPERATURE (°C)
DIFFERENTIAL OUTPUT VOLTAGE (V)
–25 0 25 50 75 100
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
R
L
= 54
Figure 21. Driver Differential Output Voltage vs. Temperature
06285-027
OUTPUT HIGH VOLTAGE (V)
OUTPUT CURRENT (mA)
0
20
40
60
80
100
120
–7–6–5–4–3–2–101234
Figure 22. Output Current vs. Driver Output High Voltage
06285-028
OUTPUT LOW VOLTAGE (V)
OUTPUT CURRENT (mA)
0
20
40
60
80
100
120
024681012
Figure 23. Output Current vs. Driver Output Low Voltage
06285-029
0.9
0
–50 125
TEMPERATURE (°C)
SHUTDOWN CURRENT (µA)
–25 0 25 50 75 100
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Figure 24. Shutdown Current vs. Temperature
06285-030
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
0
200
400
600
800
1000
1200
–40 25 125
t
DPLH
t
DPHL
Figure 25. ADM3070E/ADM3071E/ADM3072E Driver
Propagation Delay vs. Temperature (250 kbps)
06285-031
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
–40 25
0
100
200
300
400
500
600
700
125
t
DPLH
t
DPHL
Figure 26. ADM3073E/ADM3074E/ADM3075E Driver
Propagation Delay vs. Temperature (500 kbps)
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 14 of 20
06285-036
CH3 2.0V 8ns/pt
MATH1 2.01V 400ns
M400s 125MS/s A CH2 1.24V
3
M1
VY– VZ
DI
06285-032
35
0
–50 125
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
30
25
20
15
10
5
–25 0 25 50 75 100
t
DPLH
t
DPHL
Figure 30. ADM3073E/ADM3074E/ADM3075E Driver
Propagation Delay (500 kbps)
Figure 27. ADM3076E/ADM3077E/ADM3078E Driver
Propagation Delay vs. Temperature (16 Mbps)
06285-037
CH3 2.0V IT 400ps/pt
MATH1 1.0V 20ns
M20ns 1.25GS/s A CH3 1.64V
3
M1
DI
VY– VZ
06285-033
70
0
–50 125
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
60
50
40
30
20
10
–25 0 25 50 75 100
t
DPHL
t
DPLH
Figure 31. ADM3076E/ADM3077E/ADM3078E Driver
Propagation Delay (16 Mbps)
Figure 28. Receiver Propagation Delay vs. Temperature
06285-035
CH3 2.0V 4ns/pt
MATH1 2.01V 200ns
M200ns 250MS/s A CH2 1.24V
3
M1
VA– VB
RO
06285-034
CH3 2.0V 20ns/pt
MATH1 2.01V 1.0µs
M1.0µs 50MS/s A CH2 1.24V
3
M1
V
Y
– V
Z
DI
Figure 32. Receiver Propagation Delay
Figure 29. ADM3070E/ADM3071E/ADM3072E Driver
Propagation Delay (250 kbps)
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 15 of 20
CIRCUIT DESCRIPTION
The ADM307xE series are high speed transceivers for RS485
and RS-422 communications. Each device contains one driver
and one receiver. All devices feature fail-safe circuitry, which
guarantees a logic high receiver output when the receiver inputs
are open or shorted or when they are connected to a terminated
transmission line with all drivers disabled (see the Receiver Fail-
Safe section). The ADM307xE also feature a hot-swap capability,
allowing line insertion without erroneous data transfer (see the
Hot-Swap Capability section). The ADM3070E/ADM3071E/
ADM3072E feature reduced slew rate drivers that minimize
EMI and reduce reflections caused by improperly terminated
cables, allowing for error-free data transmission at rates up to
250 kbps.
The ADM3073E/ADM3074E/ADM3075E also offer slew rate
limits, allowing transmit speeds up to 500 kbps. The ADM3076E/
ADM3077E/ADM3078E driver slew rates are not limited, making
possible transmit speeds of up to 16 Mbps. The ADM3072E/
ADM3075E/ADM3078E are half-duplex transceivers; the
ADM3070E/ADM3071E/ADM3073E/ADM3074E/ADM3076E/
ADM3077E are each full-duplex transceivers. All devices operate
from a single 3.3 V supply. Drivers are output short-circuit
current limited, and thermal shutdown circuitry protects
drivers against excessive power dissipation. When activated,
the thermal shutdown circuitry places the driver outputs into
a high impedance state.
FUNCTION TABLES
ADM3070E/ADM3073E/ADM3076E
Table 8. Transmitting Truth Table
Transmitting Inputs Transmitting Outputs
RE DE DI Y Z
X1 1 1 1 0
X1 1 0 0 1
0 0 X1 High-Z2 High-Z2
1 0 X1 Shutdown Shutdown
1 X = don't care.
2 High-Z = high impedance.
Table 9. Receiving Truth Table
Receiving Inputs Receiving Outputs
RE DE A − B RO
0 X1 ≥ −50 mV 1
0 X1 ≤ −200 mV 0
0 X1 Open/shorted 1
1 1 X1 High-Z2
1 0 X1 Shutdown
1 X = don't care.
2 High-Z = high impedance.
ADM3071E/ADM3074E/ADM3077E
Table 10. Transmitting Truth Table
Transmitting Input Transmitting Outputs
DI Y Z
1 1 0
0 0 1
Table 11. Receiving Truth Table
Receiving Input Receiving Output
A − B RO
≥ −50 mV 1
≤ −200 mV 0
Open/shorted 1
ADM3072E/ADM3075E/ADM3078E
Table 12. Transmitting Truth Table
Transmitting Inputs Transmitting Outputs
RE DE DI A, Y B, Z
X1 1 1 1 0
X1 1 0 0 1
0 0 X1 High-Z2 High-Z2
1 0 X1 Shutdown Shutdown
1 X = don't care.
2 High-Z = high impedance.
Table 13. Receiving Truth Table
Receiving Inputs Receiving Output
RE DE A − B RO
0 0 ≥ −50 mV 1
0 0 ≤ −200 mV 0
0 0 Open/shorted 1
1 1 X1 High-Z2
1 0 X1 Shutdown
1 X = don't care.
2 High-Z = high impedance.
RECEIVER FAIL-SAFE
The ADM307xE family guarantees a logic high receiver output
when the receiver inputs are shorted, open, or connected to a
terminated transmission line with all drivers disabled. This is
done by setting the receiver input threshold between −50 mV
and −200 mV. If the differential receiver input voltage (A − B)
is greater than or equal to −50 mV, RO is logic high. If A − B
is less than or equal to −200 mV, RO is logic low. In the case
of a terminated bus with all transmitters disabled, the receiver
differential input voltage is pulled to 0 V by the termination.
With the receiver thresholds of the ADM307xE family, this
results in a logic high with a 50 mV minimum noise margin.
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 16 of 20
HOT-SWAP CAPABILITY
(ALL EXCEPT ADM3071E/ADM3074E/ADM3077E)
Hot-Swap Inputs
When a circuit board is inserted into a hot (or powered) back-
plane, differential disturbances to the data bus can lead to data
errors. During this period, processor logic output drivers are
high impedance and are unable to drive the DE and RE inputs
of the RS-485 transceivers to a defined logic level. Leakage currents
up to ±10 μA from the high impedance state of the processor
logic drivers can cause standard CMOS enable inputs of a tran-
sceiver to drift to an incorrect logic level. Additionally, parasitic
circuit board capacitance can cause coupling of VCC or GND to
the enable inputs. Without the hot-swap capability, these factors
can improperly enable the driver or receiver of the transceiver.
When VCC rises, an internal pull-down circuit holds DE low and
RE high. After the initial power-up sequence, the pull-down
circuit becomes transparent, resetting the hot-swap tolerable input.
LINE LENGTH vs. DATA RATE
The RS-485/RS-422 standard covers line lengths up to 4000 feet.
For line lengths greater than 4000 feet, Figure 37 illustrates an
example line repeater.
±15 kV ESD PROTECTION
Two coupling methods are used for ESD testing: contact
discharge and air-gap discharge. Contact discharge calls for
a direct connection to the unit being tested. Air-gap discharge
uses a higher test voltage but does not make direct contact with
the test unit. With air-gap discharge, the discharge gun is moved
toward the unit under test, developing an arc across the air gap,
thus the term air-gap discharge. This method is influenced by
humidity, temperature, barometric pressure, distance, and rate
of closure of the discharge gun. The contact discharge method,
while less realistic, is more repeatable and is gaining acceptance
and preference over the air-gap method.
Although very little energy is contained within an ESD pulse, the
extremely fast rise time, coupled with high voltages, can cause
failures in unprotected semiconductors. Catastrophic destruc-
tion can occur immediately as a result of arcing or heating.
Even if catastrophic failure does not occur immediately, the
device can suffer from parametric degradation that can result
in degraded performance. The cumulative effects of continuous
exposure can eventually lead to complete failure.
Input/output lines are particularly vulnerable to ESD damage.
Simply touching or connecting an input/output cable can result
in a static discharge that damages or completely destroys the
interface product connected to the input/output port. It is
extremely important, therefore, to have high levels of ESD
protection on the input/output lines.
The ESD discharge can induce latch-up in the device under test,
so it is important that ESD testing on the input/output pins be
carried out while device power is applied. This type of testing
is more representative of a real-world input/output discharge,
which occurs when equipment is operating normally.
The transmitter outputs and receiver inputs of the ADM307xE
family are characterized for protection to a ±15 kV limit using
the human body model.
HUMAN BODY MODEL
Figure 33 shows the human body model and the current
waveform it generates when discharged into low impedance.
This model consists of a 100 pF capacitor charged to the ESD
voltage of interest, which is then discharged into the test device
through a 1.5 kΩ resistor.
100%
90%
36.8
%
10%
t
RL
t
DL
I
PEAK
TIME
t
R2
C1
R1
HIGH
VOLTAGE
GENERATOR DEVICE
UNDER
TEST
ESD TEST METHOD
HUMAN BODY MODEL
ESD ASSOC. STD 55.1
R2
1.5k
C1
100pF
06285-015
Figure 33. Human Body Model and Current Waveform
256 TRANSCEIVERS ON THE BUS
The standard RS-485 receiver input impedance is 12 kΩ (1 unit
load), and the standard driver can drive up to 32 unit loads. The
ADM307xE family of transceivers has a ⅛ unit load receiver
input impedance (96 kΩ), allowing up to 256 transceivers to be
connected in parallel on one communication line. Any combi-
nation of these devices and other RS-485 transceivers with a
total of 32 unit loads or fewer can be connected to the line.
REDUCED EMI AND REFLECTIONS
The ADM3070E/ADM3071E/ADM3072E feature reduced
slew rate drivers that minimize EMI and reduce reflections
caused by improperly terminated cables, allowing for error-
free data transmission at rates up to 250 kbps. The ADM3073E/
ADM3074E/ADM3075E offer higher driver output slew rate
limits, allowing for transmit speeds of up to 500 kbps.
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 17 of 20
LOW POWER SHUTDOWN MODE
(ALL EXCEPT ADM3071E/ADM3074E/ADM3077E)
Low power shutdown mode is initiated by bringing both RE
high and DE low. In shutdown mode, the device draws less
than 1 μA of supply current. RE and DE can be driven simulta-
neously, but the parts are guaranteed not to enter shutdown if
RE is high and DE is low for fewer than 50 ns. If the inputs are
in this state for 600 ns or more, the parts are guaranteed to enter
shutdown. Enable times tZH and tZL assume that the part was not
originally in a low power shutdown state (see the
section). Enable times (tZH(SHDN)
and tZL(SHDN)) assume that the part was originally shut down. It
takes drivers and receivers longer to become enabled from low
power shutdown mode (tZH(SHDN), tZL(SHDN)) than from driver/
receiver disable mode (tZH, tZL).
Test C i rcuits
and Switching Characteristics
DRIVER OUTPUT PROTECTION
The ADM307xE family features two methods to prevent
excessive output current and power dissipation caused by
faults or by bus contention. Current limit protection on the
output stage provides immediate protection against short
circuits over the whole common-mode voltage range (see
Figure 22 and Figure 23). In addition, a thermal shutdown
circuit forces the driver outputs into a high impedance state
if the die temperature rises excessively.
TYPICAL APPLICATIONS
The ADM3072E/ADM3075E/ADM3078E transceivers are
designed for bidirectional data communications on multipoint
bus transmission lines. Figure 34 shows a typical network
applications circuit. The ADM3071E/ADM3074E/ADM3077E
transceivers are designed for point-to-point transmission lines
(see Figure 35). The ADM3070E/ADM3073E/ADM3076E
transceivers are designed for full-duplex RS-485 networks
(see Figure 36).
To minimize reflections, terminate the line at both ends with
a termination resistor (the value of the termination resistor
should be equal to the characteristic impedance of the cable
used) and keep stub lengths off the main line as short as
possible.
B
A
R
D
RO
DI
DE
ADM3072E/
ADM3075E/
ADM3078E
ADM3072E/
ADM3075E/
ADM3078E
ADM3072E/
ADM3075E/
ADM3078E
ADM3072E/
ADM3075E/
ADM3078E
B
AR
D
RO
DI
DE
B
A
R
D
RO RE DI
DE
B
A
RD
RO RE DI
DE
R
T
R
T
06285-016
NOTES
1. MAXIMUM NUMBER OF NODES: 256.
2.
T
IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED.
RE RE
Figure 34. ADM3072E/ADM3075E/ADM3078E Typical Half-Duplex RS-485 Network
B
A
R
D
RO
DI RO
DI
Y
ZB
A
Y
Z
MASTER
R
D
SLAVE
ADM3071E/
ADM3074E/
ADM3077E
ADM3071E/
ADM3074E/
ADM3077E
06285-017
Figure 35. ADM3071E/ADM3074E/ADM3077E Full-Duplex Point-to-Point Applications
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 18 of 20
R
D
RO
DI
DE
ADM3070E/
ADM3073E/
ADM3076E
ADM3070E/
ADM3073E/
ADM3076E
ADM3070E/
ADM3073E/
ADM3076E
ADM3070E/
ADM3073E/
ADM3076E
NOTES
1. MAXIMUM NUMBER OF NODES: 256.
2
.
R
T IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED.
A
B
Y
Z
RO
RT
RT
R
D
RO DI
DE
SLAVE AB Y
Z
R
DI
DE
B
A
Z
Y
D
R
D
RO DI
DE
SLAVE
SL
A
V
EMASTER
AB Y
Z
06285-019
RERE
RE
RE
Figure 36. ADM3070E/ADM3073E/ADM3076E Full-Duplex RS-485 Network
R
D
RO
DI
DATA IN
DATA OUT
DE
ADM3070E/
ADM3073E/
ADM3076E
NOTES
1. R
T
IS EQUAL TO THE CHARACTERISTIC
IMPEDANCE OF THE CABLE USED.
A
B
Y
Z
R
T
R
T
06285-018
RE
Figure 37. Line Repeater for ADM3070E/ADM3073E/ADM3076E
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 19 of 20
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-A A
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 38. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AB
060606-A
14 8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COPLANARITY
0.10
8°
0°
45°
Figure 39. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 20 of 20
ORDERING GUIDE
Model
Tem pera ture
Range Package Description
Package
Option
Ordering
Quantity
ADM3070EARZ1 −40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3070EARZ-REEL71 −40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
ADM3070EYRZ1 −40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3070EYRZ-REEL71 −40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
ADM3071EARZ1 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3071EARZ-REEL71 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3071EYRZ1 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3071EYRZ-REEL71 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3072EARZ1 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3072EARZ-REEL71 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3072EYRZ1 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3072EYRZ-REEL71 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3073EARZ1 −40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3073EARZ-REEL71 −40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
ADM3073EYRZ1 −40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3073EYRZ-REEL71 −40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
ADM3074EARZ1 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3074EARZ-REEL71 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3074EYRZ1 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3074EYRZ-REEL71 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3075EARZ1 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3075EARZ-REEL71 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3075EWYRZ1 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3075EWYRZ-RL71 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3075EYRZ1 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3075EYRZ-REEL71 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3076EARZ1 −40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3076EARZ-REEL71 −40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
ADM3076EYRZ1 −40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3076EYRZ-REEL71 −40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
ADM3077EARZ1 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3077EARZ-REEL71 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3077EYRZ1 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3077EYRZ-REEL71 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3078EARZ1 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3078EARZ-REEL71 −40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
ADM3078EYRZ1 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3078EYRZ-REEL71 −40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1 Z = RoHS Compliant Part.
©2006–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06285-0-8/09(E)