ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage (VGS = 0, ID = 100 mA) V(BR)DSS 125 Vdc
Zero Gate Voltage Drain Current (VDS = 50 V, VGS = 0) IDSS 5.0 mAdc
Gate–Body Leakage Current (VGS = 20 V, VDS = 0) IGSS 1.0 µAdc
ON CHARACTERISTICS
Gate Threshold Voltage (VDS = 10 V, ID = 100 mA) VGS(th) 1.0 3.0 5.0 Vdc
Drain–Source On–V oltage (VGS = 10 V, ID = 10 A) VDS(on) 1.0 3.0 5.0 Vdc
Forward T ransconductance (VDS = 10 V, ID = 5.0 A) gfs 5.0 7.0 mhos
DYNAMIC CHARACTERISTICS
Input Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Ciss 350 pF
Output Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Coss 220 pF
Reverse Transfer Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Crss 15 pF
FUNCTIONAL TESTS
Common Source Amplifier Power Gain, f = 30; 30.001 MHz
(VDD = 50 V, Pout = 150 W (PEP), IDQ = 250 mA) f = 175 MHz Gps 18
22
13
dB
Drain Efficiency
(VDD = 50 V, Pout = 150 W (PEP), f = 30; 30.001 MHz,
ID (Max) = 3.75 A)
η40 45 %
Intermodulation Distortion (1)
(VDD = 50 V, Pout = 150 W (PEP), f = 30 MHz,
f2 = 30.001 MHz, IDQ = 250 mA) IMD(d3)
IMD(d11)
–32
–60 –30
dB
Load Mismatch
(VDD = 50 V, Pout = 150 W (PEP), f1 = 30; 30.001 MHz,
IDQ = 250 mA, VSWR 30:1 at all Phase Angles)
ψNo Degradation in Output Power
CLASS A PERFORMANCE
Intermodulation Distortion (1) and Power Gain
(VDD = 50 V, Pout = 50 W (PEP), f1 = 30 MHz,
f2 = 30.001 MHz, IDQ = 3.0 A)
GPS
IMD(d3)
IMD(d913)
23
–50
–75
dB
NOTE:
1. To MIL–STD–1311 V ersion A, Test Method 2204B, Two Tone, Reference Each Tone.
Figure 1. 30 MHz Test Circuit
C1 — 470 pF Dipped Mica
C2, C5, C6, C7, C8, C9 — 0.1 µF Ceramic Chip or
Monolythic with Short Leads
C3 — 200 pF Unencapsulated Mica or Dipped Mica
with Short Leads
C4 — 15 pF Unencapsulated Mica or Dipped Mica
with Short Leads
C10 — 10 µF/100 V Electrolytic
L1 — VK200/4B Ferrite Choke or Equivalent, 3.0 µH
L2 — Ferrite Bead(s), 2.0 µH
R1, R2 — 51 /1.0 W Carbon
R3 — 3.3 /1.0 W Carbon (or 2.0 x 6.8 /1/2 W in Parallel)
T1 — 9:1 Broadband Transformer Communication Concepts, Inc. RF800-9 material 43 or equiv.
T2 — 1:9 Broadband Transformer
Board Material — 0.062 Fiberglass (G10),
1 oz. Copper Clad, 2 Sides,
e
r = 5
BIAS
0–12 V +
+
C5 C6 C7 C8 C9 C10 50 V
C4
T2
D.U.T.
R3
T1 C2
R2
C1 C3
L1
RF
INPUT
L2 +
RF
OUTPUT
R1
2
REV 1
VGS, DRAIN-SOURCE VOLT AGE (NORMALIZED)
Figure 2. 175 MHz Test Circuit
Figure 3. Capacitance versus
Drain–Source Voltage
TYPICAL CHARACTERISTICS
Figure 4. Gate–Source Voltage versus
Case Temperature
BIAS
0–12 V
C1
C7
C9
C11
+50 V
L2
D.U.T.
L1
R2
L4
RF INPUT C8
+
RF OUTPUT
R1
C4 C5
C2 C3
+
C6
C10
L3
RFC2
1000
500
200
100
50
0
20
0 1020304050
C, CAPACIT ANCE (pF)
VDS, DRAIN–SOURCE VOLT AGE (VOLTS)
1.04
0.925 0 25 50 75 100
TC, CASE TEMPERATURE (°C)
1.03
1.02
1.01
1
0.99
0.98
0.97
0.96
0.95
0.94
0.93
0.92
0.91
Ciss
Coss
Crss
1D = 5 A
4 A
2 A
1 A
250 mA
100 mA
C1, C2, C8 — Arco 463 or equivalent
C3 — 25 pF, Unelco
C4 — 0.1 µF, Ceramic
C5 — 1.0 µF, 15 WV Tantalum
C6 — 15 pF, Unelco J101
C7 — 25 pF, Unelco J101
C9 — Arco 262 or equivalent
C10 — 0.05 µF, Ceramic
C11 — 15 µF, 60 WV Electrolytic
D1 — 1N5347 Zener Diode
L1 — 3/4, #18 A WG into Hairpin
L2 — Printed Line, 0.200 x 0.500
L3 — 1, #16 A WG into Hairpin
L4 — 2 T urns, #16 AWG, 5/16 ID
RFC1 — 5.6 µH, Choke
RFC2 — VK200–4B
R1 — 150 , 1.0 W Carbon
R2 — 10 k, 1/2 W Carbon
R3 — 120 , 1/2 W Carbon
Board Material — 0.062 Fiberglass (G10),
1 oz. Copper Clad, 2 Sides, εr = 5.0
R3
3
REV 1
Figure 5. DC Safe Operating Area Figure 6. Common Source Unity Gain Frequency
versus Drain Current
Figure 7. Power Gain versus Frequency Figure 8. Output Power versus Input Power
Figure 9. IMD versus Pout
100
10
12 20 200
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
2000
00 4 8 12 16 20
ID, DRAIN CURRENT (AMPS)
1000
VDS = 30 V
ID, DRAIN CURRENT (AMPS)
2 6 10 14 18
VDS = 15 V
TC = 25°C
30
52 5 10 30 100 200
f, FREQUENCY (MHz)
VDD = 50 V
IDQ = 250 mA
Pout = 150 W
25
20
15
10
300
0012345
Pin, INPUT POWER (W ATTS)
200
100
00 5 10 15 20 25
300
200
100 f = 30 MHz
IDQ = 250 mA
f = 175 MHz
IDQ = 250 mA
VDD = 50 V
VDD = 50 V
40 V
25
55 0 40 80 120 160 200
Pout, OUTPUT POWER (WATTS PEP)
35
45
55
25
35
45
IDQ = 250 mA
IDQ = 500 mA
d3
d5
d3
d5
20 60 100 140 180
VDD = 50 V, f = 30 MHz, TONE SEPARATION = 1 kHz
GPS, POWER GAIN (dB)
Pout, OUTPUT POWER (WATTS) fT, UNITY GAIN FREQUENCY (MHz)
IMD, INTERMODULA TION DISTOR TION
TYPICAL CHARACTERISTICS
4
REV 1
Figure 10. Series Equivalent Impedance
150
30
7.5
4
2
ZOL*
Zin
15
f = 175 MHz
100
30
15 7.5 Zo = 10
VDD = 50 V
IDQ = 250 mA
Pout = 150 W
ZOL* = Conjugate of the optimum load impedance
ZOL* = into which the device output operates at a
ZOL* = given output power, voltage and frequency .
f = 175 MHz
150
100
4
2
NOTE: Gate Shunted by 25 Ohms.
Table 1. Common Source S–Parameters (VDS = 50 V, ID = 2 A)
f
S11 S21 S12 S22
f
MHz |S11|φ|S21|φ|S12|φ|S22|φ
ÁÁÁÁÁ
ÁÁÁÁÁ
30
ÁÁÁÁÁ
ÁÁÁÁÁ
0.877
ÁÁÁÁ
ÁÁÁÁ
–174
ÁÁÁÁÁ
ÁÁÁÁÁ
10.10
ÁÁÁÁÁ
ÁÁÁÁÁ
77
ÁÁÁÁ
ÁÁÁÁ
0.008
ÁÁÁÁÁ
ÁÁÁÁÁ
19
ÁÁÁÁ
ÁÁÁÁ
0.707
ÁÁÁÁÁ
ÁÁÁÁÁ
–169
ÁÁÁÁÁ
ÁÁÁÁÁ
40
ÁÁÁÁÁ
ÁÁÁÁÁ
0.886
ÁÁÁÁ
ÁÁÁÁ
–175
ÁÁÁÁÁ
ÁÁÁÁÁ
7.47
ÁÁÁÁÁ
ÁÁÁÁÁ
69
ÁÁÁÁ
ÁÁÁÁ
0.009
ÁÁÁÁÁ
ÁÁÁÁÁ
24
ÁÁÁÁ
ÁÁÁÁ
0.715
ÁÁÁÁÁ
ÁÁÁÁÁ
–172
ÁÁÁÁÁ
ÁÁÁÁÁ
50
ÁÁÁÁÁ
ÁÁÁÁÁ
0.895
ÁÁÁÁ
ÁÁÁÁ
–175
ÁÁÁÁÁ
ÁÁÁÁÁ
5.76
ÁÁÁÁÁ
ÁÁÁÁÁ
63
ÁÁÁÁ
ÁÁÁÁ
0.008
ÁÁÁÁÁ
ÁÁÁÁÁ
33
ÁÁÁÁ
ÁÁÁÁ
0.756
ÁÁÁÁÁ
ÁÁÁÁÁ
–171
ÁÁÁÁÁ
ÁÁÁÁÁ
60
ÁÁÁÁÁ
ÁÁÁÁÁ
0.902
ÁÁÁÁ
ÁÁÁÁ
–176
ÁÁÁÁÁ
ÁÁÁÁÁ
4.73
ÁÁÁÁÁ
ÁÁÁÁÁ
58
ÁÁÁÁ
ÁÁÁÁ
0.009
ÁÁÁÁÁ
ÁÁÁÁÁ
39
ÁÁÁÁ
ÁÁÁÁ
0.764
ÁÁÁÁÁ
ÁÁÁÁÁ
–171
ÁÁÁÁÁ
ÁÁÁÁÁ
70
ÁÁÁÁÁ
ÁÁÁÁÁ
0.912
ÁÁÁÁ
ÁÁÁÁ
–176
ÁÁÁÁÁ
ÁÁÁÁÁ
3.86
ÁÁÁÁÁ
ÁÁÁÁÁ
52
ÁÁÁÁ
ÁÁÁÁ
0.009
ÁÁÁÁÁ
ÁÁÁÁÁ
46
ÁÁÁÁ
ÁÁÁÁ
0.784
ÁÁÁÁÁ
ÁÁÁÁÁ
–172
ÁÁÁÁÁ
ÁÁÁÁÁ
80
ÁÁÁÁÁ
ÁÁÁÁÁ
0.918
ÁÁÁÁ
ÁÁÁÁ
–177
ÁÁÁÁÁ
ÁÁÁÁÁ
3.19
ÁÁÁÁÁ
ÁÁÁÁÁ
48
ÁÁÁÁ
ÁÁÁÁ
0.010
ÁÁÁÁÁ
ÁÁÁÁÁ
54
ÁÁÁÁ
ÁÁÁÁ
0.802
ÁÁÁÁÁ
ÁÁÁÁÁ
–171
ÁÁÁÁÁ
ÁÁÁÁÁ
90
ÁÁÁÁÁ
ÁÁÁÁÁ
0.925
ÁÁÁÁ
ÁÁÁÁ
–177
ÁÁÁÁÁ
ÁÁÁÁÁ
2.69
ÁÁÁÁÁ
ÁÁÁÁÁ
45
ÁÁÁÁ
ÁÁÁÁ
0.011
ÁÁÁÁÁ
ÁÁÁÁÁ
62
ÁÁÁÁ
ÁÁÁÁ
0.808
ÁÁÁÁÁ
ÁÁÁÁÁ
–171
ÁÁÁÁÁ
ÁÁÁÁÁ
100
ÁÁÁÁÁ
ÁÁÁÁÁ
0.932
ÁÁÁÁ
ÁÁÁÁ
–177
ÁÁÁÁÁ
ÁÁÁÁÁ
2.34
ÁÁÁÁÁ
ÁÁÁÁÁ
40
ÁÁÁÁ
ÁÁÁÁ
0.013
ÁÁÁÁÁ
ÁÁÁÁÁ
67
ÁÁÁÁ
ÁÁÁÁ
0.850
ÁÁÁÁÁ
ÁÁÁÁÁ
–173
ÁÁÁÁÁ
ÁÁÁÁÁ
110
ÁÁÁÁÁ
ÁÁÁÁÁ
0.936
ÁÁÁÁ
ÁÁÁÁ
–178
ÁÁÁÁÁ
ÁÁÁÁÁ
2.06
ÁÁÁÁÁ
ÁÁÁÁÁ
37
ÁÁÁÁ
ÁÁÁÁ
0.014
ÁÁÁÁÁ
ÁÁÁÁÁ
72
ÁÁÁÁ
ÁÁÁÁ
0.865
ÁÁÁÁÁ
ÁÁÁÁÁ
–175
ÁÁÁÁÁ
ÁÁÁÁÁ
120
ÁÁÁÁÁ
ÁÁÁÁÁ
0.942
ÁÁÁÁ
ÁÁÁÁ
–178
ÁÁÁÁÁ
ÁÁÁÁÁ
1.77
ÁÁÁÁÁ
ÁÁÁÁÁ
35
ÁÁÁÁ
ÁÁÁÁ
0.015
ÁÁÁÁÁ
ÁÁÁÁÁ
76
ÁÁÁÁ
ÁÁÁÁ
0.875
ÁÁÁÁÁ
ÁÁÁÁÁ
–173
ÁÁÁÁÁ
ÁÁÁÁÁ
130
ÁÁÁÁÁ
ÁÁÁÁÁ
0.946
ÁÁÁÁ
ÁÁÁÁ
–179
ÁÁÁÁÁ
ÁÁÁÁÁ
1.55
ÁÁÁÁÁ
ÁÁÁÁÁ
32
ÁÁÁÁ
ÁÁÁÁ
0.017
ÁÁÁÁÁ
ÁÁÁÁÁ
77
ÁÁÁÁ
ÁÁÁÁ
0.874
ÁÁÁÁÁ
ÁÁÁÁÁ
–172
ÁÁÁÁÁ
ÁÁÁÁÁ
140
ÁÁÁÁÁ
ÁÁÁÁÁ
0.950
ÁÁÁÁ
ÁÁÁÁ
–179
ÁÁÁÁÁ
ÁÁÁÁÁ
1.39
ÁÁÁÁÁ
ÁÁÁÁÁ
30
ÁÁÁÁ
ÁÁÁÁ
0.019
ÁÁÁÁÁ
ÁÁÁÁÁ
77
ÁÁÁÁ
ÁÁÁÁ
0.884
ÁÁÁÁÁ
ÁÁÁÁÁ
–174
ÁÁÁÁÁ
ÁÁÁÁÁ
150
ÁÁÁÁÁ
ÁÁÁÁÁ
0.954
ÁÁÁÁ
ÁÁÁÁ
–180
ÁÁÁÁÁ
ÁÁÁÁÁ
1.23
ÁÁÁÁÁ
ÁÁÁÁÁ
27
ÁÁÁÁ
ÁÁÁÁ
0.021
ÁÁÁÁÁ
ÁÁÁÁÁ
78
ÁÁÁÁ
ÁÁÁÁ
0.909
ÁÁÁÁÁ
ÁÁÁÁÁ
–175
ÁÁÁÁÁ
ÁÁÁÁÁ
160
ÁÁÁÁÁ
ÁÁÁÁÁ
0.957
ÁÁÁÁ
ÁÁÁÁ
–180
ÁÁÁÁÁ
ÁÁÁÁÁ
1.13
ÁÁÁÁÁ
ÁÁÁÁÁ
24
ÁÁÁÁ
ÁÁÁÁ
0.023
ÁÁÁÁÁ
ÁÁÁÁÁ
79
ÁÁÁÁ
ÁÁÁÁ
0.911
ÁÁÁÁÁ
ÁÁÁÁÁ
–176
ÁÁÁÁÁ
ÁÁÁÁÁ
170
ÁÁÁÁÁ
ÁÁÁÁÁ
0.960
ÁÁÁÁ
ÁÁÁÁ
180
ÁÁÁÁÁ
ÁÁÁÁÁ
1.01
ÁÁÁÁÁ
ÁÁÁÁÁ
22
ÁÁÁÁ
ÁÁÁÁ
0.024
ÁÁÁÁÁ
ÁÁÁÁÁ
82
ÁÁÁÁ
ÁÁÁÁ
0.904
ÁÁÁÁÁ
ÁÁÁÁÁ
–177
ÁÁÁÁÁ
ÁÁÁÁÁ
180
ÁÁÁÁÁ
ÁÁÁÁÁ
0.962
ÁÁÁÁ
ÁÁÁÁ
179
ÁÁÁÁÁ
ÁÁÁÁÁ
0.90
ÁÁÁÁÁ
ÁÁÁÁÁ
20
ÁÁÁÁ
ÁÁÁÁ
0.026
ÁÁÁÁÁ
ÁÁÁÁÁ
82
ÁÁÁÁ
ÁÁÁÁ
0.931
ÁÁÁÁÁ
ÁÁÁÁÁ
–176
ÁÁÁÁÁ
ÁÁÁÁÁ
190
ÁÁÁÁÁ
ÁÁÁÁÁ
0.964
ÁÁÁÁ
ÁÁÁÁ
179
ÁÁÁÁÁ
ÁÁÁÁÁ
0.84
ÁÁÁÁÁ
ÁÁÁÁÁ
19
ÁÁÁÁ
ÁÁÁÁ
0.028
ÁÁÁÁÁ
ÁÁÁÁÁ
80
ÁÁÁÁ
ÁÁÁÁ
0.929
ÁÁÁÁÁ
ÁÁÁÁÁ
–178
ÁÁÁÁÁ
ÁÁÁÁÁ
200
ÁÁÁÁÁ
ÁÁÁÁÁ
0.967
ÁÁÁÁ
ÁÁÁÁ
179
ÁÁÁÁÁ
ÁÁÁÁÁ
0.75
ÁÁÁÁÁ
ÁÁÁÁÁ
18
ÁÁÁÁ
ÁÁÁÁ
0.030
ÁÁÁÁÁ
ÁÁÁÁÁ
79
ÁÁÁÁ
ÁÁÁÁ
0.922
ÁÁÁÁÁ
ÁÁÁÁÁ
–179
ÁÁÁÁÁ
ÁÁÁÁÁ
210
ÁÁÁÁÁ
ÁÁÁÁÁ
0.967
ÁÁÁÁ
ÁÁÁÁ
178
ÁÁÁÁÁ
ÁÁÁÁÁ
0.71
ÁÁÁÁÁ
ÁÁÁÁÁ
16
ÁÁÁÁ
ÁÁÁÁ
0.032
ÁÁÁÁÁ
ÁÁÁÁÁ
80
ÁÁÁÁ
ÁÁÁÁ
0.937
ÁÁÁÁÁ
ÁÁÁÁÁ
–180
ÁÁÁÁÁ
ÁÁÁÁÁ
220
ÁÁÁÁÁ
ÁÁÁÁÁ
0.969
ÁÁÁÁ
ÁÁÁÁ
178
ÁÁÁÁÁ
ÁÁÁÁÁ
0.67
ÁÁÁÁÁ
ÁÁÁÁÁ
14
ÁÁÁÁ
ÁÁÁÁ
0.035
ÁÁÁÁÁ
ÁÁÁÁÁ
82
ÁÁÁÁ
ÁÁÁÁ
0.949
ÁÁÁÁÁ
ÁÁÁÁÁ
180
ÁÁÁÁÁ
ÁÁÁÁÁ
230
ÁÁÁÁÁ
ÁÁÁÁÁ
0.971
ÁÁÁÁ
ÁÁÁÁ
178
ÁÁÁÁÁ
ÁÁÁÁÁ
0.60
ÁÁÁÁÁ
ÁÁÁÁÁ
12
ÁÁÁÁ
ÁÁÁÁ
0.038
ÁÁÁÁÁ
ÁÁÁÁÁ
81
ÁÁÁÁ
ÁÁÁÁ
0.950
ÁÁÁÁÁ
ÁÁÁÁÁ
179
ÁÁÁÁÁ
ÁÁÁÁÁ
240
ÁÁÁÁÁ
ÁÁÁÁÁ
0.970
ÁÁÁÁ
ÁÁÁÁ
177
ÁÁÁÁÁ
ÁÁÁÁÁ
0.57
ÁÁÁÁÁ
ÁÁÁÁÁ
12
ÁÁÁÁ
ÁÁÁÁ
0.037
ÁÁÁÁÁ
ÁÁÁÁÁ
80
ÁÁÁÁ
ÁÁÁÁ
0.950
ÁÁÁÁÁ
ÁÁÁÁÁ
179
5
REV 1
Table 1. Common Source S–Parameters (VDS = 50 V, ID = 2 A) continued
f
S11 S21 S12 S22
f
MHz |S11|φ|S21|φ|S12|φ|S22|φ
ÁÁÁÁÁ
ÁÁÁÁÁ
250
ÁÁÁÁÁ
ÁÁÁÁÁ
0.972
ÁÁÁÁ
ÁÁÁÁ
177
ÁÁÁÁÁ
ÁÁÁÁÁ
0.51
ÁÁÁÁÁ
ÁÁÁÁÁ
12
ÁÁÁÁ
ÁÁÁÁ
0.039
ÁÁÁÁÁ
ÁÁÁÁÁ
80
ÁÁÁÁ
ÁÁÁÁ
0.935
ÁÁÁÁÁ
ÁÁÁÁÁ
179
ÁÁÁÁÁ
ÁÁÁÁÁ
260
ÁÁÁÁÁ
ÁÁÁÁÁ
0.973
ÁÁÁÁ
ÁÁÁÁ
177
ÁÁÁÁÁ
ÁÁÁÁÁ
0.47
ÁÁÁÁÁ
ÁÁÁÁÁ
11
ÁÁÁÁ
ÁÁÁÁ
0.041
ÁÁÁÁÁ
ÁÁÁÁÁ
79
ÁÁÁÁ
ÁÁÁÁ
0.954
ÁÁÁÁÁ
ÁÁÁÁÁ
178
ÁÁÁÁÁ
ÁÁÁÁÁ
270
ÁÁÁÁÁ
ÁÁÁÁÁ
0.972
ÁÁÁÁ
ÁÁÁÁ
176
ÁÁÁÁÁ
ÁÁÁÁÁ
0.45
ÁÁÁÁÁ
ÁÁÁÁÁ
9
ÁÁÁÁ
ÁÁÁÁ
0.044
ÁÁÁÁÁ
ÁÁÁÁÁ
80
ÁÁÁÁ
ÁÁÁÁ
0.953
ÁÁÁÁÁ
ÁÁÁÁÁ
176
ÁÁÁÁÁ
ÁÁÁÁÁ
280
ÁÁÁÁÁ
ÁÁÁÁÁ
0.974
ÁÁÁÁ
ÁÁÁÁ
176
ÁÁÁÁÁ
ÁÁÁÁÁ
0.41
ÁÁÁÁÁ
ÁÁÁÁÁ
9
ÁÁÁÁ
ÁÁÁÁ
0.046
ÁÁÁÁÁ
ÁÁÁÁÁ
80
ÁÁÁÁ
ÁÁÁÁ
0.965
ÁÁÁÁÁ
ÁÁÁÁÁ
175
ÁÁÁÁÁ
ÁÁÁÁÁ
290
ÁÁÁÁÁ
ÁÁÁÁÁ
0.974
ÁÁÁÁ
ÁÁÁÁ
176
ÁÁÁÁÁ
ÁÁÁÁÁ
0.40
ÁÁÁÁÁ
ÁÁÁÁÁ
6
ÁÁÁÁ
ÁÁÁÁ
0.046
ÁÁÁÁÁ
ÁÁÁÁÁ
79
ÁÁÁÁ
ÁÁÁÁ
0.944
ÁÁÁÁÁ
ÁÁÁÁÁ
175
ÁÁÁÁÁ
ÁÁÁÁÁ
300
ÁÁÁÁÁ
ÁÁÁÁÁ
0.975
ÁÁÁÁ
ÁÁÁÁ
176
ÁÁÁÁÁ
ÁÁÁÁÁ
0.39
ÁÁÁÁÁ
ÁÁÁÁÁ
10
ÁÁÁÁ
ÁÁÁÁ
0.048
ÁÁÁÁÁ
ÁÁÁÁÁ
82
ÁÁÁÁ
ÁÁÁÁ
0.929
ÁÁÁÁÁ
ÁÁÁÁÁ
176
ÁÁÁÁÁ
ÁÁÁÁÁ
310
ÁÁÁÁÁ
ÁÁÁÁÁ
0.976
ÁÁÁÁ
ÁÁÁÁ
175
ÁÁÁÁÁ
ÁÁÁÁÁ
0.36
ÁÁÁÁÁ
ÁÁÁÁÁ
9
ÁÁÁÁ
ÁÁÁÁ
0.049
ÁÁÁÁÁ
ÁÁÁÁÁ
82
ÁÁÁÁ
ÁÁÁÁ
0.943
ÁÁÁÁÁ
ÁÁÁÁÁ
176
ÁÁÁÁÁ
ÁÁÁÁÁ
320
ÁÁÁÁÁ
ÁÁÁÁÁ
0.974
ÁÁÁÁ
ÁÁÁÁ
175
ÁÁÁÁÁ
ÁÁÁÁÁ
0.33
ÁÁÁÁÁ
ÁÁÁÁÁ
7
ÁÁÁÁ
ÁÁÁÁ
0.053
ÁÁÁÁÁ
ÁÁÁÁÁ
78
ÁÁÁÁ
ÁÁÁÁ
0.954
ÁÁÁÁÁ
ÁÁÁÁÁ
173
ÁÁÁÁÁ
ÁÁÁÁÁ
330
ÁÁÁÁÁ
ÁÁÁÁÁ
0.975
ÁÁÁÁ
ÁÁÁÁ
174
ÁÁÁÁÁ
ÁÁÁÁÁ
0.31
ÁÁÁÁÁ
ÁÁÁÁÁ
4
ÁÁÁÁ
ÁÁÁÁ
0.056
ÁÁÁÁÁ
ÁÁÁÁÁ
78
ÁÁÁÁ
ÁÁÁÁ
0.935
ÁÁÁÁÁ
ÁÁÁÁÁ
172
ÁÁÁÁÁ
ÁÁÁÁÁ
340
ÁÁÁÁÁ
ÁÁÁÁÁ
0.976
ÁÁÁÁ
ÁÁÁÁ
174
ÁÁÁÁÁ
ÁÁÁÁÁ
0.30
ÁÁÁÁÁ
ÁÁÁÁÁ
10
ÁÁÁÁ
ÁÁÁÁ
0.056
ÁÁÁÁÁ
ÁÁÁÁÁ
77
ÁÁÁÁ
ÁÁÁÁ
0.948
ÁÁÁÁÁ
ÁÁÁÁÁ
172
ÁÁÁÁÁ
ÁÁÁÁÁ
350
ÁÁÁÁÁ
ÁÁÁÁÁ
0.975
ÁÁÁÁ
ÁÁÁÁ
174
ÁÁÁÁÁ
ÁÁÁÁÁ
0.29
ÁÁÁÁÁ
ÁÁÁÁÁ
7
ÁÁÁÁ
ÁÁÁÁ
0.058
ÁÁÁÁÁ
ÁÁÁÁÁ
80
ÁÁÁÁ
ÁÁÁÁ
0.950
ÁÁÁÁÁ
ÁÁÁÁÁ
174
ÁÁÁÁÁ
ÁÁÁÁÁ
360
ÁÁÁÁÁ
ÁÁÁÁÁ
0.977
ÁÁÁÁ
ÁÁÁÁ
174
ÁÁÁÁÁ
ÁÁÁÁÁ
0.28
ÁÁÁÁÁ
ÁÁÁÁÁ
8
ÁÁÁÁ
ÁÁÁÁ
0.059
ÁÁÁÁÁ
ÁÁÁÁÁ
79
ÁÁÁÁ
ÁÁÁÁ
0.978
ÁÁÁÁÁ
ÁÁÁÁÁ
172
ÁÁÁÁÁ
ÁÁÁÁÁ
370
ÁÁÁÁÁ
ÁÁÁÁÁ
0.976
ÁÁÁÁ
ÁÁÁÁ
173
ÁÁÁÁÁ
ÁÁÁÁÁ
0.26
ÁÁÁÁÁ
ÁÁÁÁÁ
8
ÁÁÁÁ
ÁÁÁÁ
0.061
ÁÁÁÁÁ
ÁÁÁÁÁ
76
ÁÁÁÁ
ÁÁÁÁ
0.981
ÁÁÁÁÁ
ÁÁÁÁÁ
170
ÁÁÁÁÁ
ÁÁÁÁÁ
380
ÁÁÁÁÁ
ÁÁÁÁÁ
0.976
ÁÁÁÁ
ÁÁÁÁ
173
ÁÁÁÁÁ
ÁÁÁÁÁ
0.26
ÁÁÁÁÁ
ÁÁÁÁÁ
7
ÁÁÁÁ
ÁÁÁÁ
0.065
ÁÁÁÁÁ
ÁÁÁÁÁ
75
ÁÁÁÁ
ÁÁÁÁ
0.944
ÁÁÁÁÁ
ÁÁÁÁÁ
171
ÁÁÁÁÁ
ÁÁÁÁÁ
390
ÁÁÁÁÁ
ÁÁÁÁÁ
0.977
ÁÁÁÁ
ÁÁÁÁ
173
ÁÁÁÁÁ
ÁÁÁÁÁ
0.24
ÁÁÁÁÁ
ÁÁÁÁÁ
10
ÁÁÁÁ
ÁÁÁÁ
0.066
ÁÁÁÁÁ
ÁÁÁÁÁ
76
ÁÁÁÁ
ÁÁÁÁ
0.960
ÁÁÁÁÁ
ÁÁÁÁÁ
171
ÁÁÁÁÁ
ÁÁÁÁÁ
400
ÁÁÁÁÁ
ÁÁÁÁÁ
0.976
ÁÁÁÁ
ÁÁÁÁ
172
ÁÁÁÁÁ
ÁÁÁÁÁ
0.23
ÁÁÁÁÁ
ÁÁÁÁÁ
7
ÁÁÁÁ
ÁÁÁÁ
0.068
ÁÁÁÁÁ
ÁÁÁÁÁ
80
ÁÁÁÁ
ÁÁÁÁ
0.955
ÁÁÁÁÁ
ÁÁÁÁÁ
173
ÁÁÁÁÁ
ÁÁÁÁÁ
410
ÁÁÁÁÁ
ÁÁÁÁÁ
0.976
ÁÁÁÁ
ÁÁÁÁ
172
ÁÁÁÁÁ
ÁÁÁÁÁ
0.22
ÁÁÁÁÁ
ÁÁÁÁÁ
9
ÁÁÁÁ
ÁÁÁÁ
0.071
ÁÁÁÁÁ
ÁÁÁÁÁ
77
ÁÁÁÁ
ÁÁÁÁ
0.999
ÁÁÁÁÁ
ÁÁÁÁÁ
170
ÁÁÁÁÁ
ÁÁÁÁÁ
420
ÁÁÁÁÁ
ÁÁÁÁÁ
0.977
ÁÁÁÁ
ÁÁÁÁ
172
ÁÁÁÁÁ
ÁÁÁÁÁ
0.21
ÁÁÁÁÁ
ÁÁÁÁÁ
9
ÁÁÁÁ
ÁÁÁÁ
0.071
ÁÁÁÁÁ
ÁÁÁÁÁ
76
ÁÁÁÁ
ÁÁÁÁ
0.962
ÁÁÁÁÁ
ÁÁÁÁÁ
168
ÁÁÁÁÁ
ÁÁÁÁÁ
430
ÁÁÁÁÁ
ÁÁÁÁÁ
0.976
ÁÁÁÁ
ÁÁÁÁ
171
ÁÁÁÁÁ
ÁÁÁÁÁ
0.19
ÁÁÁÁÁ
ÁÁÁÁÁ
10
ÁÁÁÁ
ÁÁÁÁ
0.073
ÁÁÁÁÁ
ÁÁÁÁÁ
76
ÁÁÁÁ
ÁÁÁÁ
0.950
ÁÁÁÁÁ
ÁÁÁÁÁ
168
ÁÁÁÁÁ
ÁÁÁÁÁ
440
ÁÁÁÁÁ
ÁÁÁÁÁ
0.976
ÁÁÁÁ
ÁÁÁÁ
171
ÁÁÁÁÁ
ÁÁÁÁÁ
0.20
ÁÁÁÁÁ
ÁÁÁÁÁ
12
ÁÁÁÁ
ÁÁÁÁ
0.075
ÁÁÁÁÁ
ÁÁÁÁÁ
75
ÁÁÁÁ
ÁÁÁÁ
0.953
ÁÁÁÁÁ
ÁÁÁÁÁ
168
ÁÁÁÁÁ
ÁÁÁÁÁ
450
ÁÁÁÁÁ
ÁÁÁÁÁ
0.978
ÁÁÁÁ
ÁÁÁÁ
171
ÁÁÁÁÁ
ÁÁÁÁÁ
0.19
ÁÁÁÁÁ
ÁÁÁÁÁ
10
ÁÁÁÁ
ÁÁÁÁ
0.080
ÁÁÁÁÁ
ÁÁÁÁÁ
77
ÁÁÁÁ
ÁÁÁÁ
0.982
ÁÁÁÁÁ
ÁÁÁÁÁ
168
ÁÁÁÁÁ
ÁÁÁÁÁ
460
ÁÁÁÁÁ
ÁÁÁÁÁ
0.978
ÁÁÁÁ
ÁÁÁÁ
170
ÁÁÁÁÁ
ÁÁÁÁÁ
0.18
ÁÁÁÁÁ
ÁÁÁÁÁ
13
ÁÁÁÁ
ÁÁÁÁ
0.082
ÁÁÁÁÁ
ÁÁÁÁÁ
74
ÁÁÁÁ
ÁÁÁÁ
0.990
ÁÁÁÁÁ
ÁÁÁÁÁ
165
ÁÁÁÁÁ
ÁÁÁÁÁ
470
ÁÁÁÁÁ
ÁÁÁÁÁ
0.978
ÁÁÁÁ
ÁÁÁÁ
170
ÁÁÁÁÁ
ÁÁÁÁÁ
0.18
ÁÁÁÁÁ
ÁÁÁÁÁ
10
ÁÁÁÁ
ÁÁÁÁ
0.081
ÁÁÁÁÁ
ÁÁÁÁÁ
77
ÁÁÁÁ
ÁÁÁÁ
0.953
ÁÁÁÁÁ
ÁÁÁÁÁ
168
ÁÁÁÁÁ
ÁÁÁÁÁ
480
ÁÁÁÁÁ
ÁÁÁÁÁ
0.974
ÁÁÁÁ
ÁÁÁÁ
170
ÁÁÁÁÁ
ÁÁÁÁÁ
0.18
ÁÁÁÁÁ
ÁÁÁÁÁ
13
ÁÁÁÁ
ÁÁÁÁ
0.085
ÁÁÁÁÁ
ÁÁÁÁÁ
78
ÁÁÁÁ
ÁÁÁÁ
0.944
ÁÁÁÁÁ
ÁÁÁÁÁ
167
ÁÁÁÁÁ
ÁÁÁÁÁ
490
ÁÁÁÁÁ
ÁÁÁÁÁ
0.973
ÁÁÁÁ
ÁÁÁÁ
169
ÁÁÁÁÁ
ÁÁÁÁÁ
0.17
ÁÁÁÁÁ
ÁÁÁÁÁ
13
ÁÁÁÁ
ÁÁÁÁ
0.086
ÁÁÁÁÁ
ÁÁÁÁÁ
75
ÁÁÁÁ
ÁÁÁÁ
0.966
ÁÁÁÁÁ
ÁÁÁÁÁ
165
ÁÁÁÁÁ
ÁÁÁÁÁ
500
ÁÁÁÁÁ
ÁÁÁÁÁ
0.972
ÁÁÁÁ
ÁÁÁÁ
169
ÁÁÁÁÁ
ÁÁÁÁÁ
0.17
ÁÁÁÁÁ
ÁÁÁÁÁ
14
ÁÁÁÁ
ÁÁÁÁ
0.089
ÁÁÁÁÁ
ÁÁÁÁÁ
73
ÁÁÁÁ
ÁÁÁÁ
0.980
ÁÁÁÁÁ
ÁÁÁÁÁ
165
6
REV 1
RF POWER MOSFET CONSIDERATIONS
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between the terminals. The metal anode gate structure de-
termines the capacitors from gate–to–drain (Cgd), and gate–
to–source (Cgs). The PN junction formed during the
fabrication of the MOSFET results in a junction capacitance
from drain–to–source (Cds).
These capacitances are characterized as input (Ciss), out-
put (Coss) and reverse transfer (Crss) capacitances on data
sheets. The relationships between the inter–terminal capaci-
tances and those given on data sheets are shown below . The
Ciss can be specified in two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero
volts at the gate. In the latter case the numbers are lower.
However, neither method represents the actual operat-
ing conditions in RF applications.
Cgd
GATE
SOURCE
Cgs
DRAIN
Cds Ciss = Cgd = Cgs
Coss = Cgd = Cds
Crss = Cgd
LINEARITY AND GAIN CHARACTERISTICS
In addition to the typical IMD and power gain data pres-
ented, Figure 6 may give the designer additional information
on the capabilities of this device. The graph represents the
small signal unity current gain frequency at a given drain cur-
rent level. This is equivalent to fT for bipolar transistors.
Since this test is performed at a fast sweep speed, heating of
the device does not occur. Thus, in normal use, the higher
temperatures may degrade these characteristics to some ex-
tent.
DRAIN CHARACTERISTICS
One figure of merit for a FET is its static resistance in the
full–on condition. This on–resistance, VDS(on), occurs in the
linear region of the output characteristic and is specified un-
der specific test conditions for gate–source voltage and drain
current. For MOSFETs, VDS(on) has a positive temperature
coefficient and constitutes an important design consideration
at high temperatures, because it contributes to the power
dissipation within the device.
GATE CHARACTERISTICS
The gate of the MOSFET is a polysilicon material, and is
electrically isolated from the source by a layer of oxide. The
input resistance is very high — on the order of 109 ohms —
resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage
slightly in excess of the gate–to–source threshold voltage,
VGS(th).
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gate of this device is essentially
capacitor . Circuits that leave the gate open–circuited or float-
ing should be avoided. These conditions can result in turn–
on of the device due to voltage build–up on the input
capacitor due to leakage currents or pickup.
Gate Protection — This device does not have an internal
monolithic zener diode from gate–to–source. If gate protec-
tion is required, an external zener diode is recommended.
Using a resistor to keep the gate–to–source impedance
low also helps damp transients and serves another important
function. Voltage transients on the drain can be coupled to
the gate through the parasitic gate–drain capacitance. If the
gate–to–source impedance and the rate of voltage change
on the drain are both high, then the signal coupled to the gate
may be large enough to exceed the gate–threshold voltage
and turn the device on.
HANDLING CONSIDERATIONS
When shipping, the devices should be transported only in
antistatic bags or conductive foam. Upon removal from the
packaging, careful handling procedures should be adhered
to. Those handling the devices should wear grounding straps
and devices not in the antistatic packaging should be kept in
metal tote bins. MOSFETs should be handled by the case
and not by the leads, and when testing the device, all leads
should make good electrical contact before voltage is ap-
plied. As a final note, when placing the FET into the system it
is designed for, soldering should be done with a grounded
iron.
DESIGN CONSIDERATIONS
The MRF151A is an RF Power, MOS, N–channel enhance-
ment mode field–effect transistor (FET) designed for HF and
VHF power amplifier applications.
M/A-COM Application Note AN211A, FETs in Theory and
Practice, is suggested reading for those not familiar with the
construction and characteristics of FETs.
The major advantages of RF power MOSFETs include
high gain, low noise, simple bias systems, relative immunity
from thermal runaway, and the ability to withstand severely
mismatched loads without suffering damage. Power output
can be varied over a wide range with a low power dc control
signal.
DC BIAS
The MRF151A is an enhancement mode FET and, there-
fore, does not conduct when drain voltage is applied. Drain
current flows when a positive voltage is applied to the gate.
RF power FETs require forward bias for optimum perfor-
mance. The value of quiescent drain current (IDQ) is not criti-
cal for many applications. The MRF151A was characterized at
IDQ = 250 mA, each side, which is the suggested minimum
value of IDQ. For special applications such as linear amplifi-
cation, IDQ may have to be selected to optimize the critical
parameters.
The gate is a dc open circuit and draws no current. There-
fore, the gate bias circuit may be just a simple resistive divid-
er network. Some applications may require a more elaborate
bias system.
GAIN CONTROL
Power output of the MRF151A may be controlled from its
rated value down to zero (negative gain) by varying the dc
gate voltage. This feature facilitates the design of manual
gain control, AGC/ALC and modulation systems.
7
REV 1
PACKAGE DIMENSIONS
CASE P-244
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
A
UM
M
Q
RB
1
4
32
D
K
ESEATING
PLANE
C
J
H
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.960 0.990 24.39 25.14
B0.465 0.510 11.82 12.95
C0.229 0.275 5.82 6.98
D0.216 0.235 5.49 5.96
E0.084 0.110 2.14 2.79
H0.144 0.178 3.66 4.52
J0.003 0.007 0.08 0.17
K0.435 ––– 11.05 –––
M45 NOM 45 NOM
Q0.115 0.130 2.93 3.30
R0.246 0.255 6.25 6.47
U0.720 0.730 18.29 18.54
__
STYLE 2:
PIN 1. SOURCE
2. GATE
3. SOURCE
4. DRAIN
8
Specifications subject to change without notice.
n North America: Tel. (800) 366-2266, Fax (800) 618-8883
n Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298
n Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
Visit www.macom.com for additional data sheets and product information.
REV 1