02/25/11
IRLHS6342PbF
HEXFET® Power MOSFET
Notes through are on page 2
Features and Benefits
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Applications
• Charge and discharge switch for battery application
• System/Load Switch
Note
Form Quantit
y
IRLHS6342TRPBF PQFN 2mm x 2mm Ta
p
e and Reel 4000
IRLHS6342TR2PBF PQFN 2mm x 2mm Ta
p
e and Reel 400
Orderable part number Package Type Standard Pack
Features Resultin
g
Benefits
Low R
DSon
(≤ 15.5mΩ) Lower Conduction Losses
Low Thermal Resistance to PCB (≤ 13°C/W) Enable better thermal dissipation
Low Profile (≤ 1.0 mm) results in Increased Power Density
Compatible with Existing Surface Mount Techniques Easier Manufacturin
g
RoHS Compliant Containing no Lead, no Bromide and no Halogen Environmentally Friendlier
MSL1, Consumer Qualification Increased Reliability
2mm x 2mm PQFN
G
D
D
S
D
D
S
G 3 S
D2
D1
4S
5D
6D
TOP VIEW
D
D
V
DS
30 V
V
GS
±12 V
R
DS(on) max
(@V
GS
= 4.5V) 15.5 mΩ
Q
g (typical)
11 nC
I
D
(@T
C (Bottom)
= 25°C) 12
i
A
Absolute Maximum Ratings
Parameter Units
V
DS
Drain-to-Source Voltage
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 70°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C(Bottom)
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C(Bottom)
= 70°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C(Bottom)
= 25°C Continuous Drain Current, V
GS
@ 10V (Wirebond Limited)
I
DM
Pulsed Drain Current
c
P
D
@T
A
= 25°C Power Dissipation
g
P
D
@T
A
= 70°C Power Dissipation
g
Linear Deratin
g
Factor
g
W/°C
T
J
Operating Junction and
T
STG
Storage Temperature Range
-55 to + 150
2.1
0.02
1.3
Max.
8.7
15
hi
76
±12
30
6.9
19
hi
12
i
V
W
A
°C
PD - 96339A
IRLHS6342PbF
2www.irf.com
S
D
G
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 0.39mH, RG = 50Ω, IAS = 8.5A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Rθ is measured at TJ of approximately 90°C.
When mounted on 1 inch square 2 oz copper pad on 1.5x1.5 in. board of FR-4 material.
Calculated continuous current based on maximum allowable junction temperature.
Package is limited to 12A by die-source to lead-frame bonding technology
Th
erma
l R
es
i
stance
Parameter Typ. Max. Units
R
θJC
(Bottom) Junction-to-Case
g
––– 13
R
θJC
(Top) Junction-to-Case
g
––– 90 °C/W
R
θJA
Junction-to-Ambient
f
––– 60
R
θJA
Junction-to-Ambient (<10s)
f
––– 42
Static @ T
J
= 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
BV
DSS
Drain-to-Source Breakdown Voltage 30 ––– ––– V
∆ΒV
DSS
/∆T
J
Breakdown Voltage Temp. Coefficient ––– 22 ––– mV/°C
R
DS(on)
Static Drain-to-Source On-Resistance ––– 12.0 15.5
––– 15.0 19.5
V
GS(th)
Gate Threshold Voltage 0.5 ––– 1.1 V
∆V
GS(th)
Gate Threshold Voltage Coefficient ––– -4.2 ––– mV/°C
I
DSS
Drain-to-Source Leakage Current ––– ––– 1.0
––– ––– 150
I
GSS
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100
gfs Forward Transconductance 39 ––– ––– S
Q
g
Total Gate Charge ––– 11 ––– V
DS
= 15V
Q
gs
Gate-to-Source Charge ––– 0.5 –––
Q
gd
Gate-to-Drain Charge ––– 4.6 –––
R
G
Gate Resistance ––– 2.1 ––– Ω
t
d(on)
Turn-On Delay Time ––– 4.9 –––
t
r
Rise Time –––13–––
t
d(off)
Turn-Off Delay Time ––– 19 –––
t
f
Fall Time ––– 13 –––
C
iss
Input Capacitance ––– 1019 –––
C
oss
Output Capacitance ––– 97 –––
C
rss
Reverse Transfer Capacitance ––– 70 –––
Avalanche Characteristics
Parameter Units
E
AS
Sin
g
le Pulse Avalanche Ener
gy
d
mJ
I
AR
Avalanche Current
c
A
Diode Characteristics
Parameter Min. Typ. Max. Units
I
S
Continuous Source Current
(Body Diode)
I
SM
Pulsed Source Current
Bod
Diode
c
V
SD
Diode Forward Voltage ––– ––– 1.2 V
t
rr
Reverse Recovery Time ––– 11 17 ns
Q
rr
Reverse Recovery Charge ––– 13 20 nC
t
on
Forward Turn-On Time Time is dominated by parasitic Inductance
V
DS
= V
GS
, I
D
= 10µA
V
GS
= 2.5V, I
D
= 8.5A
e
Typ.
mΩ
V
DD
= 15V, V
GS
= 4.5V
–––
R
G
=1.8Ω
V
DS
= 10V, I
D
= 8.5A
V
DS
= 24V, V
GS
= 0V, T
J
= 125°C
µA
I
D
= 8.5A (See Fig. 6 & 17)
I
D
= 8.5A
V
GS
= 0V
V
DS
= 25V
V
DS
= 24V, V
GS
= 0V
T
J
= 25°C, I
F
= 8.5A, V
DD
= 15V
di/dt = 300 A/µs
e
T
J
= 25°C, I
S
= 8.5A, V
GS
= 0V
e
showing the
integral reverse
p-n junction diode.
Conditions
See Fig.18
Max.
14
8.5
ƒ = 1.0MHz
Conditions
V
GS
= 0V, I
D
= 250µA
Reference to 25°C, I
D
= 1mA
V
GS
= 4.5V, I
D
= 8.5A
e
––– ––– 76
––– ––– 12
i
MOSFET symbol
nA
ns
A
pF
nC V
GS
= 4.5V
–––
V
GS
= 12V
V
GS
= -12V
IRLHS6342PbF
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Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
1.0 1.5 2.0 2.5 3.0 3.5
VGS, Gate-to-Source Voltage (V)
1.0
10
100
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 150°C
VDS = 15V
≤60µs PULSE WIDTH
-60 -40 -20 020 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 8.5A
VGS = 4.5V
110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 5 10 15 20 25 30
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 24V
VDS= 15V
VDS= 6.0V
ID= 8.5A
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
ID, Drain-to-Source Current (A)
VGS
TOP 10V
4.5V
3.0V
2.5V
2.0V
1.8V
1.5V
BOTTOM 1.4V
≤60µs PULSE WIDTH
Tj = 25°C
1.4V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
ID, Drain-to-Source Current (A)
1.4V
≤60µs PULSE WIDTH
Tj = 150°C
VGS
TOP 10V
4.5V
3.0V
2.5V
2.0V
1.8V
1.5V
BOTTOM 1.4V
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)
Fig 8. Maximum Safe Operating Area
Fig 9. Maximum Drain Current vs.
Case (Bottom) Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 10. Threshold Voltage vs. Temperature
0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
VSD, Source-to-Drain Voltage (V)
1.0
10
100
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
0.01
0.1
1
10
100
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
-75 -50 -25 025 50 75 100 125 150
TJ , Temperature ( °C )
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VGS(th), Gate threshold Voltage (V)
ID = 10µA
ID = 25µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
25 50 75 100 125 150
TC , Case Temperature (°C)
0
2
4
6
8
10
12
14
16
18
20
ID, Drain Current (A)
Limited By Package
0 1 10 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
Tc = 25°C
Tj = 150°C
Single Pulse
100µsec
1msec
10msec
DC
Limited by
Wire Bond
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Fig 13. Typical On-Resistance vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
Fig 15. Typical Power vs. Time
Fig 14. Maximum Avalanche Energy vs. Drain Current
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
0
10
20
30
40
50
60
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 1.9A
3.4A
BOTTOM 8.5A
1E-5 1E-4 1E-3 1E-2 1E-1 1E+0
Time (sec)
0
100
200
300
400
500
600
Single Pulse Power (W)
0 2 4 6 8 10 12 14
VGS, Gate -to -Source Voltage (V)
5
10
15
20
25
30
RDS(on), Drain-to -Source On Resistance (mΩ)
ID = 8.5A
TJ = 125°C
TJ = 25°C
515 25 35 45 55 65 75
ID, Drain Current (A)
10
12
14
16
18
20
22
24
26
28
30
RDS(on), Drain-to -Source On Resistance (mΩ)
Vgs = 2.5V
Vgs = 4.5V
IRLHS6342PbF
6www.irf.com
Fig 18b. Unclamped Inductive Waveforms
Fig 18a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
Fig 19a. Switching Time Test Circuit Fig 19b. Switching Time Waveforms
VGS
VDS
90%
10%
td(on) td(off)
trtf
Fig 17a. Gate Charge Test Circuit Fig 17b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
1K
VCC
DUT
0
L
S
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
RD
VGS
RG
D.U.T.
10V
+
-
VDD
VGS
IRLHS6342PbF
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PQFN 2x2 Outline Package Details
For footprint and stencil design recommendations, please refer to application note AN-1154 at
http://www.irf.com/technical-info/appnotes/an-1154.pdf
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
PQFN 2x2 Outline Part Marking
IRLHS6342PbF
8www.irf.com
PQFN 2x2 Outline Tape and Reel
IRLHS6342PbF
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Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
 Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
 Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/2011
Data and specifications subject to change without notice.
MS L 1
(per JEDEC J-S T D-020D
†††
)
RoHS compliant Yes
PQFN 2mm x 2mm
Qualification information
†
Moisture Sensitivity Level
Qualification level Cons umer
††
(per JEDEC JES D47F
†††
guidelines )