July 2000
PRELIMINARY
2000 Fairchild Semiconductor Corporation FDN5618P Rev B(W)
FDN5618P
60V P-Channel Logic Level PowerTrench
MOSFET
General Description
This 60V P-Channel MOSFET uses Fairchild’s high
voltage PowerTrench process. It has been optimized for
power management applications.
Applications
• DC-DC converters
• Load switch
• Power management
Features
• –1.25 A, –60 V. RDS(ON) = 0.170 Ω @ VGS = –10 V
R
DS(ON) = 0.230 Ω @ VGS = –4.5 V
• Fast switching speed
• High performance trench technology for extremely
low RDS(ON)
G
D
S
SuperSOT -3
TM
D
S
G
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source Voltage –60 V
VGSS Gate-Source Voltage ±20 V
IDDrain Current – Continuous (Note 1a) –1.25 A
– Pulsed –10
Maximum Power Dissipation (Note 1a) 0.5
PD(Note 1b) 0.46
W
TJ, TSTG Operating and Storage Junction Temperature Range –55 to +150 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 250 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
618 FDN5618P 7’’ 8mm 3000 units
FDN5618P
FDN5618P Rev B(W)
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA-60 V
∆BVDSS
===∆TJ
Breakdown Voltage Temperature
Coefficient
ID = –250 µA,Referenced to 25°C–58 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = –48 V, VGS = 0 V –1 µA
IGSSF Gate–Body Leakage, Forward VGS = 20V, VDS = 0 V 100 nA
IGSSR Gate–Body Leakage, Reverse VGS = –20 V VDS = 0 V –100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = –250 µA–1 –1.6 –3 V
∆VGS(th)
===∆TJ
Gate Threshold Voltage
Temperature Coefficient
ID = –250 µA,Referenced to 25°C4mV/°C
RDS(on) Static Drain–Source
On–Resistance
VGS = –10 V, ID = –1.25 A
VGS = –4.5 V, ID = –1.0 A
VGS = –10 V, ID = –3 A TJ=125°C
0.148
0.185
0.245
0.170
0.230
0.315
Ω
ID(on) On–State Drain Current VGS = –10 V, VDS = –5 V –5 A
gFS Forward Transconductance VDS = –5 V, ID = –1.25 A 4.3 S
Dynamic Characteristics
Ciss Input Capacitance 430 pF
Coss Output Capacitance 52 pF
Crss Reverse Transfer Capacitance
VDS = –30 V, V GS = 0 V,
f = 1.0 MHz
19 pF
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time 6.5 13 ns
trTurn–On Rise Time 8 16 ns
td(off) Turn–Off Delay Time 16.5 30 ns
tfTurn–Off Fall Time
VDD = –30 V, ID = –1 A,
VGS = –10 V, RGEN = 6 Ω
48ns
QgTotal Gate Charge 8.6 13.8 nC
Qgs Gate–Source Charge 1.5 nC
Qgd Gate–Drain Charge
VDS = –30 V, ID = –1.25 A,
VGS = –10 V
1.3 nC
Drain–Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain–Source Diode Forward Current –0.42 A
VSD Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = –0.42 (Note 2) –0.7 –1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 250°C/W when mounted on a
0.02 in2 pad of 2 oz. copper.
b) 270°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width ≤=300 µs, Duty Cycle ≤=2.0
FDN5618P
FDN5618P Rev B(W)
Typical Characteristics
0
1
2
3
4
5
01234
-VDS, DRAIN-SOURCE VOLTAGE (V)
-4.5V
-
6.0V
-2.5V
-4.0V
-3.5V
VGS = -10V
-3.0V
0.8
1
1.2
1.4
1.6
1.8
2
2.2
012345
-ID, DRAIN CURRENT (A)
VGS = -3.0V
-4.0V
-1
0
V
-4.5V
-6.0V
-3.5V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.8
0.9
1
1.1
1.2
1.3
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
ID = -1.25A
VGS = -10V
0.1
0.2
0.3
0.4
0.5
0.6
246810
-VGS, GATE TO SOURCE VOLTAGE (V)
ID = -0.65 A
TA = 125oC
TA = 25oC
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
1
2
3
4
5
6
11.522.533.54
-VGS, GATE TO SOURCE VOLTAGE (V)
TA = 125oC25oC
VDS = - 5V
-55oC
0.0001
0.001
0.01
0.1
1
10
0 0.2 0.4 0.6 0.8 1 1.2 1.4
-VSD, BODY DIODE FORWARD VOLTAGE (V)
TA = 125oC
25oC
-55oC
VGS = 0V
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDN5618P
FDN5618P Rev B(W)
Typical Characteristics
0
2
4
6
8
10
0246810
Qg, GATE CHARGE (nC)
ID = -1.25A VDS = -20V
-40V
-30V
0
100
200
300
400
500
600
700
024681012
-VDS, DRAIN TO SOURCE VOLTAGE (V)
CISS
CRSS
COSS
f = 1MHz
VGS = 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.001
0.01
0.1
1
10
100
0.1 1 10 100
-VDS, DRAIN-SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A
)
DC 10s
1s
100ms
RDS(ON) LIMIT
VGS =-10V
SINGLE PULSE
RθJA = 270oC/W
TA = 25oC
10ms
1ms
0
5
10
15
20
0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
SINGLE PULSE
RθJA = 270°C/W
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
RθJA(t) = r(t) + RθJA
RθJA = 270 °C/W
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
P(pk)
t1
t2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDN5618P
SSOT-3 Packaging
Configuration: Figure 1.0
Components Leader Tape
500mm min imum or
125 empty poc kets
Tr aile r Tape
300mm min imum or
75 empty poc kets
SSOT-3 Tape Leader and Trailer
Configuration: Figure 2.0
Cover Tape
Carrier Tape
Note/Comments
Packaging Option
SSOT-3 Std Packaging Information
Standard
(no fl ow code) D87Z
Packaging type
Reel Size
TNR
7" Dia
TNR
13"
Qty per Reel/Tube/Bag 3,000 10,000
Box Dimension (mm) 187x107x183 343x343x64
Max qty per Box 24,000 30,000
Weight per unit (gm) 0.0097 0.0097
Weight per Reel (kg) 0.1230 0.4150
Human Read able Labe l
Human Readable Label sample
343mm x 342mm x 64mm
Intermediate box for D87Z Option
Human Read able
Label 187mm x 107mm x 183mm
Intermediate Box for Standard Option
SSOT-3 Std Unit Orientation
3P 3P 3P 3P
Customize Label
Human Read able
Label Embossed
Car rier Tape
Antistatic Cover Tape
Packaging Description:
SSOT-3 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,0 00 uni ts p er 7" or 17 7cm di amet er re el. The re els are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 10,000 units per 13"
or 330 cm diam eter re el. T his a nd some other o pti ons are
described in the Packaging Information table.
These full reels are individually labeled and placed inside
a standard intermediate made of recyclable corrugated
bro wn paper w ith a Fai rchil d logo pri nting. One pi zza b ox
contains eight reels maximum. And these intermediate
boxes are placed inside a labeled shipping box which
co me s in di ffe re nt siz es depe nd in g on the nu mbe r of pa rts
shipped.
SuperSOTTM-3 Tape and Reel Data and Package Dimensions
August 1999, Rev. C
Dimensions are in millimeter
Pkg type
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
SSOT-3
(8mm)
3.15
+/-0.10 2.77
+/-0.10 8.0
+/-0.3 1.55
+/-0.05 1.125
+/-0.125 1.75
+/-0.10 6.25
min 3.50
+/-0.05 4.0
+/-0.1 4.0
+/-0.1 1.30
+/-0.10 0.228
+/-0.013 5.2
+/-0.3 0.06
+/-02
Dimensions are in inches and millimeters
Tape Size Reel
Option Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
8mm 7" Dia 7.00
177.8 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 2.165
55 0.331 +0.059/-0.000
8.4 +1.5/0 0.567
14.4 0.311 – 0.429
7.9 – 10.9
8m m 13" Dia 13.00
330 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 4.00
100 0.331 +0.059/-0.000
8.4 +1.5/0 0.567
14.4 0.311 – 0.429
7.9 – 10.9
See detail AA
Dim A
max
13" Diameter Option
7" Diameter Option
Dim A
Max
See detail AA
W3
W2 max Measured at Hub
W1 Measured at Hub
Dim N
Dim D
min
Dim C
B Min
DETAIL AA
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum component rotation
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
Typical
component
cavity
center line
20 deg maximum
Typical
component
center line
B0
A0
Sketch B (Top View)
Component Rotation
Sketch A (Side or Front Sectional View)
Component Rotation
User Direction of Feed
SSOT-3 Embossed Carrier Tape
Configuration: Figure 3.0
SSOT-3 Reel Configuration: Figure 4.0
P1 A0
D1
FW
E1
E2
Tc
Wc
K0
T
B0
D0P0 P2
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
July 1999, Rev. C
SuperSOT-3 (FS PKG Code 32)
1 : 1
Scale 1:1 on letter size paper
D im ensions s how n below are in:
inches [ millimeters ]
Part Weight per unit (gram): 0.0097
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
September 1998, Rev. A
TRADEMARKS
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST
FASTr™
GTO™
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT ST A TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
Rev. E
