IRF6894MPbF IRF6894MTRPbF HEXFET(R) Power MOSFET plus Schottky Diode RoHs Compliant Containing No Lead and Bromide Integrated Monolithic Schottky Diode Low Profile (<0.7 mm) Dual Sided Cooling Compatible Low Package Inductance Optimized for High Frequency Switching Ideal for CPU Core DC-DC Converters Optimized for Sync. FET socket of Sync. Buck Converter Low Conduction and Switching Losses Compatible with existing Surface Mount Techniques 100% Rg tested Footprint compatible to DirectFET Applicable DirectFET SQ TM Typical values (unless otherwise specified) VDSS VGS RDS(on) RDS(on) 25V min 16V max 0.9m@ 10V 1.4m@ 4.5V Qg Qgd Qgs2 Qrr Qoss Vgs(th) 10nC 3.0nC 58nC 33nC 1.6V tot 31nC S G D S DirectFETTM ISOMETRIC Outline and Substrate Outline (see p.7,8 for details) SX ST MQ MX D MX MT MP Description The IRF6894MPbF combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.7 mm profile. The DirectFETTM package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques. Application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFETTM package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6894MPbF balances industry leading on-state resistance while minimizing gate charge along with low gate resistance to reduce both conduction and switching losses. This part contains an integrated Schottky diode to reduce the Qrr of the body drain diode further reducing the losses in a Synchronous Buck circuit. The reduced losses make this product ideal for high frequency/high efficiency DC-DC converters that power high current loads such as the latest generation of microprocessors. The IRF6894MPbF has been optimized for parameters that are critical in synchronous buck converter's Sync FET sockets. Base part number Package Type (R) IRF6894MTRPbF DirectFET Medium Can Standard Pack Form Quantity Tape and Reel 4800 Orderable Part Number IRF6894MTRPbF Absolute Maximum Ratings Typical RDS(on) (m) 4.0 ID = 37A 3.0 2.0 TJ = 125C 1.0 TJ = 25C 0.0 2 4 6 8 10 12 14 16 18 20 VGS, Gate -to -Source Voltage (V) Fig 1. Typical On-Resistance vs. Gate Voltage Notes Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFETTM Website. Surface mounted on 1 in. square Cu board, steady state. 1 VGS, Gate-to-Source Voltage (V) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Pulsed Drain Current Single Pulse Avalanche Energy Avalanche Current VDS VGS ID @ TA = 25C ID @ TA = 70C ID @ TC = 25C IDM EAS IAR Max. 25 16 37 29 163 296 540 30 Units V A mJ A 14 ID = 30A 12 VDS = 20V VDS = 13V VDS= 5V 10 8 6 4 2 0 0 10 20 30 40 50 60 70 80 90 QG Total Gate Charge (nC) Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 1.2mH, RG = 50, IAS = 30A. 2016-10-13 IRF6894MTRPbF Static @ TJ = 25C (unless otherwise specified) Parameter Min. Typ. Max. Units BVDSS Drain-to-Source Breakdown Voltage 25 --- --- V VDSS/TJ Breakdown Voltage Temp. Coefficient --- 0.02 --- V/C RDS(on) Static Drain-to-Source On-Resistance --- 0.9 1.3 --- 1.4 1.8 m VGS(th) Gate Threshold Voltage 1.1 1.6 2.1 VGS(th)/TJ IDSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr Gate Threshold Voltage Temp. Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre- Vth Gate-to-Source Charge Post- Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time --- --- --- --- 193 --- --- --- --- --- --- --- --- --- --- -3.8 --- --- --- --- 31 8.1 3.0 10 10 13 33 0.2 17 47 --- 500 100 -100 --- 47 --- --- --- --- --- --- --- --- --- td(off) Turn-Off Delay Time --- 23 --- tf Ciss Coss Crss Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance --- --- --- --- 13 4232 1260 255 --- --- --- --- Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Min. Typ. Max. --- --- --- --- 296 VSD Diode Forward Voltage --- --- 0.75 V trr Qrr Reverse Recovery Time Reverse Recovery Charge --- --- 28 58 42 87 ns nC IGSS V Conditions VGS = 0V, ID = 1.0mA ID = 10mA (25C-125C) VGS = 10V, ID = 37A VGS = 4.5V, ID = 30A VDS = VGS, ID = 100A mV/C VDS = VGS, ID = 10mA A VDS = 20 V, VGS = 0V VGS = 16V nA VGS = -16V S VDS = 13V, ID = 30A nC nC ns pF VDS = 13V VGS = 4.5V ID = 30A See Fig 15 VDS = 16V, VGS = 0V VDD = 13V, VGS = 4.5V ID = 30A RG= 1.8 See Fig 17 VGS = 0V VDS = 13V = 1.0MHz Diode Characteristics IS ISM Units 37 A Conditions MOSFET symbol showing the integral reverse p-n junction diode. D G S TJ = 25C, IS = 30A, VGS = 0V TJ = 25C, IF = 30A di/dt = 320A/s Notes: Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400s; duty cycle 2%. 2 2016-10-13 IRF6894MTRPbF Absolute Maximum Ratings Symbol Parameter PD @TA = 25C Power Dissipation PD @TA = 70C Power Dissipation PD @TC = 25C Power Dissipation Peak Soldering Temperature TP Operating Junction and TJ Storage Temperature Range TSTG Max. 2.8 1.8 54 270 -40 to + 150 Thermal Resistance Symbol Parameter Junction-to-Ambient RJA Junction-to-Ambient RJA Junction-to-Ambient RJA Junction-to-Can RJC Junction-to-PCB Mounted RJA-PCB Linear Derating Factor Typ. --- 12.5 20 --- 1.0 Units W C Max. 45 --- --- 2.3 --- Units C/W W/C 0.022 100 Thermal Response ( Z thJA ) 10 1 D = 0.50 0.20 0.10 0.05 0.02 0.01 0.1 0.01 0.001 0.0001 1E-006 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc SINGLE PULSE ( THERMAL RESPONSE ) 1E-005 0.0001 0.001 0.01 0.1 1 10 100 1000 t1 , Rectangular Pulse Duration (sec) Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient Notes: Surface mounted on 1 in. square Cu board, steady state. TC measured with thermocouple incontact with top (Drain) of part. Used double sided cooling, mounting pad with large heatsink. Mounted on minimum footprint full size board with metalized back and with small clip heatsink. R is measured at TJ of approximately 90C. . Surface mounted on 1 in. square Cu board (still air). 3 Mounted to a PCB with small clip heatsink (still air) Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air) 2016-10-13 IRF6894MTRPbF 1000 ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 1000 100 10 TOP 2.5V 1 60s PULSE WIDTH BOTTOM VGS 10V 5.0V 4.5V 3.5V 3.3V 3.0V 2.8V 2.5V 100 2.5V 10 60s PULSE WIDTH Tj = 25C 0.1 1 10 0.1 100 1 10 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 5. Typical Output Characteristics Fig 4. Typical Output Characteristics 1000 1.6 ID = 37A TJ = 150C TJ = 25C 100 Typical R DS(on) (Normalized) ID, Drain-to-Source Current(A) BOTTOM VGS 10V 5.0V 4.5V 3.5V 3.3V 3.0V 2.8V 2.5V Tj = 150C 1 0.1 TOP TJ = -40C 10 1 VGS = 10V VGS = 4.5V 1.4 1.2 1.0 0.8 VDS = 15V 60s PULSE WIDTH 0.1 0.6 1.0 1.5 2.0 2.5 3.0 3.5 4.0 -60 -40 -20 0 VGS, Gate-to-Source Voltage (V) Fig 7. Normalized On-Resistance vs. Temperature Fig 6. Typical Transfer Characteristics 100000 5.0 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd TJ = 25C 4.0 Typical RDS (on) (m ) C, Capacitance(pF) Coss = Cds + Cgd 10000 Coss 1000 20 40 60 80 100 120 140 160 TJ , Junction Temperature (C) Ciss Crss 3.0 Vgs = 3.5V Vgs = 4.5V Vgs = 5.0V Vgs = 7.0V Vgs = 8.0V Vgs = 10V Vgs = 12V Vgs = 15V 2.0 1.0 100 0.0 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Typical Capacitance vs. Drain-to-Source Voltage 4 0 25 50 75 100 125 150 175 200 ID, Drain Current (A) Fig 9. Typical On-Resistance vs. Drain Current and Gate Voltage 2016-10-13 IRF6894MTRPbF 10000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 100 TJ = 150C TJ = 25C TJ = -40C 10 VGS = 0V 0.4 0.7 1000 100sec 100 10msec 10 1 DC TA = 25C Tj = 150C Single Pulse 0.1 0.0 1.0 0.1 1.0 10.0 100.0 VDS , Drain-toSource Voltage (V) VSD , Source-to-Drain Voltage (V) Fig 11. Maximum Safe Operating Area Fig 10. Typical Source-Drain Diode Forward Voltage 2.5 Typical VGS(th) Gate threshold Voltage (V) 180 160 140 ID, Drain Current (A) 1msec 0.01 1 0.1 OPERATION IN THIS AREA LIMITED BY R DS (on) 120 100 80 60 40 20 2.0 ID = 10mA 1.5 1.0 0 25 50 75 100 125 -75 -50 -25 150 0 25 50 75 100 125 150 TC , Case Temperature (C) TJ , Temperature ( C ) Fig 12. Maximum Drain Current vs. Case Temperature Fig 13. Typical Threshold Voltage vs. Junction Temperature EAS , Single Pulse Avalanche Energy (mJ) 2500 ID TOP 2.0A 3.0A BOTTOM 30A 2000 1500 1000 500 0 25 50 75 100 125 150 Starting TJ , Junction Temperature (C) Fig 14. Maximum Avalanche Energy vs. Drain Current 5 2016-10-13 IRF6894MTRPbF Fig 15a. Gate Charge Test Circuit Fig 16a. Unclamped Inductive Test Circuit Fig 17a. Switching Time Test Circuit 6 Fig 15b. Gate Charge Waveform Fig 16b. Unclamped Inductive Waveforms Fig 17b. Switching Time Waveforms 2016-10-13 IRF6894MTRPbF Fig 18. Diode Reverse Recovery Test Circuit for HEXFET(R) Power MOSFETs DirectFETTM Board Footprint, MX Outline (Medium Size Can, X-Designation). Please see DirectFETTM application note AN-1035 for all details regarding the assembly of DirectFETTM. This includes all recommendations for stencil and substrate designs. G=GATE D=DRAIN S=SOURCE D D S G S D D Note: For the most current drawing please refer to website at http://www.irf.com/package/ 7 2016-10-13 IRF6894MTRPbF DirectFETTM Outline Dimension, MX Outline (Medium Size Can, X-Designation). Please see DirectFETTM application note AN-1035 for all details regarding the assembly of DirectFETTM. This includes all recommendations for stencil and substrate designs. DIMENSIONS METRIC CODE A B C D E F G H J K L M R P MIN 6.25 4.80 3.85 0.35 0.68 0.68 1.38 0.80 0.38 0.88 2.28 0.535 0.020 0.08 MAX 6.35 5.05 3.95 0.45 0.72 0.72 1.42 0.84 0.42 1.01 2.41 0.595 0.080 0.17 IMPERIAL MIN 0.246 0.189 0.152 0.014 0.027 0.027 0.054 0.032 0.015 0.035 0.090 0.021 0.001 0.003 MAX 0.250 0.201 0.156 0.018 0.028 0.028 0.056 0.033 0.017 0.039 0.095 0.023 0.003 0.007 DirectFETTM Part Marking Note: For the most current drawing please refer to website at http://www.irf.com/package/ 8 2016-10-13 IRF6894MTRPbF DirectFETTM Tape & Reel Dimension (Showing component orientation). Note: For the most current drawing please refer to website at http://www.irf.com/package/ 9 2016-10-13 IRF6894MTRPbF Qualification Information Industrial Qualification Level Moisture Sensitivity Level DirectFETTM Medium Can Yes RoHS Compliant MSL1 (per JEDEC J-STD-020D) Applicable version of JEDEC standard at the time of product release. Revision History Date 10/13/2016 Comment Changed datasheet with "Infineon" logo -all pages. Changed Rth from "60C/W" to "45C/W" -page 3 Changed ID @ TA 25C/70C from "32A/25A" to "37A/29A" -page 1 & 2. Changed Fig.1 to Fig.15 -page 1 to 9. Added disclaimer on last page. Published by Infineon Technologies AG 81726 Munchen, Germany (c) Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies' products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 10 2016-10-13