Order this document by MRF136/D SEMICONDUCTOR TECHNICAL DATA The RF MOSFET Line Designed for wideband large-signal amplifier and oscillator applications up to 400 MHz range, in single ended configuration. * Guaranteed 28 Volt, 150 MHz Performance Output Power = 15 Watts Narrowband Gain = 16 dB (Typ) Efficiency = 60% (Typical) 15 W, to 400 MHz N-CHANNEL MOS BROADBAND RF POWER FET * Small-Signal and Large-Signal Characterization * 100% Tested For Load Mismatch At All Phase Angles With 30:1 VSWR D * Excellent Thermal Stability, Ideally Suited For Class A Operation CASE 211-07, STYLE 2 * Facilitates Manual Gain Control, ALC and Modulation Techniques G S MAXIMUM RATINGS Rating Symbol Value Unit Drain-Source Voltage VDSS 65 Vdc Drain-Gate Voltage (RGS = 1.0 M) VDGR 65 Vdc VGS 40 Vdc Drain Current -- Continuous ID 2.5 Adc Total Device Dissipation @ TC = 25C Derate above 25C PD 55 0.314 Watts W/C Storage Temperature Range Tstg - 65 to +150 C TJ 200 C Symbol Max Unit RJC 3.2 C/W Gate-Source Voltage Operating Junction Temperature THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction to Case NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. REV 7 1 ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Drain-Source Breakdown Voltage (VGS = 0, ID = 5.0 mA) V(BR)DSS 65 -- -- Vdc Zero-Gate Voltage Drain Current (VDS = 28 V, VGS = 0) IDSS -- -- 2.0 mAdc Gate-Source Leakage Current (VGS = 40 V, VDS = 0) IGSS -- -- 1.0 Adc Gate Threshold Voltage (VDS = 10 V, ID = 25 mA) VGS(th) 1.0 3.0 6.0 Vdc Forward Transconductance (VDS = 10 V, ID = 250 mA) gfs 250 400 -- mmhos Input Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) Ciss -- 24 -- pF Output Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) Coss -- 27 -- pF Reverse Transfer Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) Crss -- 5.5 -- pF Noise Figure (VDS = 28 Vdc, ID = 500 mA, f = 150 MHz) NF -- 1.0 -- dB Common Source Power Gain (Figure 1) (VDD = 28 Vdc, Pout = 15 W, f = 150 MHz, IDQ = 25 mA) Gps 13 16 -- dB Drain Efficiency (Figure 1) (VDD = 28 Vdc, Pout = 15 W, f = 150 MHz, IDQ = 25 mA) 50 60 -- % Electrical Ruggedness (Figure 1) (VDD = 28 Vdc, Pout = 15 W, f = 150 MHz, IDQ = 25 mA, VSWR 30:1 at all Phase Angles) OFF CHARACTERISTICS (1) ON CHARACTERISTICS (1) DYNAMIC CHARACTERISTICS (1) FUNCTIONAL CHARACTERISTICS NOTES: 1. Each side measured separately. REV 7 2 No Degradation in Output Power R4 C8 D1 BIAS ADJUST R3 C10 L3 RF OUTPUT C4 C2 C3 C5 DUT C1, C2 -- Arco 406, 15 - 115 pF or Equivalent C3 -- Arco 404, 8 - 60 pF or Equivalent C4 -- 43 pF Mini-Unelco or Equivalent C5 -- 24 pF Mini-Unelco or Equivalent C6 -- 680 pF, 100 Mils Chip C7 -- 0.01 F Ceramic C8 -- 100 F, 40 V C9 -- 0.1 F Ceramic C10, C11 -- 680 pF Feedthru D1 -- 1N5925A Motorola Zener L1 -- 2 Turns, 0.29 ID, #18 AWG, 0.10 Long L2 -- 2 Turns, 0.23 ID, #18 AWG, 0.10 Long L3 -- 2-1/4 Turns, 0.29 ID, #18 AWG, 0.125 Long RFC1 -- 20 Turns, 0.30 ID, #20 AWG Enamel Closewound RFC2 -- Ferroxcube VK-200 -- 19/4B R1 -- 27 , 1 W Thin Film R2 -- 10 k, 1/4 W R3 -- 10 Turns, 10 k R4 -- 1.8 k, 1/2 W Board Material -- 0.062 G10, 1 oz. Cu Clad, Double Sided Figure 1. 150 MHz Test Circuit 3 C6 L1 RF INPUT REV 7 VDD = + 28 V C9 - L2 R1 C1 C11 RFC1 C7 R2 + RFC2 TYPICAL CHARACTERISTICS 20 16 f = 100 MHz 150 MHz 9 200 MHz Pout , OUTPUT POWER (WATTS) Pout , OUTPUT POWER (WATTS) 18 10 14 12 10 8 6 VDD = 28 V IDQ = 25 mA 4 2 7 200 MHz 5 4 3 VDD = 13.5 V IDQ = 25 mA 2 200 600 800 400 Pin, INPUT POWER (MILLWATTS) 0 0 1000 Figure 2. Output Power versus Input Power 200 400 600 800 Pin, INPUT POWER (MILLWATTS) 1000 Figure 3. Output Power versus Input Power 20 24 f = 400 MHz IDQ = 25 mA VDD = 28 V Pout , OUTPUT POWER (WATTS) 18 Pout , OUTPUT POWER (WATTS) 150 MHz 6 1 0 0 16 f = 100 MHz 8 14 12 10 8 VDD = 13.5 V 6 4 21 Pin = 600 mW 18 15 400 mW 12 200 mW 9 6 IDQ = 25 mA f = 100 MHz 3 2 0 0 1 2 Pin, INPUT POWER (WATTS) 3 0 12 4 Figure 4. Output Power versus Input Power 14 16 20 24 18 22 VDD, SUPPLY VOLTAGE (VOLTS) 26 28 Figure 5. Output Power versus Supply Voltage 24 24 21 18 600 mW 15 12 300 mW 9 6 IDQ = 25 mA f = 150 MHz 3 0 12 14 16 20 24 18 22 VDD, SUPPLY VOLTAGE (VOLTS) REV 7 21 Pin = 1 W 18 15 0.7 W 12 0.4 W 9 6 IDQ = 25 mA f = 200 MHz 3 26 Figure 6. Output Power versus Supply Voltage 4 Pout , OUTPUT POWER (WATTS) Pout , OUTPUT POWER (WATTS) Pin = 900 mW 28 0 12 14 16 18 20 22 24 VDD, SUPPLY VOLTAGE (VOLTS) 26 Figure 7. Output Power versus Supply Voltage 28 TYPICAL CHARACTERISTICS 16 IDQ = 25 mA f = 400 MHz 18 16 Pin = 3 W 14 Pout , OUTPUT POWER (WATTS) Pout , OUTPUT POWER (WATTS) 20 2W 12 10 1W 8 6 4 VDD = 28 V IDQ = 25 mA Pin = CONSTANT 14 12 10 8 0 12 4 14 16 18 20 22 24 VDD, SUPPLY VOLTAGE (VOLTS) 26 0 -7 28 I D, DRAIN CURRENT (MILLAMPS) 2 1.8 TYPICAL DEVICE SHOWN, VGS(th) = 3 V 1.6 1.4 1.2 1 VDS = 10 V 0.8 0.6 0.4 0.2 0 1 2 3 4 5 VDS, GATE-SOURCE VOLTAGE (VOLTS) 6 2 3 7 ID = 750 mA 1.02 500 mA 1.01 1 0.99 0.98 250 mA 0.97 0.96 25 mA 0.95 0.94 - 25 25 0 75 125 50 100 TC, CASE TEMPERATURE (C) 150 175 Figure 11. Gate-Source Voltage versus Case Temperature 10 60 I D, DRAIN CURRENT (AMPS) VGS = 0 V f = 1 MHz 180 C, CAPACITANCE (pF) -4 -3 -2 -1 0 1 VGS, GATE-SOURCE VOLTAGE (VOLTS) VDS = 28 V 1.03 100 Coss 40 Ciss 20 Crss 0 4 16 20 24 8 12 VDS, DRAIN-SOURCE VOLTAGE (VOLTS) 5 3 2 TC = 25C 1 0.3 0.2 28 Figure 12. Capacitance versus Drain-Source Voltage 5 -5 1.04 Figure 10. Drain Current versus Gate Voltage (Transfer Characteristics) REV 7 -6 Figure 9. Output Power versus Gate Voltage VGS, GATE-SOURCE VOLTAGE (NORMALIZED) Figure 8. Output Power versus Supply Voltage 0 400 150MHz MHz TYPICAL DEVICE SHOWN, VGS(th) = 3 V 6 2 2 0 400 MHz 0.1 1 2 10 3 5 20 30 50 70 VDS, DRAIN-SOURCE VOLTAGE (VOLTS) Figure 13. DC Safe Operating Area 100 TYPICAL CHARACTERISTICS 40 40 35 35 Pout , OUTPUT POWER (WATTS) Pout , OUTPUT POWER (WATTS) TYPICAL 400 MHz PERFORMANCE 30 25 20 15 VDD = 28 V IDQ = 100 mA f = 400 MHz 10 5 0.5 1 2.5 1.5 2 Pin, INPUT POWER (WATTS) 3 Figure 14. Output Power versus Input Power REV 7 6 25 TYPICAL DEVICE SHOWN, VGS(th) = 3 V 20 15 10 f = 400 MHz 5 0 0 30 VDD = 28 V IDQ = 100 mA Pin = CONSTANT 3.5 0 -4 -3 -2 0 2 -1 1 VGS, GATE-SOURCE VOLTAGE (VOLTS) 3 Figure 15. Output Power versus Gate Voltage 4 400 200 Zin{ 150 400 200 ZOL* f = 100 MHz 150 f = 100 MHz VDD = 28 V, IDQ = 25 mA, Pout = 15 W f MHz Zin{ OHMS 100 150 200 400 7.5 - j9.73 4.11 - j7.56 2.66 - j6.39 2.39 - j2.18 VDD = 28 V, IDQ = 25 mA, Pout = 15 W {27 Shunt Resistor Gate-to-Ground f MHz ZOL* OHMS 100 150 200 400 13.7 - j16.8 9.08 - j15.38 4.74 - j8.92 4.28 - j4.17 ZOL* = Conjugate of the optimum load impedance into which the device operates at a given output power, voltage and frequency. Figure 16. Large-Signal Series Equivalent Input Impedance, Zin Figure 17. Large-Signal Series Equivalent Output Impedance, ZOL* Zin & ZOL* are given from drain-to-drain and gate-to-gate respectively. 400 225 VDD = 28 V, IDQ = 100 mA, Pout = 30 W 400 Zin 150 225 ZOL* 150 100 100 50 f = 30 MHz 50 f = 30 MHz f MHz Zin{ Ohms ZOL* Ohms 30 50 100 150 225 400 59.3 - j24 48 - j33.5 20.5 - j34.2 4.77 - j25.4 3 - j9.5 2.34 - j3.31 40.1 - j8.52 37 - j11.9 29 - j16.5 20.6 - j19 13 - j16.7 10.2 - j14.3 Feedback loops: 560 ohms in series with 0.1 F Drain to gate, each side of push-pull FET ZOL* = Conjugate of the optimum load impedance into which the device operates at a given output power, voltage and frequency. Figure 18. Input and Outut Impedance REV 7 7 f (MHz) S11 S21 S12 2.0 |S11| 0.988 - 11 |S21| 41.19 173 |S12| 0.006 67 |S22| 0.729 - 12 5.0 0.970 - 27 40.07 164 0.014 62 0.720 - 31 10 0.923 - 52 35.94 149 0.026 54 0.714 - 58 20 0.837 - 88 27.23 129 0.040 36 0.690 - 96 30 0.784 - 111 20.75 117 0.046 27 0.684 - 118 40 0.751 - 125 16.49 108 0.048 22 0.680 - 131 50 0.733 - 135 13.41 103 0.050 19 0.679 - 139 60 0.720 - 1 42 11.43 99 0.050 16 0.678 - 145 70 0.709 - 147 9.871 96 0.050 14 0.679 - 149 80 0.707 - 152 8.663 93 0.051 13 0.683 - 153 90 0.706 - 155 7.784 91 0.051 13 0.682 - 155 100 0.708 - 157 7.008 88 0.051 13 0.680 - 157 110 0.711 - 159 6.435 86 0.051 14 0.681 - 158 120 0.714 - 161 5.899 85 0.051 15 0.682 - 159 130 0.717 - 163 5.439 82 0.052 16 0.684 - 160 140 0.720 - 164 5.068 80 0.052 17 0.684 - 161 150 0.723 - 165 4.709 80 0.052 18 0.686 - 161 160 0.727 - 166 4.455 78 0.052 18 0.690 - 161 170 0.732 - 167 4.200 77 0.052 18 0.694 - 162 180 0.735 - 168 3.967 75 0.052 19 0.699 - 162 190 0.738 - 169 3.756 74 0.052 19 0.703 - 163 200 0.740 - 170 3.545 73 0.052 20 0.706 - 163 225 0.746 - 171 3.140 69 0.053 22 0.717 - 163 250 0.742 - 172 2.783 67 0.053 25 0.724 - 163 275 0.744 - 173 2.540 64 0.054 27 0.724 - 163 300 0.751 - 174 2.323 60 0.055 29 0.736 - 163 325 0.757 - 175 2.140 58 0.058 32 0.749 - 163 350 0.760 - 176 1.963 54 0.059 35 0.758 - 163 375 0.762 - 177 1.838 52 0.062 38 0.768 - 163 400 0.774 - 179 1.696 50 0.065 41 0.783 - 163 425 0.775 - 179 1.590 48 0.068 43 0.793 - 163 450 0.781 + 179 1.493 46 0.071 46 0.805 - 163 475 0.787 + 177 1.415 43 0.074 47 0.813 - 164 500 0.792 + 176 1.332 40 0.079 48 0.825 - 164 525 0.797 + 175 1.259 38 0.083 50 0.831 - 164 550 0.801 + 175 1.185 37 0.088 51 0.843 - 164 575 0.810 + 174 1.145 36 0.094 52 0.855 - 164 600 0.816 + 173 1.091 34 0.101 52 0.869 - 165 625 0.818 + 171 1.041 32 0.106 53 0.871 - 165 650 0.825 + 170 0.994 30 0.112 53 0.884 - 165 675 0.834 + 169 0.962 29 0.119 53 0.890 - 165 700 0.837 + 168 0.922 27 0.127 53 0.906 - 166 725 0.836 + 167 0.879 25 0.133 52 0.909 - 167 750 0.841 + 166 0.838 25 0.140 53 0.917 - 167 775 0.844 + 165 0.824 24 0.148 52 0.933 - 167 800 0.846 + 163 0.785 21 0.154 50 0.941 - 168 Table 1. Common Source Scattering Parameters VDS = 28 V, ID = 0.5 A REV 7 8 S22 +90 +j50 +120 +j25 +60 +j100 +j150 +j10 f = 800 MHz +150 +j250 f = 800 MHz +30 S12 600 400 +j500 10 0 25 50 100 150 250 180 500 0.18 400 0.16 0.10 0.12 0.06 0.08 0.02 70 0 0.04 - j500 150 - j10 0.14 S11 70 - j250 - 30 -150 - j150 - j100 - j25 - 60 -120 -90 - j50 Figure 19. S11, Input Reflection Coefficient versus Frequency VDS = 28 V ID = 0.5 A Figure 20. S12, Reverse Transmission Coefficient versus Frequency VDS = 28 V ID = 0.5 A +90 +j50 70 +120 +60 +j25 +j100 100 +150 S21 180 8 6 4 +j10 400 f = 800 MHz 2 0 - 60 0 10 25 50 100 150 250 500 f = 800 MHz 150 400 70 - j10 - j500 - j250 S22 - j150 - j100 - j25 - 90 - j50 Figure 21. S21, Forward Transmission Coefficient versus Frequency VDS = 28 V ID = 0.5 A Figure 22. S22, Output Reflection Coefficient versus Frequency VDS = 28 V ID = 0.5 A REV 7 9 +j250 +j500 - 30 -150 -120 +j150 +30 150 DESIGN CONSIDERATIONS The MRF136 is an RF power N-Channel enhancement mode field-effect transistor (FET) designed especially for HF and VHF power amplifier applications. M/A-COM RF MOS FETs feature planar design for optimum manufacturability. M/A-COM Application Note AN211A, FETs in Theory and Practice, is suggested reading for those not familiar with the construction and characteristics of FETs. The major advantages of RF power FETs include high gain, low noise, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. Power output can be varied over a wide range with a low power dc control signal, thus facilitating manual gain control, ALC and modulation. DC BIAS The MRF136 is an enhancement mode FET and, therefore, does not conduct when drain voltage is applied without gate bias. A positive gate voltage causes drain current to flow (see Figure 10). RF power FETs require forward bias for optimum gain and power output. A Class AB condition with quiescent drain current (IDQ) in the 25 -100 mA range is sufficient for many applications. For special requirements such as linear amplification, IDQ may have to be adjusted to optimize the critical parameters. The MOS gate is a dc open circuit. Since the gate bias circuit does not have to deliver any current to the FET, a simple resistive divider arrangement may sometimes suffice for this function. Special applications may require more elaborate gate bias systems. GAIN CONTROL Power output of the MRF136 may be controlled from rated values down to the milliwatt region (>20 dB reduction in power output with constant input power) by varying the dc gate REV 7 10 voltage. This feature, not available in bipolar RF power devices, facilitates the incorporation of manual gain control, AGC/ALC and modulation schemes into system designs. A full range of power output control may require dc gate voltage excursions into the negative region. AMPLIFIER DESIGN Impedance matching networks similar to those used with bipolar transistors are suitable for MRF136. See M/A-COM Application Note AN721, Impedance Matching Networks Applied to RF Power Transistors. Both small signal scattering parameters and large signal impedance parameters are provided. Large signal impedances should be used for network designs wherever possible. While the s parameters will not produce an exact design solution for high power operation, they do yield a good first approximation. This is particularly useful at frequencies outside those presented in the large signal impedance plots. RF power FETs are triode devices and are therefore not unilateral. This, coupled with the very high gain, yields a device capable of self oscillation. Stability may be achieved using techniques such as drain loading, input shunt resistive loading, or feedback. S parameter stability analysis can provide useful information in the selection of loading and/or feedback to insure stable operation. The MRF136 was characterized with a 27 ohm input shunt loading resistor. For further discussion of RF amplifier stability and the use of two port parameters in RF amplifier design, see M/A-COM Application Note AN215A. LOW NOISE OPERATION Input resistive loading will degrade noise performance, and noise figure may vary significantly with gate driving impedance. A low loss input matching network with its gate impedance optimized for lowest noise is recommended. PACKAGE DIMENSIONS A U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. M Q M 1 DIM A B C D E H J K M Q R S U 4 R 2 S B 3 D K STYLE 2: PIN 1. 2. 3. 4. J H C E SEATING PLANE CASE 211-07 ISSUE N Specifications subject to change without notice. n North America: Tel. (800) 366-2266, Fax (800) 618-8883 n Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298 n Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020 Visit www.macom.com for additional data sheets and product information. REV 7 11 SOURCE GATE SOURCE DRAIN INCHES MIN MAX 0.960 0.990 0.370 0.390 0.229 0.281 0.215 0.235 0.085 0.105 0.150 0.108 0.004 0.006 0.395 0.405 40 _ 50 _ 0.113 0.130 0.245 0.255 0.790 0.810 0.720 0.730 MILLIMETERS MIN MAX 24.39 25.14 9.40 9.90 5.82 7.13 5.47 5.96 2.16 2.66 3.81 4.57 0.11 0.15 10.04 10.28 40 _ 50 _ 2.88 3.30 6.23 6.47 20.07 20.57 18.29 18.54