HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 Data Sheet N-Channel UltraFET Power MOSFET 100 V, 56 A, 25 m These N-Channel power MOSFETs are manufactured using the innovative UltraFET process. This advanced process technology achieves the lowest possible onresistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efficiency is important, such as switching regulators, switching converters, motor drivers, relay drivers, low-voltage bus switches, and power management in portable and batteryoperated products. October 2013 Features * 56A, 100V * Simulation Models - Temperature Compensated PSPICE(R) and SABERTM Electrical Models - Spice and Saber Thermal Impedance Models - www.onsemi.com * Peak Current vs Pulse Width Curve * UIS Rating Curve * Related Literature - TB334, "Guidelines for Soldering Surface Mount Components to PC Boards" Formerly developmental type TA75639. Ordering Information PART NUMBER Symbol PACKAGE BRAND HUF75639G3 TO-247 75639G HUF75639P3 TO-220AB 75639P HUF75639S3ST TO-263AB 75639S HUF75639S3 TO-262AA 75639S D G S Packaging JEDEC STYLE TO-247 JEDEC TO-220AB SOURCE DRAIN GATE SOURCE DRAIN GATE DRAIN (FLANGE) DRAIN (TAB) JEDEC TO-263AB TO-262AA SOURCE GATE DRAIN (FLANGE) DRAIN GATE SOURCE DRAIN (TAB) (c)2001 Semiconductor Components Industries, LLC. October-2017, Rev. 3 Publication Order Number: HUF75639S3S/D HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Drain Current Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg UNITS V V V 100 100 20 56 Figure 4 Figures 6, 14, 15 200 1.35 -55 to 175 A W W/oC oC 300 260 oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS 100 - - V VDS = 95V, VGS = 0V - - 1 A VDS = 90V, VGS = 0V, TC = 150oC - - 250 A VGS = 20V - - 100 nA OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current BVDSS IDSS IGSS ID = 250A, VGS = 0V (Figure 11) ON STATE SPECIFICATIONS Gate to Source Threshold Voltage VGS(TH) VGS = VDS, ID = 250A (Figure 10) 2 - 4 V Drain to Source On Resistance rDS(ON) ID = 56A, VGS = 10V (Figure 9) - 0.021 0.025 THERMAL SPECIFICATIONS Thermal Resistance Junction to Case RJC (Figure 3) - - 0.74 oC/W Thermal Resistance Junction to Ambient RJA TO-247 - - 30 oC/W TO-220, TO-263, TO-262 - - 62 oC/W VDD = 50V, ID 56A, RL = 0.89, VGS = 10V, RGS = 5.1 - - 110 ns - 15 - ns tr - 60 - ns td(OFF) - 20 - ns tf - 25 - ns tOFF - - 70 ns - 110 130 nC - 57 75 nC - 3.7 4.5 nC SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time tON td(ON) GATE CHARGE SPECIFICATIONS Qg(TOT) VGS = 0V to 20V Gate Charge at 10V Qg(10) VGS = 0V to 10V Threshold Gate Charge Qg(TH) VGS = 0V to 2V Total Gate Charge VDD = 50V, ID 56A, RL = 0.89 Ig(REF) = 1.0mA (Figure 13) Gate to Source Gate Charge Qgs - 9.8 - nC Gate to Drain "Miller" Charge Qgd - 24 - nC www.onsemi.com 2 HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 TC = 25oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS - 2000 - pF - 500 - pF - 65 - pF CAPACITANCE SPECIFICATIONS Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VDS = 25V, VGS = 0V, f = 1MHz (Figure 12) Source to Drain Diode Specifications PARAMETER SYMBOL Source to Drain Diode Voltage MIN TYP MAX UNITS ISD = 56A - - 1.25 V trr ISD = 56A, dISD/dt = 100A/s - - 110 ns QRR ISD = 56A, dISD/dt = 100A/s - - 320 nC VSD Reverse Recovery Time Reverse Recovered Charge TEST CONDITIONS 1.2 60 1.0 50 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER Typical Performance Curves 0.8 0.6 0.4 40 30 20 10 0.2 0 0 0 25 50 75 100 125 150 25 175 50 TC , CASE TEMPERATURE (oC) 75 100 125 150 175 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 2 DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 ZJC, NORMALIZED THERMAL IMPEDANCE 1 PDM 0.1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 t, RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE www.onsemi.com 3 100 101 HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 Typical Performance Curves (Continued) IDM , PEAK CURRENT (A) 1000 TC = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 175 - TC I = I25 150 100 VGS = 10V TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10 10-5 10-4 10-3 10-2 10-1 100 101 t, PULSE WIDTH (s) FIGURE 4. PEAK CURRENT CAPABILITY 300 1000 IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) TJ = MAX RATED TC = 25oC 100 100s 10 1ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 10ms VDSS(MAX) = 100V 100 10 100 STARTING TJ = 25oC STARTING TJ = 150oC 10 0.001 1 1 If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] 200 0.01 0.1 1 tAV, TIME IN AVALANCHE (ms) VDS , DRAIN TO SOURCE VOLTAGE (V) NOTE: Refer to ON Semiconductor Application Notes AN9321 and FIGURE 5. FORWARD BIAS SAFE OPERATING AREA AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY 100 100 80 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VGS = 6V VGS = 20V VGS = 10V 60 VGS = 7V 40 VGS = 5V 20 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TC = 25oC 0 0 1 2 3 4 5 6 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 15V 80 175oC 60 40 20 25oC -55oC 0 0 7 1.5 3.0 4.5 6.0 VGS , GATE TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 7. SATURATION CHARACTERISTICS FIGURE 8. TRANSFER CHARACTERISTICS www.onsemi.com 4 7.5 HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 Typical Performance Curves 1.2 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 56A VGS = VDS, ID = 250A NORMALIZED GATE 2.5 2.0 1.5 1.0 THRESHOLD VOLTAGE NORMALIZED DRAIN TO SOURCE ON RESISTANCE 3.0 (Continued) 1.0 0.8 0.5 0 0.6 -80 -40 0 40 80 120 160 200 -80 -40 TJ, JUNCTION TEMPERATURE (oC) 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 1.2 3000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD ID = 250A 2500 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 0 1.1 1.0 2000 CISS 1500 1000 COSS 500 CRSS 0.9 -80 0 -40 0 40 80 120 160 200 0 10 TJ , JUNCTION TEMPERATURE (oC) 20 50 60 FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 10 VGS , GATE TO SOURCE VOLTAGE (V) 40 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 8 6 4 WAVEFORMS IN DESCENDING ORDER: ID = 56A ID = 37A ID = 18A 2 VDD = 50V 0 0 30 10 20 30 40 50 60 Qg, GATE CHARGE (nC) NOTE: Refer to ON Semiconductor Application Notes AN7254 and AN7260. FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT www.onsemi.com 5 HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN REQUIRED PEAK IAS + RG - VGS VDS IAS VDD VDD DUT tP 0V IAS 0 0.01 tAV FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS VDS VDD RL Qg(TOT) VDS VGS = 20V VGS Qg(10) + VDD VGS = 10V VGS DUT VGS = 2V IG(REF) 0 Qg(TH) Qgs Qgd Ig(REF) 0 FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 17. GATE CHARGE WAVEFORM VDS tON tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% + VGS - VDD 10% 10% 0 DUT 90% RGS VGS VGS 0 FIGURE 18. SWITCHING TIME TEST CIRCUIT 10% 50% 50% PULSE WIDTH FIGURE 19. RESISTIVE SWITCHING WAVEFORMS www.onsemi.com 6 HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 PSPICE Electrical Model SUBCKT HUF75639 2 1 3 ; rev Oct. 98 CA 12 8 2.8e-9 CB 15 14 2.65e-9 CIN 6 8 1.9e-9 LDRAIN DPLCAP DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD 10 DBREAK + RSLC2 5 51 ESLC 11 - RDRAIN 6 8 ESG EVTHRES + 19 8 + LGATE GATE 1 RLGATE 1 9 10 RLDRAIN 2 5 20 RLSOURCE 3 7 4.69 EVTEMP RGATE + 18 22 9 20 21 EBREAK 17 18 DBODY - 16 MWEAK 6 MMED MSTRO RLGATE LSOURCE CIN 8 SOURCE 3 7 RSOURCE MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RLSOURCE S1A 12 RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 1.3e-2 RGATE 9 20 0.7 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 4.5e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 + 50 - IT 8 17 1 S1A S1B S2A S2B RLDRAIN RSLC1 51 EBREAK 11 7 17 18 110 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1 LDRAIN 2 5 2e-9 LGATE 1 9 1e-9 LSOURCE 3 7 0.47e-9 DRAIN 2 5 S2A 13 8 14 13 S1B CA RBREAK 15 17 18 RVTEMP S2B 13 CB 6 8 EGS 19 VBAT 5 8 EDS - - IT 14 + + - + 8 22 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD RVTHRES VBAT 22 19 DC 1 ESLC 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*115),4))} .MODEL DBODYMOD D (IS = 1.4e-12 RS = 3.3e-3 XTI = 4.7 TRS1 = 2e-3 TRS2 = 0.1e-5 CJO = 3.3e-9 TT = 6.1e-8 M = 0.7) .MODEL DBREAKMOD D (RS = 3.5e- 1TRS1 = 1e- 3TRS2 = 1e-6) .MODEL DPLCAPMOD D (CJO = 2.2e- 9IS = 1e-3 0N = 10 M = 0.95 vj = 1.0) .MODEL MMEDMOD NMOS (VTO = 3.5 KP = 4.8 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u Rg = 0.7) .MODEL MSTROMOD NMOS (VTO = 3.97 KP = 56.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO =3.11 KP = 0.085 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 7 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 0.8e- 3TC2 = 1e-6) .MODEL RDRAINMOD RES (TC1 = 1e-2 TC2 = 1.75e-5) .MODEL RSLCMOD RES (TC1 = 2.8e-3 TC2 = 14e-6) .MODEL RSOURCEMOD RES (TC1 = 0 TC2 = 0) .MODEL RVTHRESMOD RES (TC = -2.0e-3 TC2 = -1.75e-5) .MODEL RVTEMPMOD RES (TC1 = -2.75e- 3TC2 = 0.05e-9) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -6.0 VOFF = -3.5) VON = -3.5 VOFF = -6.0) VON = -2.5 VOFF = 4.95) VON = 4.95 VOFF = -2.5) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. www.onsemi.com 7 HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 SABER Electrical Model nom temp=25 deg c 100v Ultrafet REV Oct. 98 template huf75639 n2,n1,n3 electrical n2,n1,n3 { var i iscl d..model dbodymod = (is=1.4e-12, xti=4.7, cjo=33e-10,tt=6.1e-8, m=0.7) d..model dbreakmod = () d..model dplcapmod = (cjo=22e-10,is=1e-30,n=10,m=0.95, vj=1.0) m..model mmedmod = (type=_n,vto=3.5,kp=4.8,is=1e-30, tox=1) m..model mstrongmod = (type=_n,vto=3.97,kp=56.5,is=1e-30, tox=1) m..model mweakmod = (type=_n,vto=3.11,kp=0.085,is=1e-30, tox=1) sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-6.0,voff=-3.5) sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-3.5,voff=-6.0) sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-2.5,voff=4.95) sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=4.95,voff=-2.5) LDRAIN DPLCAP 10 d.dbody n7 n71 = model=dbodymod d.dbreak n72 n11 = model=dbreakmod d.dplcap n10 n5 = model=dplcapmod LGATE 72 ISCL RDRAIN 6 8 EVTHRES + 19 8 EVTEMP RGATE + 18 22 9 20 21 71 11 16 MWEAK DBODY 6 EBREAK + 17 18 MMED MSTRO CIN i.it n8 n17 = 1 RDBODY DBREAK 50 - RLGATE - 8 LSOURCE SOURCE 3 7 RSOURCE l.ldrain n2 n5 = 2.0e-9 l.lgate n1 n9 = 1e-9 l.lsource n3 n7 = 4.69e-10 RLSOURCE S1A 12 m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u S2A 13 8 RBREAK 15 14 13 S1B CA res.rbreak n17 n18 = 1, tc1=0.8e-3,tc2=-1e-6 res.rdbody n71 n5 = 3.3e-3, tc1=2.0e-3, tc2=0.1e-5 res.rdbreak n72 n5 = 3.5e-1, tc1=1e-3, tc2=1e-6 res.rdrain n50 n16 = 13e-3, tc1=1e-2,tc2=1.75e-5 res.rgate n9 n20 = 0.7 res.rldrain n2 n5 = 20 res.rlgate n1 n9 = 10 res.rlsource n3 n7 = 4.69 res.rslc1 n5 n51 = 1e-6, tc1=2.8e-3,tc2=14e-6 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 4.5e-3, tc1=0,tc2=0 res.rvtemp n18 n19 = 1, tc1=-2.75e-3,tc2=0.05e-9 res.rvthres n22 n8 = 1, tc1=-2e-3,tc2=-1.75e-5 RDBREAK RSLC2 + GATE 1 RLDRAIN RSLC1 51 ESG c.ca n12 n8 = 28.5e-10 c.cb n15 n14 = 26.5e-10 c.cin n6 n8 = 19e-10 DRAIN 2 5 17 18 RVTEMP S2B 13 CB 6 8 EGS 19 VBAT 5 8 EDS - - IT 14 + + - + 8 22 RVTHRES spe.ebreak n11 n7 n17 n18 = 110 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/115))** 4)) } } www.onsemi.com 8 HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 Spice Thermal Model TH JUNCTION REV APRIL 1998 HUF75639 CTHERM1 TH 6 2.8e-3 CTHERM2 6 5 4.6e-3 CTHERM3 5 4 5.5e-3 CTHERM4 4 3 9.2e-3 CTHERM5 3 2 1.7e-2 CTHERM6 2 TL 4.3e-2 RTHERM1 RTHERM1 TH 6 5.0e-4 RTHERM2 6 5 1.5e-3 RTHERM3 5 4 2.0e-2 RTHERM4 4 3 9.0e-2 RTHERM5 3 2 1.9e-1 RTHERM6 2 TL 2.9e-1 RTHERM2 CTHERM1 6 CTHERM2 5 RTHERM3 CTHERM3 Saber Thermal Model Saber thermal model HUF75639 template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 6 = 2.8e-3 ctherm.ctherm2 6 5 = 4.6e-3 ctherm.ctherm3 5 4 = 5.5e-3 ctherm.ctherm4 4 3 = 9.2e-3 ctherm.ctherm5 3 2 = 1.7e-2 ctherm.ctherm6 2 tl = 4.3e-2 rtherm.rtherm1 th 6 = 5.0e-4 rtherm.rtherm2 6 5 = 1.5e-3 rtherm.rtherm3 5 4 = 2.0e-2 rtherm.rtherm4 4 3 = 9.0e-2 rtherm.rtherm5 3 2 = 1.9e-1 rtherm.rtherm6 2 tl = 2.9e-1 } 4 RTHERM4 CTHERM4 3 RTHERM5 CTHERM5 2 RTHERM6 CTHERM6 TL www.onsemi.com 9 CASE ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. "Typical" parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com (c) Semiconductor Components Industries, LLC N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5817-1050 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative www.onsemi.com