SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325G – MARCH 1996 – REVISED JULY 2003
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Wide Operating Voltage Range of 2 V to 6 V
D
Typical Switch Enable Time of 18 ns
D
Low Power Consumption, 20-µA Max ICC
D
Low Input Current of 1 µA Max
D
High Degree of Linearity
D
High On-Off Output-Voltage Ratio
D
Low Crosstalk Between Switches
D
Low On-State Impedance ...
50-Ω TYP at VCC = 6 V
D
Individual Switch Controls
description/ordering information
The SN74HC4066 is a silicon-gate CMOS quadruple analog switch designed to handle both analog and digital
signals. Each switch permits signals with amplitudes of up to 6 V (peak) to be transmitted in either direction.
Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the
associated switch section.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP – N T ube of 25 SN74HC4066N SN74HC4066N
T ube of 50 SN74HC4066D
SOIC – D Reel of 2500 SN74HC4066DR HC4066
Reel of 250 SN74HC4066DT
–40°C to 85°CSOP – NS Reel of 2000 SN74HC4066NSR HC4066
SSOP – DB Reel of 2000 SN74HC4066DBR HC4066
T ube of 90 SN74HC4066PW
TSSOP – PW Reel of 2000 SN74HC4066PWR HC4066
Reel of 250 SN74HC4066PWT
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each switch)
INPUT
CONTROL
(C) SWITCH
L OFF
H ON
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
2B
2A
2C
3C
GND
VCC
1C
4C
4A
4B
3B
3A
D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325G – MARCH 1996 – REVISED JULY 2003
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram, each switch (positive logic)
A
VCC VCC
B
One of Four Switches
C
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control-input diode current, II (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O port diode current, II (VI < 0 or VI/O > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
On-state switch current (VI/O = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltages are with respect to ground unless otherwise specified.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325G – MARCH 1996 – REVISED JULY 2003
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
MIN NOM MAX UNIT
VCC Supply voltage 2†5 6 V
VI/O I/O port voltage 0 VCC V
VCC = 2 V 1.5 VCC
VIH High-level input voltage, control inputs VCC = 4.5 V 3.15 VCC V
VCC = 6 V 4.2 VCC
VCC = 2 V 0 0.3
VIL Low-level input voltage, control inputs VCC = 4.5 V 0 0.9 V
VCC = 6 V 0 1.2
VCC = 2 V 1000
∆t/∆vInput transition rise/fall time VCC = 4.5 V 500 ns
VCC = 6 V 400
TAOperating free-air temperature –40 85 °C
†With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. It is recommended that only digital signals
be transmitted at these low supply voltages.
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
TA = 25
_
C
MIN
MAX
UNIT
PARAMETER
TEST
CONDITIONS
V
CC MIN TYP MAX
MIN
MAX
UNIT
I1AV 0tV
2 V 150
ron On-state switch resistance IT = –1 mA, VI = 0 to VCC,
VC=V
IH (see Figure 1)
4.5 V 50 85 106 Ω
VC
=
VIH
(see
Figure
1)
6 V 30
V V GND V V
2 V 320
ron
(
p
)
Peak on-state resistance VI = VCC or GND, VC = VIH,
IT=
–
1mA
4.5 V 70 170 215 Ω
()
IT
=
–
1
mA
6 V 50
IIControl input current VC = 0 or VCC 6 V ±0.1 ±100 ±1000 nA
Isoff Off-state switch leakage current VI = VCC or 0, VO = VCC or 0,
VC = VIL (see Figure 2) 6 V ±0.1 ±5µA
Ison On-state switch leakage current VI = VCC or 0, VC = VIH
(see Figure 3) 6 V ±0.1 ±5µA
ICC Supply current VI = 0 or VCC, IO = 0 6 V 2 20 µA
Ci
In
p
ut ca
p
acitance
A or B
5V
9p
F
C
i
Input
capacitance
C
5
V
3 10 10
pF
CfFeed-through
capacitance A to B VI = 0 0.5 pF
CoOutput capacitance A or B 5 V 9 pF
SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325G – MARCH 1996 – REVISED JULY 2003
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range
PARAMETER
FROM TO TEST
VCC
TA = 25
_
C
MIN
MAX
UNIT
PARAMETER
(INPUT) (OUTPUT) CONDITIONS
V
CC MIN TYP MAX
MIN
MAX
UNIT
t
Pti
2 V 10 60 75
tPLH,
tPHL
Propagation
delay time
A or B B or A CL = 50 pF
4.5 V 4 12 15 ns
tPHL
delay
time
6 V 3 10 13
t
Sith
=
2 V 70 180 225
tPZH,
tPZL
Switch
turn
-
on time
CA or B
,
CL = 50 pF 4.5 V 21 36 45 ns
tPZL
turn-on
time
(see Figure 5) 6 V 18 31 38
t
Sith
=
2 V 50 200 250
tPLZ,
tPHZ
Switch
turn
-
off time
CA or B
,
CL = 50 pF 4.5 V 25 40 50 ns
tPHZ
turn-off
time
(see Figure 5) 6 V 22 34 43
Control
CL = 15 pF,
2 V 15
fI
Control
input
frequency
CA or B
=
,
VC = VCC or GND,
4.5 V 30 MHz
f
requency
O =
CC
(see Figure 6) 6 V 30
Control
feed-through
C
AorB
CL = 50 pF,
Rin = RL = 600 Ω,
4.5 V 15 mV
feed
-
through
noise
C
A
or
B
C =
CC
,
fin = 1 MHz
(see Figure 7) 6 V 20 (rms)
operating characteristics, VCC = 4.5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance per gate CL = 50 pF, f = 1 MHz 45 pF
Minimum through bandwidth, A to B or B to A† [20 log (VO/VI)] = –3 dB CL = 50 pF,
VC = VCC RL = 600 Ω,
(see Figure 8) 30 MHz
Crosstalk between any switches‡CL = 10 pF,
fin = 1 MHz RL = 50 Ω,
(see Figure 9) 45 dB
Feed through, switch off, A to B or B to A‡CL = 50 pF,
fin = 1 MHz RL = 600 Ω,
(see Figure 10) 42 dB
Amplitude distortion rate, A to B or B to A CL = 50 pF,
fin = 1 kHz RL = 10 kΩ,
(see Figure 11) 0.05%
†Adjust the input amplitude for output = 0 dBm at f = 1 MHz. Input signal must be a sine wave.
‡Adjust the input amplitude for input = 0 dBm at f = 1 MHz. Input signal must be a sine wave.
SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325G – MARCH 1996 – REVISED JULY 2003
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC
VI = VCC
VC = VIH
1.0 mA –+
VO
ron
+
VI–O
10–3
W
VI–O
VCC
GND
(ON)
V
Figure 1. On-State Resistance Test Circuit
VCC
VC = VIL
AB
VS = VA – VB
CONDITION 1: VA = 0, VB = VCC
CONDITION 2: VA = VCC, VB = 0
VCC
GND
(OFF)
A
Figure 2. Off-State Switch Leakage-Current Test Circuit
SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325G – MARCH 1996 – REVISED JULY 2003
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC
VC = VIH
AB
Open
VCC
VA = VCC TO GND
VCC
GND
(ON)
A
Figure 3. On-State Leakage-Current Test Circuit
VCC
VC = VIH
VIVO
50 pF
TEST CIRCUIT
tPLH tPHL
50% 50%
VCC
0 V
50% 50% VOH
VOL
VI
A or B
VO
B or A
VOLTAGE WAVEFORMS
50 Ω
tr
90%
10%
tf
10%
90%
VCC
GND
(ON)
Figure 4. Propagation Delay Time, Signal Input to Signal Output
SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325G – MARCH 1996 – REVISED JULY 2003
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
CL
50 pF
GND
VCC
VIVO
TEST CIRCUIT
tPLZ
50%
VOLTAGE WAVEFORMS
RL
1 kΩ
10%
S1
VC
50 Ω
S2
tPZH
tPHZ
50%
50%
50%
90%
tPZL
tPZH
tPLZ
tPHZ
GND
VCC
GND
VCC
TEST S1 S2
VCC
GND
VCC
GND
tPZL
50%
VCC
VO50%
0 V
VOL
VOH
VC
(tPZL, tPZH)
(tPLZ, tPHZ)
VCC
VCC
VO
0 V
VOL
VOH
VC
VCC
0 V
VOL
VOH
VCC
0 V
VOL
VOH
Figure 5. Switching Time (tPZL, tPLZ, tPZH, tPHZ), Control to Signal Output
SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325G – MARCH 1996 – REVISED JULY 2003
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC
GND
VO
RL
1 kΩCL
15 pF
VCC
VC
50 Ω
VI = VCC
VCC
VC0 V
VCC/2
Figure 6. Control-Input Frequency
VCC
GND VO
RL
600 ΩCL
50 pF
VCC
VC
50 Ω
VI
VCC/2
Rin
600 Ω
VCC/2
trtf
90%
10%
(f = 1 MHz)
tr = tf = 6 ns
90%
10%
VCC
VC0 V
Figure 7. Control Feed-Through Noise
VO
VCC
50 Ω
fin
VCC/2
VC = VCC
0.1 µFVIVI
(VI = 0 dBm at f = 1 MHz)
VCC
GND
(ON)
RL
600 ΩCL
50 pF
Figure 8. Minimum Through Bandwidth
SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325G – MARCH 1996 – REVISED JULY 2003
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VO1
RL
600 Ω CL
50 pF
VCC
50 Ω
fin
VCC/2
VC = VCC
0.1 µF
VI
VI
(VI = 0 dBm at f = 1 MHz)
VO2
VCC
Rin
600 Ω
VCC/2
VC = GND
Rin
600 Ω
VCC
GND
(ON)
VCC
GND
(OFF) RL
600 Ω CL
50 pF
Figure 9. Crosstalk Between Any Two Switches
VO
VCC
50 Ω
fin
VC = GND
0.1 µFVIVI
(VI = 0 dBm at f = 1 MHz)
VCC
GND
(OFF)
Rin
600 Ω RL
600 Ω CL
50 pF
VCC/2 VCC/2
Figure 10. Feed Through, Switch Off
VI
(VI = 0 dBm at f = 1 kHz)
VO
RL
10 kΩCL
50 pF
VCC
VCC/2
VC = VCC
10 µF
VI
fin VCC
GND
(ON)
Figure 11. Amplitude-Distortion Rate
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN74HC4066D ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI
SN74HC4066DBR ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DE4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DRE4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DT ACTIVE SOIC D 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DTE4 ACTIVE SOIC D 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066DTG4 ACTIVE SOIC D 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066N ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN74HC4066NE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN74HC4066NSR ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066NSRG4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066PW ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066PWE4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
SN74HC4066PWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066PWT ACTIVE TSSOP PW 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74HC4066PWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
no Sb/Br)
SN74HC4066PWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74HC4066DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN74HC4066DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74HC4066DT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74HC4066NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
SN74HC4066PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74HC4066PWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74HC4066DBR SSOP DB 14 2000 367.0 367.0 38.0
SN74HC4066DR SOIC D 14 2500 367.0 367.0 38.0
SN74HC4066DT SOIC D 14 250 367.0 367.0 38.0
SN74HC4066NSR SO NS 14 2000 367.0 367.0 38.0
SN74HC4066PWR TSSOP PW 14 2000 367.0 367.0 35.0
SN74HC4066PWT TSSOP PW 14 250 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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