Dual 0.275% Comparators and Reference with Programmable Hysteresis ADCMP341/ADCMP343 FEATURES FUNCTIONAL BLOCK DIAGRAMS VDD 400 mV 0.275% threshold User programmable hysteresis via resistor string Supply range: 1.7 V to 5.5 V Low quiescent current: 6.5 A typical Input range includes ground Low input bias current: 5 nA maximum Open-drain outputs Supports wired-AND connections Input polarities: ADCMP341 noninverting ADCMP343 inverting Small SOT-23 package R2 OUTA R3 400mV VINB OUTB 06500-001 +INB_L MUX +INB_U GND Figure 1. ADCMP341 Portable applications Li-Ion monitoring Handheld instruments LED/relay driving Optoisolator driving Control systems VDD R1 -INA_U R2 -INA_L MUX ADCMP343 VINA GENERAL DESCRIPTION OUTA R3 400mV The ADCMP341/ADCMP343 consist of two low power, high accuracy comparators with a 400 mV reference in an 8-lead SOT-23 package. Operating within a supply range of 1.7 V to 5.5 V, the devices only draw 6.5 A (typical), making them ideal for low voltage system monitoring and portable applications. VINB OUTB GND 06500-002 -INB_L MUX -INB_U Figure 2. ADCMP343 R1 = 22k R2 = 2.2k R3 = 6.2k 1 OUTA VIN 2 CH1 2.00V CH2 500mV M100ms 06500-029 The comparator outputs are open-drain with the output stage sinking capability guaranteed greater than 5 mA over temperature. The ADCMP341 has noninverting inputs and the ADCMP343 has inverting inputs. The devices are suitable for portable, commercial, industrial, and automotive applications. +INA_L MUX R1 +INA_U APPLICATIONS Hysteresis is determined using three resistors in a string configuration with the upper and lower tap points connected to the INA_U and INA_L pins of each comparator, respectively. The state of the outputs of the comparators selects which pin is internally connected to the comparators input. Therefore, a change of state in the comparators output results in one of the inputs being switched in to the comparator and the other being switched out. This provides the user with a fully flexible and accurate method of setting the hysteresis. One input of each comparator is internally connected to the reference. The other input is available externally, via an internal mux, through pins INA_U or INA_L. The state of the output determines which of these pins is connected at any one time. ADCMP341 VINA Figure 3. Hysteresis programmed to 513 mV @ VIN on ADCMP341 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007 Analog Devices, Inc. All rights reserved. ADCMP341/ADCMP343 TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................6 Applications....................................................................................... 1 Application Information................................................................ 10 General Description ......................................................................... 1 Comparators and Internal Reference ...................................... 10 Functional Block Diagrams............................................................. 1 Power Supply............................................................................... 10 Revision History ............................................................................... 2 Inputs ........................................................................................... 10 Specifications..................................................................................... 3 Outputs ........................................................................................ 10 Absolute Maximum Ratings............................................................ 4 Programming Hysteresis ........................................................... 10 Thermal Characteristics .............................................................. 4 Layout Recommendations ........................................................ 10 ESD Caution.................................................................................. 4 Outline Dimensions ....................................................................... 11 Pin Configurations and Function Descriptions ........................... 5 Ordering Guide .......................................................................... 11 REVISION HISTORY 2/07--Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADCMP341/ADCMP343 SPECIFICATIONS VDD = 1.7 V to 5.5 V, -40C TA +125C, unless otherwise noted. Table 1. Parameter THRESHOLD 1 Threshold Voltage Min Typ Max 396.6 399.3 398.5 395.0 397.4 396.9 391.2 393.4 393.2 400.4 400.4 400.4 400.4 400.4 400.4 400.4 400.4 400.4 404.3 401.5 402.2 405.8 403.4 403.7 407.7 405.6 405.8 0.275 Unit Test Conditions/Comments mV mV mV mV mV mV mV mV mV % ppm/C VDD = 1.7 V, TA = 25C VDD = 3.3 V, TA = 25C VDD = 5.5 V, TA = 25C VDD = 1.7 V, 0C TA 70C VDD = 3.3 V, 0C TA 70C VDD = 5.5 V, 0C TA 70C VDD = 1.7 V, -40C TA +125C VDD = 3.3 V, -40C TA +125C VDD = 5.5 V, -40C TA +125C TA = 25C, VDD = 3.3 V D Threshold Voltage Accuracy Threshold Voltage Temperature Coefficient POWER SUPPLY Supply Current INPUT CHARACTERISTICS Input Bias Current OPEN-DRAIN OUTPUTS Output Low Voltage 2 Output Leakage Current 3 DYNAMIC PERFORMANCE2, 4 High-to-Low Propagation Delay Low-to-High Propagation Delay Output Rise Time Output Fall Time 16 6.5 7.0 9 10 A A VDD = 1.7 V VDD = 5.5 V 0.01 0.01 5 5 nA nA VDD = 1.7 V, VIN = VDD VDD = 1.7 V, VIN = 0.1 V 140 140 0.01 0.01 220 220 1 1 mV mV A A VDD = 1.7 V, IOUT = 3 mA VDD = 5.5 V, IOUT = 5 mA VDD = 1.7 V, VOUT = VDD VDD = 1.7 V, VOUT = 5.5 V s s s s VDD = 5 V, VOL = 400 mV VDD = 5 V, VOH = 0.9 x VDD VDD = 5 V, VO = (0.1 to 0.9) x VDD VDD = 5 V, VO = (0.1 to 0.9) x VDD 10 8 0.5 0.07 1 RL = 100 k, VO = 2 V swing. 10 mV input overdrive. 3 VIN = 40 mV overdrive. 4 RL = 10 k. 2 Rev. 0 | Page 3 of 12 ADCMP341/ADCMP343 ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS Table 2. Parameter VDD INA_U, INA_L, INB_U, INB_L OUTA, OUTB Operating Temperature Range Storage Temperature Range Lead Temperature Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Rating -0.3 V to +6 V -0.3 V to +6 V -0.3 V to +6 V -40C to +125C -65C to +150C Table 3. Thermal Resistance Package Type 8-Lead SOT-23 300C 215C 220C ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 4 of 12 JA 211.5 Unit C/W ADCMP341/ADCMP343 1 +INA_U 2 ADCMP341 +INA_L 3 TOP VIEW (Not to Scale) GND 4 8 OUTB 7 VDD 6 +INB_U 5 +INB_L Figure 4. ADCMP341 Pin Configuration OUTA 1 -INA_U 2 -INA_L 3 GND 4 8 OUTB ADCMP343 7 VDD TOP VIEW (Not to Scale) 6 -INB_U 5 -INB_L 06500-004 OUTA 06500-003 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 5. ADCMP343 Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 Mnemonic OUTA INA_U 3 INA_L 4 5 GND INB_L 6 INB_U 7 8 VDD OUTB Description Open-Drain Output for Comparator A. Monitors Analog Input Voltage on Comparator A. Connect to the upper tap point of the resistor string. Connect internally to the noninverting input on the ADCMP341 or the inverting pin on the ADCMP343 via a mux controlled by the output level on Comparator A. The other input of Comparator A is connected to a 400 mV reference. Monitors Analog Input Voltage on Comparator A. Connect to the lower tap point of the resistor string. Connect internally to the noninverting input on the ADCMP341 or the inverting pin on the ADCMP343 via a mux controlled by the output level on Comparator A. The other input of Comparator A is connected to a 400 mV reference. Ground. Monitors Analog Input Voltage on Comparator B. Connect to the lower tap point of the resistor string. Connect internally to the noninverting input on the ADCMP341 or the inverting pin on the ADCMP343 via a mux controlled by the output level on Comparator B. The other input of Comparator B is connected to a 400 mV reference. Monitors Analog Input Voltage on Comparator B. Connect to the upper tap point of the resistor string. Connect internally to the noninverting input on the ADCMP341 or the inverting pin on the ADCMP343 via a mux controlled by the output level on Comparator B. The other input of Comparator B is connected to a 400 mV reference. Power Supply Pin. Open-Drain Output for Comparator B. Rev. 0 | Page 5 of 12 ADCMP341/ADCMP343 TYPICAL PERFORMANCE CHARACTERISTICS 404 RISING INPUT THRESHOLD VOLTAGE (mV) VDD = 5V TA = 25C 40 30 20 394 395 396 397 398 399 400 401 402 403 404 405 406 RISING INPUT THRESHOLD VOLTAGE (mV) 0 20 40 60 80 100 120 Figure 9. Rising Input Threshold Voltage vs. Temperature 1 TA = -40C 400 0 THRESHOLD SHIFT (mV) TA = +25C 399 TA = +85C 398 397 TA = +125C 396 TA = -40C TA = +25C TA = +85C TA = +125C -1 -2 -3 -4 395 1.7 2.2 2.7 3.2 3.7 4.2 4.7 5.2 5.7 SUPPLY VOLTAGE (V) -5 1.5 10 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 SUPPLY VOLTAGE (V) Figure 7. Rising Input Threshold Voltage vs. Supply Voltage Figure 10. Minimum Supply Voltage 50 NO LOAD CURRENT 9 8 SUPPLY CURRENT (A) 40 TA = +125C TA = +85C 7 TA = +25C 6 TA = -40C 4 1.7 2.2 2.7 30 20 TA = +25C 10 5 3.2 3.7 4.2 4.7 5.2 SUPPLY VOLTAGE (V) 06500-008 SUPPLY CURRENT (mA) -20 TEMPERATURE (C) 06500-007 RISING INPUT THRESHOLD VOLTAGE (mV) 398 396 -40 Figure 6. Distribution of Rising Input Threshold Voltage 401 400 06500-009 0 06500-005 10 402 FOUR TYPICAL PARTS VDD = 5V Figure 8. Quiescent Supply Current vs. Supply Voltage 0 TA = +85C TA = +125C TA = -40C 0 0.5 1.0 SUPPLY VOLTAGE (V) Figure 11. Start-Up Supply Current Rev. 0 | Page 6 of 12 1.5 06500-010 PERCENT OF UNITS (%) 50 1 2 3 4 06500-006 60 ADCMP341/ADCMP343 1000 100 10 1 0.001 0.01 0.1 1 10 100 OUTPUT SINK CURRENT (mA) TA = 25C 10 1 0.001 0.01 0.1 10k = 5.0V = 3.3V = 2.5V = 1.7V 1k 100 10 100 OUTPUT SINK CURRENT (mA) TA = -40C 0.1 -0.3 06500-013 1 -0.2 Figure 16. Below Ground Input Bias Current 10 INPUT BIAS CURRENT (nA) 1 TA = +125C TA = +85C TA = +25C TA = -40C -1 -3 -5 0 0.2 0.4 0.6 0.8 INPUT VOLTAGE (V) 1.0 06500-015 CURRENT IS POSITIVE GOING INTO THE DEVICE. VDD = 5V 0V < VIB < 1V TA = +125C 1 TA = +85C TA = +25C 0.1 0.01 TA = -40C CURRENT IS GOING INTO THE DEVICE VDD = 5V VIB > 1V 1 2 3 4 INPUT VOLTAGE (V) Figure 17. High Level Input Bias Current Figure 14. Low Level Input Bias Current Rev. 0 | Page 7 of 12 5 06500-016 3 INPUT BIAS CURRENT (nA) 0 -0.1 INPUT VOLTAGE (V) Figure 13. Supply Current vs. Output Sink Current -7 TA = +85C TA = +25C 10 1 0.1 100 CURRENT IS GOING OUT OF THE DEVICE. VDD = 5V -0.3V < VIB < 0V TA = +125C 10 0.01 10 Figure 15. Supply Current vs. Output Sink Current 100 1 0.001 1 OUTPUT SINK CURRENT (mA) INPUT BIAS CURRENT (nA) SUPPLY CURRENT (A) VDD VDD VDD VDD TA = 85C = 5.0V = 3.3V = 2.5V = 1.7V 100 Figure 12. Supply Current vs. Output Sink Current 1000 VDD VDD VDD VDD 06500-012 SUPPLY CURRENT (A) = 5.0V = 3.3V = 2.5V = 1.7V 06500-014 VDD VDD VDD VDD TA = -40C 06500-011 SUPPLY CURRENT (A) 1000 ADCMP341/ADCMP343 1000 100 10 1 0.001 0.01 0.1 1 10 OUTPUT SINK CURRENT (mA) 10 0.1 1 10 Figure 21. Output Saturation Voltage vs. Output Sink Current 80 TA = 85C VDD = 5.0V VDD = 3.3V VDD = 2.5V VDD = 1.8V VDD = 5V SHORT-CIRCUIT CURRENT (mA) 10 TA = -40C TA = +25C 70 100 60 50 TA = +85C TA = +125C 40 30 20 0.1 1 10 OUTPUT SINK CURRENT (mA) 0 0 Figure 19. Output Saturation Voltage vs. Output Sink Current 70 OUTPUT LEAKAGE CURRENT (nA) 60 50 VDD = 3.3V 30 VDD = 2.5V 20 VDD = 1.8V 0 2 4 OUTPUT VOLTAGE (V) 06500-021 10 0 VDD = 5V VDD = 5.0V 40 4 Figure 22. Short-Circuit Current vs. Output Voltage 10 TA = 25C 2 OUTPUT VOLTAGE (V) Figure 20. Short-Circuit Current vs. Output Voltage TA = +125C 1 TA = +85C TA = +25C 0.1 TA = -40C 0.01 0.001 0 1 2 3 4 OUTPUT VOLTAGE (V) Figure 23. Output Leakage Current vs. Output Voltage Rev. 0 | Page 8 of 12 5 06500-022 0.01 06500-020 10 1 0.001 SHORT-CIRCUIT CURRENT (mA) 0.01 OUTPUT SINK CURRENT (mA) 06500-019 OUTPUT SATURATION VOLTAGE (mV) 100 1 0.001 Figure 18. Output Saturation Voltage vs. Output Sink Current 1000 TA = -40C VDD = 5.0V VDD = 3.3V VDD = 2.5V VDD = 1.8V 06500-018 OUTPUT SATURATION VOLTAGE (mV) TA = 25C VDD = 5.0V VDD = 3.3V VDD = 2.5V VDD = 1.8V 06500-017 OUTPUT SATURATION VOLTAGE (mV) 1000 ADCMP341/ADCMP343 60 RISE AND FALL TIMES (s) 50 40 30 20 VDD = 5V CL = 20pF TA = 25C 10 RISE 1 0.1 10 0 20 40 60 80 100 INPUT OVERDRIVE (mV) 06500-023 0 FALL 0.01 0.1 1 10 100 1000 OUTPUT PULL-UP RESISTOR (k) Figure 24. Propagation Delay vs. Input Overdrive Figure 26. Rise and Fall Times vs. Output Pull-Up Resistor R1 = 22k R2 = 2.2k R3 = 6.2k NON INV (OUTA) 2 INV (OUTB) 1 OUTA 3 VIN (+INA, -INB) 1 VIN CH2 5.00V M20.0s CH1 7mV CH1 2.00V Figure 25. Noninverting and Inverting Comparators Propagation Delay Rev. 0 | Page 9 of 12 CH2 500mV M100ms 06500-026 CH1 50.0mV CH3 5.00V 06500-024 2 Figure 27. Hysteresis Programmed to ~513 mV at Top of Input String (Hysteresis at ADCMP341 Pins 104 mV) 06500-025 PROPAGATION DELAY (s) 100 LH NON INV LH INV HL NON INV HL INV TA = 25C ADCMP341/ADCMP343 APPLICATION INFORMATION I R3 >> I BIAS R3 is therefore R3 = Now R2 can be calculated from the following: COMPARATORS AND INTERNAL REFERENCE R3 (VRISING - VFALLING ) VFALLING R1 can then be calculated using the following equation: V R1 = R3 x RISING - 1 - R2 V REF where: VREF is the specified on chip reference. IBIAS is the maximum specified input bias current. R1, R2, and R3 are the three resistors as shown in Figure 28. IR3 is the current flowing through R3. VFALLING is the desired falling trip voltage and lower of the two. VRISING is the desired rising trip voltage and higher of the two. VDD ADCMP341 VINA POWER SUPPLY R1 +INA_U R2 +INA_L OUTA R3 The ADCMP341/ADCMP343 are designed to operate from 1.7 V to 5.5 V. A 0.1 F decoupling capacitor is recommended between VDD and GND. INPUTS The comparator inputs are limited to the maximum VDD voltage range. The voltage on these inputs can be above VDD but never above the maximum allowed VDD voltage. OUTPUTS The open-drain comparator outputs are limited to the maximum specified VDD voltage range, regardless of the VDD voltage. These outputs are capable of sinking up to 40 mA. Outputs can be tied together to provide a common output signal. 400mV 06500-027 There are two input pins available to each comparator. However, these two input pins (INx_U, INx_L) connect to the same input leg of the comparator via a muxing system. This is to provide fully programmable rising and falling trip points. The output of the comparator determines which pin is connected to the input of the same comparator. Using Figure 28 as an example, when OUTA is high, +INA_U is connected to the comparator input. When the input voltage drops and passes below the 400 mV reference, the output goes low. This in turn disconnects +INA_U from the comparator and connects +INA_L. This leg of the string is at a lower voltage and thus instantaneously the effect of hysteresis is applied. Therefore, using a resistor string on the input as shown in Figure 28, the voltages for the rising and falling trip points can be programmed by selecting the appropriate resistors in the string. R2 = Figure 28. Programming Hysteresis Example LAYOUT RECOMMENDATIONS Correct layout is very important to increase noise immunity. Long tracks from the input resistors to the device can lead to noise being coupled onto the inputs. To avoid this, it is best to place the input resistors as close as possible to the device. It is also recommended that a GND plane is used under this layout. The combination of small hysteresis and the use of a large R3 resistor further increases susceptibility to noise. In this case, a decoupling capacitor (CA, CB) may be required on the INx_U node to help reduce any noise. A recommended layout example can be seen in Figure 29. PROGRAMMING HYSTERESIS VDD GND When choosing the resistor values, the input bias current must be considered as a potential source of error. Begin by choosing a resistor value for R3, which takes into account the acceptable error introduced by the maximum specified input bias current. To reduce this error, the current flowing through the Resistor R3 should be considerably greater than the input bias current. C1 OUTA OUTB INA INB R1A R1B R2A R2B R3A R3B U1 CA CB 06500-028 Each of the comparators has one input available externally; the other comparator inputs are connected internally to the 400 mV reference. The ADCMP341 has two noninverting comparators and the ADCMP343 has two inverting comparators. VREF I R3 MUX The ADCMP341/ADCMP343 are dual, low power comparators with a built-in 400 mV reference that operates from 1.7 V to 5.5 V. The comparators are 0.275% accurate with fully programmable hysteresis, implemented using a new technique of a three-resistor string on the input. These open-drain outputs are capable of sinking up to 40 mA. Figure 29. Recommended Layout Example Rev. 0 | Page 10 of 12 ADCMP341/ADCMP343 OUTLINE DIMENSIONS 2.90 BSC 8 7 6 5 1 2 3 4 1.60 BSC 2.80 BSC PIN 1 INDICATOR 0.65 BSC 1.95 BSC 1.30 1.15 0.90 1.45 MAX 0.15 MAX 0.38 0.22 0.22 0.08 SEATING PLANE 8 4 0 0.60 0.45 0.30 COMPLIANT TO JEDEC STANDARDS MO-178-BA Figure 30. 8-Lead Small Outline Transistor Package [SOT-23] (RJ-8) Dimensions shown in millimeters ORDERING GUIDE Model ADCMP341YRJZ-REEL7 1 ADCMP343YRJZ-REEL71 1 Temperature Range -40C to +125C -40C to +125C Package Description 8-Lead SOT-23 8-Lead SOT-23 Z = Pb-free part. Rev. 0 | Page 11 of 12 Package Option RJ-8 RJ-8 Branding M8Y M91 ADCMP341/ADCMP343 NOTES (c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06500-0-2/07(0) Rev. 0 | Page 12 of 12