Si2404-D-FSR - Silicon Labs - Datasheet.Directory

AN93

Si2493/57/34/15/04 (Revisions D and D1) and Si2494/39

(Revisions A and A1) Modem Designer’s Guide

1. Introduction

The Si2494/93/57/39/34/15/04 ISOmodem chipset family consists of a 38-pin QFN (Si2494/39) or 24-pin TSSOP

(Si2493/57/34/15/04) or 16-pin SOIC (Si2493/57/34/15/04) low-voltage modem device, and a 16-pin SOIC line-

side DAA device (Si3018/10 ) co nnecting directly with the telephone local loop (Tip and Ring). This modem solution

is a complete hardware (controller-based) modem that connects to a host processor through a UART, parallel or

SPI interface. Parallel and EEPROM interfaces are available only on the 38-pin QFN or 24-pin TSSOP package

option. Refer to Table 4, “ISOmodem Capabilities,” on page 10 for available part number, capability and package

combinations. Isolation is provided by Silicon Laboratories’ isolation capacitor technology, which uses high-voltage

capacitors instead of a transformer. This isolation technology complies with global telecommunications standards

including FCC, ETSI ES 203 021, JATE, and all known country-specific requirements.

Additional features include programmable ac/dc termination and ring impedance, on-hook and off-hook intrusion

detection, Caller ID, loop voltage/loop current monitoring, overcurrent detection, ring detection, and the hook-

switch function. All required program and data memory is included in the modem device. When the modem

receives a software or hardware reset, all register settings revert to the default values stored in the on-chip

program memory. The host processor interacts with the modem controller through AT commands used to change

Silicon Laboratories representatives and distributors.

This application note is intended to supplement the Si2494/39 Revision A/A1, Si2493 Revision D/D1, and the

Si2457/34/15/04 Revision D/D1 data sheets. It provides all the hardware and software information necessary to

implement a variety of modem applications, including reference schematics, sample PCB layouts, AT command

and register re fe re nc e, co u nt ry co n fig ur at ion tables , pr og ramming examples and more. Particular topics of interest

can be easily located through the table of contents or the comprehensive index located at the back of this

document.

Figure 1. Functional Block Diagram

UART

Interface

Parallel

Interface

DSP

DAA

Interface

ROM

PLL

Clocking

XTI XTO

CLKOUT

INT

RESET

To Phone

Line

AOUT

Data Bus

Controller

Si3018/10

RXD

TXD

CTS

RTS

DCD

ESC

D0-D7

Program Bus RAM

EEPROM

Interface

EESD

EECLK

EECS

Si3000

Interface

FSYNC

SDO

SDI

MCLK

SPI

Interface

SDI

SDO

SCLK

AOUTb

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TABLE OF CONTENTS

Section Page

1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1. Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

2. Modem (System-Side) Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

2.1. Resetting the Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

2.1.1. Reset Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.1.2. Reset Strapping: General Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.1.3. Reset-Strap Options for 16-Pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . 13

2.1.4. Reset-Strap Options for 24-Pin TSSOP Package. . . . . . . . . . . . . . . . . . . . . 13

2.1.4.1. Reset Strapping Options for TSSOP-24 with UART-Interface . . . . . . . 14

2.1.4.2. Reset Strapping Options for TSSOP-24 with Parallel-Interface . . . . . . 14

2.1.4.3. Reset Strapping Options for TSSOP with SPI-Interface. . . . . . . . . . . . 15

2.1.5. Reset Strapping Options for QFN Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.1.5.1. Reset Strapping Options for QFN Parts with UART Operation . . . . . . 15

2.1.5.2. Reset Strapping Options for QFN Parts with SPI Operation . . . . . . . . 16

2.1.5.3. Reset Strapping Options for QFN Parts with Parallel Operation . . . . . 16

2.2. System Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

2.2.1. Interface Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.2.2. Interface Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.2.3. UART Interface Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.2.3.1. UART Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.2.3.2. Autobaud . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.2.3.3. Flow Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.2.4. Parallel and SPI Interface Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

2.2.4.1. Hardware Interface Register 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2.2.4.2. Hardware Interface Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2.2.4.3. Parallel Interface Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2.2.4.4. SPI Interface Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2.2.4.5. Interface Communication Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2.3. Isolation Capacitor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

2.4. Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

2.4.1. Power-Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.4.2. Wake-on-Ring Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.4.3. Sleep Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.5. Controlling GPIOs (38-Pin QFN Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30

2.6. SSI/Voice Mode (24-Pin TSSOP and 38-Pin QFN Only) . . . . . . . . . . . . . . . . . . . . .33

2.7. EEPROM Interface (24-Pin TSSOP and 38-Pin QFN Only) . . . . . . . . . . . . . . . . . . .34

2.7.1. Supported EEPROM Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

2.7.2. Three-Wire SPI Interface to EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2.7.3. Detailed EEPROM Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2.7.4. Boot Commands (Custom Defaults) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2.7.5. AT Command Macros (Customized AT Commands) . . . . . . . . . . . . . . . . . . 37

2.7.6. Firmware Upgrades. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

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2.7.6.1. Boot Command Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

2.7.6.2. AT Command Macro Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

2.7.6.3. Autoloading Firmware Upgrade Example. . . . . . . . . . . . . . . . . . . . . . . 38

2.7.6.4. Combination Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

3. DAA (Line-Side) Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

3.1. Hookswitch and DC Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

3.2. AC Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

3.3. Ringer Impedance and Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

3.4. Pulse Dialing and Spark Quenching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

3.5. Line Voltage and Loop Current Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

3.6. Legacy-Mode Line Voltage and Loop Current Measurement . . . . . . . . . . . . . . . . . .45

3.7. Billing Tone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45

4. Hardware Design Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

4.1. Component Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

4.1.1. Power Supply and Bias Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

4.1.2. Hookswitch and DC Termination. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

4.1.3. Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

4.1.4. Ringer Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

4.1.5. Optional Billing-Tone Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

4.2. Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50

4.3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51

4.4. Layout Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52

4.4.1. ISOmodem Layout Check List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

4.4.2. Module Design and Application Considerations . . . . . . . . . . . . . . . . . . . . . . 57

4.4.2.1. Module Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

4.4.2.2. Motherboard Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

4.5. Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58

4.5.1. Interaction between the AOUT Circuit and the

Required Modem Reset Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

4.5.2. Audio Quality. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

4.5.3. Power Dissipation in the Si3018 DAA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

5. Modem Reference Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61

5.1. Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61

5.2. DSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62

5.3. Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62

5.4. AT Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62

5.5. Extended AT Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83

5.6. S Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95

5.7. U Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98

5.7.1. U-Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

5.7.2. U00–U16 (Dial Tone Detect Filter Registers) . . . . . . . . . . . . . . . . . . . . . . . 104

5.7.3. U17–U30 (Busy Tone Detect Filter Registers) . . . . . . . . . . . . . . . . . . . . . . 105

5.7.4. U31–U33 (Ringback Cadence Registers). . . . . . . . . . . . . . . . . . . . . . . . . . 108

5.7.5. U34–U35 (Dial Tone Timing Register) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

5.7.6. U37–U45 (Pulse Dial Registers). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

5.7.7. U46–U48 (DTMF Dial Registers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

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5.7.8. U49–U4C (Ring Detect Registers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

5.7.9. U4D (Modem Control Register 1—MOD1) . . . . . . . . . . . . . . . . . . . . . . . . . 110

5.7.10. U4E (Pre-Dial Delay Time Register). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

5.7.11. U4F (Flash Hook Time Register) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

5.7.12. U50–U51 (Loop Current Debouncing Registers) . . . . . . . . . . . . . . . . . . . 112

5.7.13. U52 (Transmit Level Register) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

5.7.14. U53 (Modem Control Register 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

5.7.15. U54 (Calibration Timing Register). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

5.7.16. U62–U66 (DAA Control Registers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

5.7.17. U67–U6A (International Configuration Registers). . . . . . . . . . . . . . . . . . . 115

5.7.18. U6C (Line-Voltage Status Register) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

5.7.19. U6E–U7D (Modem Control and Interface Registers) . . . . . . . . . . . . . . . . 119

5.7.20. U80 (Transmit Delay for V.22 Fast Connect) . . . . . . . . . . . . . . . . . . . . . . 129

5.7.21. U87 (Synchronous Access Mode Configuration Register) . . . . . . . . . . . . 130

5.7.22. UAA (V.29 Mode Register) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

5.8. Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133

5.8.1. Method 1 (Fastest) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

5.8.2. Method 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

5.8.3. Method 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

5.9. Escape Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134

5.9.1. +++ Escape. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

5.9.2. “9th Bit” Escape. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

5.9.3. “Escape Pin” Escape. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

5.10. Data Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136

5.11. Error Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136

5.12. Wire Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136

5.13. EPOS (Electronic Point of Sale) Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .137

5.13.1. EPOS Fast Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137

5.13.2. EPOS V.29 Fast Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137

5.14. Legacy Synchronous DCE Mode/V.80 Synchronous Access Mode . . . . . . . . . . .137

5.15. V.80 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .138

6. Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .144

6.1. Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .144

6.2. Country-Dependent Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .145

6.2.1. DC Termination. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

6.2.2. Country Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146

6.2.2.1. Country Initialization Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146

6.2.2.2. Country-Setting Register Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157

6.2.2.3. Special Requirements for Serbia and Montenegro. . . . . . . . . . . . . . . 158

6.2.3. Blacklisting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159

6.3. Caller ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .159

6.3.1. Force Caller ID Monitor (Always On) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

6.3.2. Caller ID After Ring Only. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

6.3.3. UK Caller ID with Wetting Pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

6.3.4. Japan Caller ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

6.3.5. DTMF Caller ID. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

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6.4. SMS Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .161

6.5. Type II Caller ID/SAS Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163

6.6. Intrusion/Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .173

6.6.1. On-Hook Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

6.6.1.1. Line Not Present/In Use Indication (Method 1—Fixed) . . . . . . . . . . . 173

6.6.1.2. Line Not Present/In Use Indication (Method 2—Adaptive). . . . . . . . . 174

6.6.2. Intrusion Explanation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174

6.7. Modem-On-Hold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .176

6.7.1. Initiating Modem-On-Hold. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176

6.7.2. Receiving Modem-On-Hold Requests. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177

6.8. HDLC: Bit Errors on a Noisy Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .177

6.9. Overcurrent Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .181

6.10. Pulse/Tone Dial Decision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .181

6.10.1. Method 1: Multiple Off-Hook Transitions . . . . . . . . . . . . . . . . . . . . . . . 181

6.10.2. Method 2: Single Off-Hook Transition. . . . . . . . . . . . . . . . . . . . . . . . . . 182

6.10.3. Method 3: Adaptive Dialing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182

6.10.4. Automatic Phone-Line Configuration Detection . . . . . . . . . . . . . . . . . . . . 182

6.10.5. Line Type Determination. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182

6.11. Telephone Voting Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .183

6.12. V.92 Quick Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .183

6.13. Abort the Dialing Operation in Voice Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .184

7. Handset, TAM, and Speakerphone Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .185

7.1. Software Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .185

7.1.1. AT Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185

7.1.2. AT+ Extended Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185

7.1.3. <DLE> Commands (DTE-to-DCE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190

7.1.4. <DLE> Events (DCE-to-DTE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191

7.1.4.1. Simple Event Reporting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191

7.1.4.2. Complex Event Reporting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193

7.1.5. U Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193

7.2. Voice Reference—Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .199

7.2.1. Abort the Dialing Operation in Voice Mode. . . . . . . . . . . . . . . . . . . . . . . . . 199

7.3. Si3000 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .204

7.3.1. Microphone and Speaker Ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204

7.3.2. Register Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204

7.3.3. System Voice Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204

7.3.3.1. TAM Hands-Free . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204

7.3.3.2. TAM Handset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204

7.3.3.3. Speakerphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204

7.3.3.4. Handset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204

7.3.3.5. Si3000 Control Register Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 204

7.3.3.6. TAM PSTN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206

7.4. Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .207

7.5. Handset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .209

7.5.1. Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209

7.5.2. Handset Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209

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Rev. 1.41 7

7.5.3. Call – Automatic Tone Dial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211

7.5.4. Call – Manual Off-Hook Tone Dial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211

7.5.5. Call – Automatic Pulse Dial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211

7.5.6. Answer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211

7.5.7. Terminate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212

7.5.8. Speakerphone Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213

7.6. Telephone Answering Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .214

7.6.1. Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214

7.6.2. TAM Hands-Free—Idle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214

7.6.2.1. Record OGM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215

7.6.2.2. Review OGM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216

7.6.2.3. Record Local ICM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216

7.6.2.4. Review ICM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216

7.6.2.5. Speakerphone Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216

7.6.2.6. Handset Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216

7.6.3. TAM Handset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216

7.6.3.1. Record OGM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216

7.6.3.2. Review OGM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219

7.6.3.3. Record Local ICM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221

7.6.3.4. Review ICM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221

7.6.4. TAM PSTN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221

7.6.4.1. Normal Answer – OGM Playback with ICM Record . . . . . . . . . . . . . . 221

7.6.4.2. Interrupted Answer – OGM Playback with DTMF Menu Entry . . . . . . 223

7.6.4.3. Speakerphone Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225

7.6.4.4. Handset Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225

7.7. Speakerphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .225

7.7.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225

7.7.2. External Microphone/Speaker Calibration. . . . . . . . . . . . . . . . . . . . . . . . . . 225

7.7.2.1. Transmit Gain Calibration—Speakerphone Disabled. . . . . . . . . . . . . 225

7.7.2.2. Receive Gain Calibration—Speakerphone Disabled . . . . . . . . . . . . . 228

7.7.2.3. Speakerphone Calibration—AEC Gain Calibration . . . . . . . . . . . . . . 229

7.7.3. Speakerphone Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231

7.7.4. Simplex Speakerphone Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232

7.7.5. Call—Automatic Tone Dial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233

7.7.6. Call—Manual Off-Hook Tone Dial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233

7.7.7. Call—Automatic Pulse Dial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234

7.7.8. Answer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234

7.7.9. Handset Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234

7.7.10. Termination. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235

7.8. Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .235

7.9. References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .235

8. Security Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .236

8.1. Implementing the SIA Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .236

8.1.1. Modem-Specific Implementation Details. . . . . . . . . . . . . . . . . . . . . . . . . . . 236

8.1.1.1. Listen-In and V-channel Periods (Voice Pass-Through). . . . . . . . . . . 236

8.1.1.2. Inserting a V.32bis period (e.g., SIA Level-3 Video Block Support) . . 236

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8 Rev. 1.41

8.1.1.3. Considerations when Disconnecting the Session. . . . . . . . . . . . . . . . 237

8.2. Implementing the Ademco® Contact ID Protocol . . . . . . . . . . . . . . . . . . . . . . . . . .240

8.2.1. Modem Specific Implementation Details. . . . . . . . . . . . . . . . . . . . . . . . . . . 241

8.2.1.1. Handshake Tone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242

8.2.1.2. Session Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242

9. Chinese ePOS SMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .244

9.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .244

9.2. SMS AT Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .245

9.2.1. SMS User Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248

9.2.2. Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249

9.2.2.1. Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250

9.2.2.2. Response 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251

9.2.2.3. Response 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251

9.2.2.4. Response 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251

9.3. Example Session . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .252

10. Testing and Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .255

10.1. Prototype Bring-Up (Si3018/10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .255

10.1.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255

10.1.2. Visual Inspection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255

10.1.3. Basic Troubleshooting Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255

10.1.4. Host Interface Troubleshooting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257

10.1.5. Isolation Capacitor Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257

10.1.6. Si3018/10 Troubleshooting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257

10.1.7. Component Troubleshooting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257

10.2. Self Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .262

10.3. Board Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .263

10.4. Compliance Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .265

10.4.1. EMI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 266

10.4.2. Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267

10.4.3. Surges. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267

10.5. AM-Band Interference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .268

10.6. Debugging the DTE interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .269

Appendix A—EPOS Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .270

VISA II (7E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .270

Recommendation V.80 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .271

The ISOmodem in EPOS Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .273

A V.29 FastPOS Sample Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .274

Appendix B—Line Audio Recording . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .286

When to Use Audio Recording . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .286

Times When Audio Recording May Not Help . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .286

Hardware Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .286

Audio Playback and Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .288

Examples of Line Impairments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .297

Appendix C—Parallel/SPI Interface Software Implementation . . . . . . . . . . . . . . . . . . . .302

Software Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .303

Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .306

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Rev. 1.41 9

1.1. Selection Guide

Tables 1 through 3 list the modulations, protocols, carriers, tones and interface modes supported by the Si2494/39

and Si2493/57/34/15/04 ISOmodem family. The Si2493 supports all modulations and protocols from Bell 103

through V.92. The Si2457 supports all modulations and protocols from Bell 103 through V.90. The Si2434 supports

all modulations and protocols from Bell 103 through V.34. The Si2415 supports all modulations and protocols from

Bell 103 through V.32bis. The Si2404 supports all modulations and protocols from Bell 103 through V.22bis.

Table 1. Modulations

Modulation Data Rates (bps) Modulation Si2494/93 Si2457 Si2439/34 Si2415 Si2404

V.92 * 48k, 40k, 32k, 24 k PCM 

V.90* 56k, 54.6k, 53.3k, 52k, 50.6k,

49.3k, 48k, 46.6k, 45.3k, 44k,

42.6k, 41.3k, 40k, 38.6k,

37.3k, 36k, 34.6k, 33.3k, 32k,

30.6k, 29.3k, 28k

PCM 

V.34* 33.6k, 31.2k, 28.8k, 26.4k, 24k,

21.6k, 19.2k, 16 .8k, 14.4k, 12k,

9600, 7200, 4800, 2400

TCM 

V.32bis* 14.4k, 12k, 9600, 7200, 4800 TCM 

V.32* 9600

9600, 4800 TCM

QAM 

V.29FC* 9600 QAM *

V.23 1200 FSK 

V.22bis 2400, 1200 QAM 

V.22 1200 DPSK 

Bell 212A 1200 DPSK 

V.21 300 FSK 

Bell 103 300 FSK 

*Note: With th e Si3018 DAA only.

Table 2. Protocols

Protocol*Function Si2494/93 Si2457 Si2439/34 Si2415 Si2404

V.44 Compression 

V.42bis Compression 

V.42 Error Correct ion 

MNP5 Compression 

MNP2-4 Error Correction 

*Note: The Si2494/93/57/39/34/15/04 family allows any supported protocol combined with any modulation.

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10 Rev. 1.41

Table 3. Carriers and Tones

Specification Transmit Carrier

(Hz) Receive Carrier

(Hz) Answer

Tone (Hz) Carrier Detect (Acquire/

Release)

V.92 Variable Variable per ITU-T V.92

V.90 Variable Variable per ITU-T V.90

V.34 Variable Variable per ITU-T V.34

V.32bis 1800 1800 2100 per ITU-T V.32bis

V.32 1800 1800 2100 per ITU-T V.32

V.29 1700 1700 per ITU-T V.29

V.22bis, V.22

Originate/answer 1200

2400 2400

1200 2100 –43 dBm/–48 dBm

–43 dBm/–48 dBm

V.21

Originate/answer (M/S) 1180/980

1850/1650 1850/1650

1180/980 2100 –43 dBm/–48 dBm

–43 dBm/–48 dBm

Bell 212A

Originate/answer 1200

2400 2400

1200 2225 –43 dBm/–48 dBm

–43 dBm/–48 dBm

Bell 103

Originate/answer (M/S) 1270/1070

2225/2025 2225/2025

1270/1070 2225 –43 dBm/–48 dBm

–43 dBm/–48 dBm

Table 4. ISOmodem Capabilities

Part Numbers Package UART EEPROM SPI Parallel Voice Speakerphone /

TAM

Si2493/57/34/15/041SOIC-16 

Si2493/57/34/15/041TSSOP-24 

2 

Si2494/39 QFN-38  

33

Notes:

1. Die Revision D or later.

2. The EEPROM interface option is available only when the UART or SPI interface is selected .

3. Si3010 does not support voice operations.

AN93

Rev. 1.41 11

2. Modem (System-Side) Device

The Si24xx ISOmodem system-side devices contain a controller, a DSP, program memory (ROM), data memory

(RAM), UART, SPI and parallel interfaces, a crystal oscillator, and an isolation capacitor interface. The following

sections describe the reset sequen ce, the host interface , the isolation interface, low- power modes, SSI/vo ice m ode

and the EEPROM interface.

2.1. Resetting the Device

Reset is required after power-on or brownout conditions (the supply dropping to less than the data sheet minimum).

The supply must be stable throughout the minimum required reset time described here and thereafter. A reset is

also required in order to come out of the power down mode.

Some operational choices, including the crystal oscillator frequency used and the command interface used (e.g.

UART vs SPI), is made during the reset time according to pull-down resisto rs placed on some mo d em pin s. Th ese

pins are modem output lines, but, during reset, the modem places them into a high-impedance mode with weak

internal pull-ups, then reads the user's strapping choices. It is important that th e resultant state changes of these

pins during reset are not misinterpreted by the host.

For example the INT output pin of the modem (and perhaps others) can be strapped low with a 10 k resistor to

request SPI operation. If that mode is chosen, the host should take care not to enable this interrupt input before the

modem reset since the INT signal will transition from high to low and back up during reset in this case and can

generate an unexpected interrupt.

If an external clock signal is provided instead of a crystal attached to the modem, it is important that this external

clock signal be stable befo re the reset ends.

2.1.1. Reset Sequence

After power-on, the modem must be reset by asserting the RESET pin (low) for the required time then waiting a

fixed 300 ms before sending th e first AT command. The rese t recovery time of 300 ms is also applicable if the reset

is a SW triggered event, such as an ATZ command.

If a 4.9152 MHz crystal or an external 27 MHz clock is used, the reset must be asserted for 5 ms, and a wait of

300 ms duration mu st happen before an AT command is issued. If a 32 kHz cryst al is used, the reset pulse must be

500 ms long and followed by the same 300 ms duration wait as that used for higher frequency clocks.

This is adequate to reset a ll the on-chip r egister s. No te that 16 µs after the cu stomer-applie d reset pulse star t s, the

I/O pins will be tri-stated with a weak pull-up, and, 16 µs after the end of this reset pulse, the IO pins will switch to

inputs or outputs as appropriate to the mode indicated by the pull-down strapping. This 16 µs delay is for newer

revs of the modem parts (those parts that introduce a 32 kHz crystal and SPI operation); older revs exhibit a delay

of only nanoseconds.

The reset sequence described above is appropriate for all user modes of the modem including UART, SPI, and

Parallel bus operation.

A software reset of th e mo dem can also b e perf orm ed by issuing the command ATZ or by setting U-register 6E bit

4 (RST) high using AT commands. After issuing a software or hardware reset, the host must wait for the reset

recovery time before issuing any subsequent AT commands.

There is no non-volatile memory on the ISOmodem other than program ROM. When reset, the ISOmodem reverts

to the original factory default settings. Any set-up or configuration data and software updates must be reloaded

after every reset. This is true whether the reset occurs due to a power-down/power-up cycle, a power-on reset

through a manual reset switch, by writing U6E [4] (RST) = 1, or by executing ATZ.

A suggested reset sequence is as follows:

1. Apply an active-low pulse to the RESET pin; write RST bit or ATZ<CR>.

2. Wait at least the reset recovery time.

3. Load firmware updates (if required).

4. Set non-default DAA interface parameters—DCV, ACT, ILIM, OHS2, OHS, RZ, RT, (U67), LIM, (U68).

5. Set non-default cadence values—Busy Tone, Ringback, Ring.

AN93

12 Rev. 1.41

6. Set non-default frequency values—Ring.

7. Set non-default filter parameters.

8. Set non-default S-register values.

The modem is now ready to detect rings, answe r another modem, call, or dial out to a remote modem.

Some key default settings for the modem after reset or powerup include the following:

V.92 and fall-backs enabled (Si2494/93)

V.90 and fall-backs enabled (Si2457)

V.34 and fall-backs enabled (Si2439/34)

V.32bis and fall-backs enabled (Si2415)

V.22bis and fall-backs enabled (Si2404)

V.42/42bis enabled

+++ escape sequence enabled

Answer-on-ring is disabled

Speaker off

DTE echo enabled

Verbal result codes enabled

CTS only enabled

FCC (US) DAA and call progress settings

2.1.2. Reset Strapping: General Considerations

The different options available in the Si24xx ISOmodem family are selected by means of 10 k pulldown resistors

placed at certain pins. During power-on or pin reset, the ISOmodem’s signal pins are read and the option resistors

are taken into account to determine the required configuration. After reset, the ISOmodem assumes the

functionality selected by the corresponding combination of pulld own res isto rs .

Below is a summary of reset-strap options. Not all options are available on all part number or packages. Refer to

Table 4, “ISOmodem Capabilities,” on page 10 for details.

Host interface: UART, parallel or SPI

Input clock frequency: 32 kHz, 4.9152 MHz or 27 MHz

Autobaud mode or fixed-rate UART communication (when UART interfa ce is selected). Disabling the autobau d

feature at reset sets the rate to 19,20 0 baud.

EEPROM interface

Three-wire EEPROM or four-wire EEPROM when EEPROM interface is selected

Refer to "2.7. EEPROM Interface (24-Pin TSSOP and 38-Pin QFN Only)" on page 34 for more details on the

various ISOmodem EEPROM options.

The next few sections describe the various reset options that must be selected for each package. In all the tables,

the following conventions apply:

0 means this option is selected with a 10 k pulldown resistor to ground.

1 means the pin is left open. If a pin is left open, the internal pullup resistor is normally sufficient as long as the

pin is not driven extern ally du r ing re set. If there is noise or special power-sequencing situations, then an

external pullup resistor may be needed.

AN93

Rev. 1.41 13

2.1.3. Reset-Strap Options for 16-Pin SOIC Package

The clock frequency and interface on the 16-pin SOIC package are selected according to Table 5 below. The

parallel interface, EEPROM and autobaud options are not available in the 16-pin SOIC package.

2.1.4. Reset-Strap Options for 24-Pin TSSOP Package

The pin-strapping options for the 24-pin TSSOP package are described in the three subsections below, depending

on the interface mode selected.

Table 5. SOIC-16 Reset-Strap Options

Mode Reset-Strap Pins

Interface Input Clock Pin 3

RI Pin 5, RXD/MISO Pin 7, CTS/SCLK Pin 11

INT Pin 15

DCD

UART 32 kHz 0 X 1 1 X

4.9152 MHz 1 X 1 1 1

27 MHz 1 X 1 1 0

SPI 32 kHz 1 1 X 0 1

4.9152 MHz 0 1 X 0 X

27 MHz 1 1 X 0 0

AN93

14 Rev. 1.41

2.1.4.1. Reset Strapping Options for TSSOP-24 with UART-Interface

UART-interface options for the 24-pin TSSOP pa ckage are shown in Table 6 below.

2.1.4.2. Reset Strapping Options for TSSOP-24 with Parallel-Interface

Parallel-interface options for the 24-pin TSSOP package appear in Table 7 below. The EEPROM and autobaud

options are not available when the parallel interface is selected.

Table 6. TSSOP-24 UART-Interface Options

Mode Reset-Strap Pins

Input Clock Autobaud

Disabled? Three-Wire

EEPROM

Interface?

Pin 4

FSYNC Pin 11, CTS

Pin 15, AOUT

Pin 16, INT

Pin 17

RI Pin 18

SDI/EESD Pin 23

DCD

32 kHz No No 1 1 0 1 X

Yes 0 1 0 1 X

Yes No 1 1 0 0 X

Yes 0 1 0 0 X

4.9152 MHz No No 1 1 1 1 1

Yes 0 1 1 1 1

Yes No 1 1 1 0 1

Yes 0 1 1 0 1

27 MHz No No 1 1 1 1 0

Yes 0 1 1 1 0

Yes No 1 1 1 0 0

Yes 0 1 1 0 0

Table 7. TSSOP-24 Parallel-Interface Options

Mode Reset-Strap Pins

Input Clock Pin 9, RD

Pin 10, WR Pin 11

SCLK Pin 15

INT

27 MHz 1 0 0

4.9152 MHz 1 1 0

AN93

Rev. 1.41 15

2.1.4.3. Reset Strapping Options for TSSOP with SPI- Interface

Table 8 lists the SPI-interface options for the 24-pin TSSOP package.

2.1.5. Reset Strapp in g Op t io ns fo r QF N Parts

2.1.5.1. Reset Strapping Options for QFN Parts with UART Operation

Table 9 lists the reset strapping options for QFN parts with UART operation.

Table 8. TSSOP-24 SPI-Interface Clock-Frequency Options

Mode Reset-Strap Pins

Input Clock Three-Wire

EEPROM

Interface?

Pin 4

FSYNC Pin 9, RXD

Pin 11, SCLK

Pin 15, AOUT

Pin 18, SDI/EESD

Pin 16

INT Pin 17

RI Pin 23

DCD

32 kHz No 1 1 0 1 1

Yes 0 1 0 1 1

4.9152 MHz No 1 1 0 0 X

Yes 0 1 0 0 X

27 MHz No 1 1 0 1 0

Yes 0 1 0 1 0

Table 9. Reset Strapping Options for QFN Parts with UART Operation

Input Clk Auto-Baud

Disable Three-Wire

EEPROM

Interface

FSYNCH CTS AOUT EECLK INT RI SDI DCD

Pin 2 Pin 21 Pin 15 Pin 13 Pin 35 Pin 19 Pin 8 Pin 28

32 kHz No No 1 1 1 1 1 1 1 1

Yes 0 1 1 1 1 1 1 1

Yes No 1 1 1 1 1 1 0 1

Yes 0 1 1 1 1 1 0 1

4.9152 MHz No No 1 1 1 1 1 0 1 X

Yes 0 1 1 1 1 0 1 X

Yes No 1 1 1 1 1 0 0 X

Yes 0 1 1 1 1 0 0 X

27 MHz No No 1 1 1 1 1 1 1 0

Yes 0 1 1 1 1 1 1 0

Yes No 1 1 1 1 1 1 0 0

Yes 0 1 1 1 1 1 0 0

AN93

16 Rev. 1.41

2.1.5.2. Reset Strapping Options for QFN Parts with SPI Operation

Table 10 lists the reset strapping options for QFN pa rts with SPI operation.

2.1.5.3. Reset Strapping Options for QFN Parts with Parallel Operation

Table 11 lists the reset strapping options for QFN parts with parallel operation.

Table 10. Reset Strapping Options for QFN parts with SPI Operation

Input Clk Three-Wire

EEPROM

Interface

FSYNCH AOUT EECLK INT RI SDI DCD MISO

Pin 2 Pin 15 Pin 13 Pin 35 Pin 19 Pin 8 Pin 28 Pin 22

32 kHz No 1 1 1 0 1 1 1 1

Yes 0 1 1 0 1 1 1 1

4.9152 MHz No 1 1 1 0 0 1 X 1

Yes 0 1 1 0 0 1 X 1

27 MHz No 1 1 1 0 1 1 0 1

Yes 0 1 1 0 1 1 0 1

Table 11. Reset Strapping Options for QFN Parts with Parallel Operation

Input Clk CS AOUT EECLK RD

Pin 21 Pin 15 Pin 13 Pin 22

32 kHz 1 0 1 1

10 1 1

4.9152 MHz 1 0 0 1

10 0 1

27 MHz 0 0 1 1

00 1 1

AN93

Rev. 1.41 17

2.2. System Interface

The ISOmodem can b e connected to a host processor throug h a UAR T, SPI or parallel interface. Connection to the

chip requires low-voltage CMOS signal levels from the host and any other circuitry interfacing directly. The

following sections describe the digital interface options in detail.

2.2.1. Interface Selection

The interface is selected during reset, as described in "2.1. Resetting the Device". Tables 12, 13, and 14 show the

functions of the affected pins for possible interface modes for 16-, 24- and 38-pin packages, respectively.

Table 12. Pin Functions vs. Interface Mode (SOIC-16)

Pin # UART Mode SPI Mode

3RI RI

5 RXD MISO

6 TXD MOSI

7CTS SCLK

11 INT INT

14 ESC ESC

15 DCD DCD

16 RTS SS

Table 13. Pin Functions vs. Interface Mode (TSSOP-24)

Pin # UART Mode SPI Mode Parallel Mode

2 FSYNC (SSI) FSYNC (SSI) D6

3 CLKOUT (SSI) CLKOUT (SSI) A0

8RTS SS D7

9 RXD MISO RD

10 TXD MOSI WR

11 CTS SCLK CS

15 AOUT AOUT INT

16 INT INT D0

17 RI RI D1

18 SDI (SSI) SDI (SSI) D2

22 ESC ESC D3

23 DCD DCD D4

24 SDO (SSI) SDO (SSI) D5

AN93

18 Rev. 1.41

Table 14. Pin Functions vs. Interface Mode (QFN-38)

Pin # UART Mode SPI Mode Parallel Mode

35 INT INT INT

34 GPIO18 GPIO18 D0

33 GPIO17 GPIO17 D1

32 GPIO16 GPIO16 D2

31 GPIO23 GPIO23 D3

30 GPIO24 GPIO24 D4

29 ESC D5

28 DCD D6

24 RTS SS D7

23 TXD MOSI WR

22 RXD MISO RD

21 CTS SCLK CS

20 GPIO11 GPIO11 A0

19 RI

AN93

Rev. 1.41 19

2.2.2. Interfa c e Signa l De sc rip ti on

The following tables describe each set of UART, parallel and SPI interface signals:

2.2.3. UART Interface Operation

The UART interface allows the host processor to communicate with the modem controller through a UART driver.

In this mode, the modem is analogous to an external “box” modem. The interface pins are 5 V tolerant and

communicate with TTL-compatible, low-voltage CMOS levels. RS232 interface chips, such as those used on the

modem evaluation board, can be used to make the UART interface directly compatible with a PC or terminal serial

port.

2.2.3.1. UART Options

The DTE rate is set by the autobaud feature after reset. When autobaud is disabled, the UART is configured to

19.2 kbps, 8-bit data, no parity and 1 stop bit on reset. The UART data rate is programmable from 300 bps to

307.2 kbps with the AT\Tn command (see Table 53, “Extended AT\ Command Set,” on page 87). After the AT\Tn

command is issued, the ISOmodem echoes the result code at the old DTE rate. After the result code is sent, all

subsequent communication is at the new DTE rate.

The DTE baud clock is within the modem crystal tolerance (typically ±50 ppm), except for DTE rates that are

uneven multiples of the modem clock. All DTE rates are within the +1%/–2.5% required by the V.14 specification.

Table 18 shows the ideal DTE rate, the actual DTE rate, and the approximate error.

Table 15. UART-Interface Signals

Signal Direction Description

TXD Input Data input from host TXD pin

RXD Output Data output to host RXD pin

RTS Input Active-low request-to-send input for flow control

CTS Output Clear to send: Si2493 is ready to receive data on the TXD pin (active low)

Table 16. SPI-Interface Signals

Signal Direction Description

SCLK Input Serial data clock

MISO Output Serial data output

MOSI Inp ut Serial data input

SS Input Chip select (active low)

INT Output Interrupt (active low)

Table 17. Parallel-Interface Signals

Signal Direction Description

A0 Input Register selection (address inpu t)

CS Input Chip select (active low)

RD Input Read enable (active low)

WR Input Write enable (active low)

D[7:0] Bidirectional Parallel data bus

INT Output Interrupt (active low)

AN93

20 Rev. 1.41

The UART interface sy nchronizes on the start bits of incoming characters and samples the data bit field and stop

bits. The interface is designed to accommodate character lengths of 8, 9, 10, and 11 bits giving data fields of 6, 7,

8, or 9 bits. Data width can be set to 6, 7 , or 8 bits with the AT\Bn command. Parity can be set to odd, even, mark,

or space by the AT\Pn command in conjunction with AT\B2 or AT\B5 . Other AT\Bn settings have no parity.

Figure 2. Asychronous UART Serial Interface Timing Diagram

2.2.3.2. Autobaud

When set in UART interface mode, the ISOmodem includes an automatic baud ra te detection feature that allows

the host to start tran sm itt i ng da ta at any standard DTE rate from 300 bps to 307.2 kbps. This feature is enabled by

default. When autobaud is enabled, it continually adjusts the baud rate, and the ISOmodem always echoes result

codes at the same baud rate as the most recently received character from the host. Autobaud can be turned off

using AT commands \T0 through \T15, and \T17. Host software should disable autobaud operation once the DTE

rate has been established. This prevents transients on TXD to cause inadvertent baud rate changes.

Autobaud is off when dialing, answering, and in data mode. When autobaud mode is off, the baud rate is set to the

most recently-active baud rate prior to entering one of these states. When autobaud mode is on, autoparity is

performed when either “at” or “AT” is detected. Autoparity detects the formats listed in Table 19.

Table 18. DTE Rates

Ideal DTE Rate (bps) Actual DTE Rate (bps) Approximate Error(%)

300 300

600 600

1200 1200

2400 2400

7200 7202 0.01

9600 9600

12000 12003 0.02

14400 14400

19200 19200

38400 38400

57600 57488 0.2

115200 115651 0.4

230400 228613 0.8

245760 245760

307200 307200

D1D0 D2 D3 D4 D5 D6 D7

START

BIT

MARK STOP

BIT

BIT TIMES

BIT SAMPLING

SPACE

D1D0 D2 D3 D4 D5 D6 D7

START

BIT

MARK STOP

BIT

BIT TIMES

BIT SAMPLING

SPACE D8

AN93

Rev. 1.41 21

Note: For 7N1, the modem is programmed to 7 data bits, mark parity and one stop bit. This may be changed with the AT\P and

AT\B commands. In autobaud mode, 7N1 is properly interpreted and echoed, but the AT\P and AT\B commands must be

sent prior to dialing in orde r to lock the parity and format to 7N1. Otherwi se, the ISOmodem locks to 7 bits, mark parity

and two stop bits (7N2).

2.2.3.3. Flow Control

The ISOmodem supports flow control through RTS/CTS. RTS (request-to-send) is a control signal from the

terminal (DTE) to the modem (DCE) indicating data may be sent from the modem to the terminal. CTS (clear-to-

send) is a control signal from the modem (DCE) to the termi nal (DTE) indicating data may be sent from the terminal

to the modem for transmission to the remote modem. This arrangement is typically referred to as hardware flow

control. There is a 14-character FIFO and a 1024 character elastic transmit buffer (see Figure 3). CTS goes

inactive (high) when the 1024 character buffer reaches 796 characters, then reasserts (low) when the buffer falls

below 128 characters. There is no provision to compensate for FIFO overflow. Data received on TXD when the

FIFO is full are lost.

XON/XOFF is a software flow control method in which the modem and terminal control the data flow by sending

XON characters (^Q/0x11) and XOFF characters (^S/0x13). XON/XOFF flow control is not supported by the

ISOmodem.

DCD does not de-assert during a retrain (see Table 56: S9, Carrier presence timer and S10, Carrier loss timer).

CTS always deasserts during initial training, retrain, and at disconnect regardless of the \Qn setting. For \Q0 CTS,

flow control is disabled; CTS is inactive during data transfer. The modem remains in the data mode during normal

automatic retrains. The host can force a retrain by escaping to the command mode and sending ATO1 or ATO2.

The DCD and RI pins can be used as ha rdwa re mo nitors of the carrier detect and ri ng signal s. Additiona lly, the INT

pin can be program med to monitor th e bits in register U70 listed in Table 20. The RI, PPD, OCD, CID, and RST bits

are sticky, and the AT:I command read s and c lea rs thes e sig na ls an d de ac tiva te s the INT pin if INT is enabled.

Table 19. Serial Formats Detected in Autobaud Mode

Symbol Data bits Parity Stop bits

7N1 7 None (mark) 1

7N2 7 None (mark) 2

7S1 7 None (space) 1

7O1 7 Odd 1

7E1 7 Even 1

8N1 8 None (mark) 1

8E1 8 Even 1

8O1 8 Odd 1

9N1 9 None (mark) 1

AN93

22 Rev. 1.41

Figure 3. Transmit Data Buffers

Figure 4. Receive Data Buffers

Table 20. Register U70 Signals INT Can Monitor

Signal U70 Bit Function

DCD 0 Data Carrier Detect—active high (inverse of DCD pin)

RI 1 Ring Indicator—active high (inverse of RI pin)

PPD 2 Parallel Phone Detect

OCD 3 Overcurrent Detect

CID 4 Caller ID Preamble Detect

796 Characters

128 Characters

1024 Character Elastic Tx Buffer

SRAM CTS Deasserts

CT S Asse rts

Transmit

14-Character

Ha rd wa re

Buffer

T x D a ta

CTS

796 Characters

128 Characters

1024 Character Elastic Rx Buffer

SRAM

Receive

12-Character

Ha rd wa re

Buffer

Rx data

RTS

RXF bit

REM bit

Parallel

Mode

AN93

Rev. 1.41 23

A block diagram of the UART in the serial interface mode is shown in Figur e 5.

Figure 5. UART Serial Interface

2.2.4. Parallel and SPI Interface Operation

Refer to "2.1. Res etting the De vice" on page 11 for interface se lection. T he parallel interfac e has an 8-bit data bus

and a single address bit. The SPI likewise operates with 8-bit data transfers, using a single address bit. When the

parallel or SPI inter face mode is selected, the modem must be configured for a DTE inte rface or 8N1 only. The host

processor must calculate parity for the MSB. The modem sends bits as received by the ho st and does not calculate

parity. Refer to "Appendix C—Parallel/SPI Interface Software Implementation" on page 302 for detailed parallel or

SPI interface application information.

The parallel or SPI int erface uses the F IFO s to b uffer data in the sa me way as in UART mode, with th e addit ion of

Hardware Interface Registers 0 (HIR0) and Hardware Interface Register 1 (HIR1). The Hardware Interface

Registers were formerly called Parallel Interface Registers (PIR0 and PIR1) in older products, because those

products wo uld support on ly a p arallel inte rface. Flow control must be imple mented by monitor ing REM a nd TXE in

HIR1. There is no protection against FIFO overflow. Data transmitted when the transmit FIFO is full are lost.

Figure 6 shows the interaction of the transmit an d receive FIFOs with the Hardware (Parallel) Interface Registers in

the case of a p arallel inte rface. The arran gement is sim ilar wh en the SPI inter face is selecte d. Table 21 on page 25

shows a bit map of HIR0 and HIR1.

UART oriented control lines, such as RTS and CTS, are not used in Parallel and SPI Interface mode. They are

replaced by bits in the HIR1 register.

SPI and parallel o peration only suppor t s 8-bit data words. The longer words that are implied by the \B5 (8P1 ) & \B6

8X1 commands are not allowed. These commands should not be used.

11 Bits

to Data Bus

CONTROL RX Shift

TX Shift

TX FIFO

MUX

TXD

(10) CTS

(11) RTS

(8) RXD

(9)

INT

(16)

RX FIFO

AN93

24 Rev. 1.41

Figure 6. Parallel Interface

11 Bits

to Da ta Bu s

CONTROL

P a ra lle l I /F

MUX

P a ra llel I/F

(3) D0

(16) D1

(17) D2

(18) D3

(22) D4

(23) D5

(24) D6

(4) D7

(8) RD

(9) WR

(10) CS

(11) INT

(15)

MUX

Parallel Interface Unique

Shared-Serial/Parallel

Parallel mode pin functio n

Parallel mode pin number

TX FIFO

14 Characters RX FIFO

12 Characters

AN93

Rev. 1.41 25

2.2.4.1. Hardware Interface Register 0

Hardware Interface Register 0 (HIR0) is the eight-bit wide read/write location where modem data and comma nds

are exchanged with the host. Writing a byte to the HIR0 adds that byte to the modem’s transmit FIFO (AT

command buff er in command mode or data transmission in data mode). If data are available (modem data in data

mode or command responses, such as OK, in command mode), reading from the HIR0 fetches data from the

modem’s receive FIFO. The maximum burst data rate is approximately 350 kbps (45 kBps).

2.2.4.2. Hardware Interface Register 1

Hardware Inte rface Re gister 1 ( HIR1) contains various status and control flags for use by the host to perform data

flow control, to escape to command mode a nd to qu ery va r iou s in terr upt co ndition s. T he HIR1 bit map is de scr ibe d

in Table 22. This register is reset to 0x63.

Bit 7 (RXF) is a read/write bit that gives the status of the 12-byte deep receive FIFO. If RXF = 0, the receive FIFO

contains less than 9 bytes. If RXF = 1, the receive FIFO contains 9 bytes or more and is full or almost full. Writing

RXF = 0 clears the interrupt.

Table 21. Hardware Interface Register Bit Map

A0 RD WR Action Register D7 D6 D5 D4 D3 D2 D1 D0

0 0 1 Read HIR0 Modem data or command from receive FIFO

0 1 0 Write Modem data or command to transmit FIFO

1 0 1 Read HIR1 RXF TXE REM INTM INT ESC RTS CTS

1 1 0 Write RXF TXE *Note INTM *Note ESC RTS n/a

*Note: REM and INT are read-only bits.

Table 22. Hardware Interface Register 1

Bit Name R/W Reset Function

7RXFR/W 0Receive FIFO Almost Full

6TXER/W 1Transmit FIFO Almost Empty

5REM R 1Receive FIFO Empty

4INTMR/W 0Interrupt Mask

0 = INT pin triggere d on risin g ed ge of RXF or TXE only

1 = INT pin triggered on rising edge of RXF, TXE or INT (bit 3 below)

3INT R 0Interrupt

0 = No interrupt

1 = Interrupt triggered

2 ESC R/W 0 Escape

1RTSR/W 1 Request-to-Send (active low) — Deprecated — for flow control, use the

TXE and REM bits for polling- or interrupt-based co mmunication.

This bit must be written to zero.

0CTS R1Clear-to-Send (active low) — Deprecated — for flow control, use the TXE

and REM bits for polling- or interrupt-based communication.

AN93

26 Rev. 1.41

Bit 6 (TXE) is a read/write bit that gives the st atus of the 14-byte deep transmit FIFO. If TXE = 0, the transmit FIFO

contains thr ee or mo re byte s. If TXE = 1, the transmit FIF O contains two or fewer bytes. Writing TXE = 0 clears the

interrupt but does not change the state of TXE.

Bit 5 (REM) is a read- only b it tha t indicates when th e receive FIFO is empty. If REM = 0, the receive FIFO contai ns

valid data. If REM = 1, the receive FIFO is empty. The timer interrupt set by U6F ensures that the receive FIFO

contents 9 bytes are serviced properly.

Bit 4 (INTM) is a read/write bit that controls whether or not INT (bit 3) triggers the INT pin.

Bit 3 (INT) is a read-only bit that reports Interrupt status. If INT = 0, no interrupt has occurred. If INT = 1, an

interrupt due to CID, OCD, PPD, RI, or DCD (U70 bit s 4, 3, 2, 1, 0, re spectively) has occurred. T his bit is reset by :I.

Bit 2 (ESC) is a read/write bit that is functionally equivalent to the ESC pin in the serial mode. The operation of this

bit, like the ESC pin, is enabled by setting U70 [15] (HES) = 1.

The use of bits 1 and 0 (RTS and CTS) has been deprecated for both parallel and SPI interfaces. Instead, the use

of bits 6 and 5 (TXE and REM) is recommended for polling- and interrupt-based communication.

2.2.4.3. Parallel Interface Operation

When the device is powered up for parallel interface, the pins include eight data lines (D7–D0), a single address

(A0), a read strobe (RD), a write strobe (WR), an interrupt line (INT), and chip select (CS). Table 23 summarizes

the parallel-interface signals:

Refer to the device data sheet for timing characteristics. Address pin A0 allows the host processor to choose

between the two interface registers, HIR0 and HIR1. The timing diagrams below show typical parallel-interface

operation. Refer to the respective product data sheets for timing specifications.

Table 23. Parallel Interface Signals

Signal Function Direction

CS Chip Select (active low) Input

A0 Register address Input

RD Read strobe (active low) Input

WR Write strobe (active low) Input

D[7:0] Data bus Bidirectional

INT Interrupt (active low) Output

AN93

Rev. 1.41 27

Figure 7. Parallel Interface Read Timing

Figure 8. Parallel Interface Write Timing

AN93

28 Rev. 1.41

2.2.4.4. SPI Interface Operation

SPI interface operation is supported in the Si24 93/57/34 /15/04 Revision D o r later and the Si2494/39 Revision A or

later. When the device is powered up for SPI interface, the modem becomes an SPI slave, and the pins are

configured to SS (chip select input, active low), MOSI (serial data input to modem), MISO (serial data output from

modem) and SCLK (serial data clock input). The HIR0 and HIR1 registers described above are also available in

SPI mode. Each SPI operation consists of a control-and-address byte and a data byte. The bit definitions of the

control-and-address byte are shown in Table 24. The timing diagrams that follow show SPI read and write

waveforms. Refer to the device data sheet for timing characteristics.

Figure 9. SPI Read and Write Timing Diagrams

2.2.4.5. Interface Communication Modes

Data flow control is implemented in the SPI and parallel interfaces differently from UART mode. When parallel or

SPI mode is selected, data communication may be driven by interrupts or by polling. Refer to "Appendix C—

Parallel/SPI Interface Software Implementation" on page 302 for implementation details for both methods. The

parallel and SPI interfaces have four sources of interrupts and only one interrupt pin. The four interrupts ar e:

1. RXF Interrupt: receive FIFO almost full

2. TXE Interrupt: transmit FIFO almost empty

3. Ti m e r Int er ru p t: re ce ive F IF O no t em pt y

4. U70 Interrupt: various conditions, such as ringing, parallel phone pickup, etc. as defined in registe r U70

The source of the interrupt can be determined by reading HIR1.

Table 24. SPI Control-and-Address Bit Definitions

Bit Function Meaning when High Meaning when Low

7 Address Access HIR1 Access HIR0

6 Read/Write Read register Write register

5:0 Reserved Not allowed Must be all zeroes

SCK

NSS

MISO

MOSI

Hi‐

SPI2

‐

teWriteProtocol

Ad dre ss /Co ntr ol Data

SCK

NSS

MIS



MOSI

Hi‐

SPI2

‐

teRe ad Pr oto col

Address/Control

Data

AN93

Rev. 1.41 29

2.3. Isolation Capacitor Interface

The isolation capacitor is a proprietary high-speed interface connecting the modem chip and the DAA chip through

a high-voltage isolation barrier provided by two capacitors. It serves three purposes. First, it transfers control

signals and transmit data from the modem chip to the DAA chip. Second, it transfers receive and status data from

the DAA chip to the modem chip. Finally, it provides power from the mo dem chip to the DAA chip while the modem

is in the on-hook condition. The signaling on this interface is intended for communication between the modem and

the DAA chips an d cannot be used for any o ther purpo se. It is impo rta nt to keep the length of the ISOcap™ p ath as

short and direct as possible. The layout guidelines for the pins and compo nents associated with t his interface are

described in "4.4. Layout Guidelines" on page 52 and must be carefully followed to ensure proper operation and

avoid unwanted emissions.

2.4. Low-Power Modes

2.4.1. Power-Down Mode

The Power-Down mode is a lower power state than sleep mode. It is entered immediately upon writing

U65 [13] (PDN) = 1. Once in the Power-Down mode, the modem requires a hardware reset via the RESET pin to

become active again.

2.4.2. Wake-on-Ring Mode

The ISOmodem can be set to enter a low-power wake-on-ring mode when not connected. Wake-on-ring mode is

entered using the comma nd AT&Z. The ISOmodem returns to the active mode when one of th e followin g h appens:

There is a 1 to 0 transition on TXD in the UART mode

There is a 1 to 0 transition on CS in the parallel mode

There is a 1 to 0 transition on SSS in the SPI mode

An incoming ring is detected

A parallel telephone is picked up

Line polarity reversal

2.4.3. Sleep Mode

The ISOmodem can be set to enter a low-power sleep mode when not connected and after a period of inactivity

determined by the S24 register.

The ISOmodem enters the sleep mode S24 seconds after the last DTE activity, after the transmit FIFO is empty,

and after the last data are received from the remote modem. The ISOmodem return s to the active mode when one

of the following happens:

There is a 1 to 0 transition on TXD in the UART mode

There is a 1 to 0 transition on CS in the parallel mode

There is a 1 to 0 transition on SSS in the SPI mode

An incoming ring is detected

A parallel telephone is picked up

Line polarity reversal

The delay range for S24 is 1 to 255 secon ds. T he d efaul t se tting of S24 = 0 disables the sleep timer and ke eps the

modem in the normal power mode regardless of activity level.

AN93

30 Rev. 1.41

2.5. Controlling GPIOs (38-Pin QFN Only)

The Si2494 and Si243939 have pins that are configurable as general-purpose I/Os. I/O pads are physically

assigned to the GPIO p ins o f 38 -p in p a cka ges as sho wn in Table 25. Depending on the application, othe r pins may

be configured as GPIOs, but, to avoid conflicts with defined pin functions, in general, it is best to use the pins

described below. If other pins are needed as GPIOs, contact Silicon Laboratories for assistance.

Each I/O pad is controlled by a set of registers:

Port Select—Determines that a pin is a GPIO; each Port Select register controls two adjacent I/Os. To use a

pin as a GPIO, the PSELn[5:0] bits of the corresponding register are written to zero.

Port Mode—Configures a GPIO as open drain or p ush-pull outp ut. The mode is controlled by registers 0x005C

bits 0-15 and 0x005D, bits 0-9. G PIO 11 is configur e d by 0x005C bit 11; GPIO16 by 0x005D bit 0, and so on.

Port Latch—Sets the output state high or low. For a GPIO input, the pin must be selected as Open Drain, and

then driven high, effectively putting it in high impedance mode . The pin status can be read even if it is in output

mode.

To configure a pin as an input, set the corresponding bit in the Port Mode register for an open drain output and the

corresponding bit in the Port Latch register for a logic 1. The same settings are used for an output in the high

impedance state.

The registers are read and written using the AT:Q and AT:W commands in conjunction with the AT*Y254 and the

AT*Y0 commands.

Example 1. Configure pin 31 as a GPIO output, Push-pull, output high:

AT*Y254 // Initiate the memory access mode

AT:W8C & C0FF // Clear PSEL25[5:0] to make pin 31 (n=25) a GPIO

// This is the default state - may not need to clear it again

AT:W5D | 0200 // Select Push-Pull; by default it is Open Drain

AT:W5F | 0200 // Write 1 to GPIO25.

AT*Y0 // Close the memory access mode

Example 2. Configure pin 34 as a GPIO inp ut:

AT*Y254

AT:W89 & FFC0 // Clear PSEL18[5:0], to make pin 34 (n=18) a GPIO

// This is the default state, so clearing it may not be necessary

AT:W5D & FFFB // Select Open Drain - this is the default state

Table 25. GPIO Pin Assignments

Pin GPIOn n PSELn Address

34 GPIO18 18 0x89

33 GPIO17 17 0x88

32 GPIO16 16 0x88

31 GPIO25 25 0x8C

30 GPIO24 24 0x8C

20 GPIO11 11 0x85

AN93

Rev. 1.41 31

AT:W5F | 0004 // Write a 1 to GPIO18; this will make the port high impedance

AT:Q5F // Read the port status, bit 2 should reflect the state of the port

AT*Y0 // Close the special AT*Y254 command

Table 26. PSEL11_10 Bit Map (0x0085)

Bit Name Function

15:14 Reserved Read returns 0

13:8 PSEL11[5:0] Port Mapping Select.

000000 = Corr es po nd in g pin is a GPIO

7:6 Reserved Read returns 0

5:0 PSEL10[5:0] Port Mapping Select.

000000 = Corr es po nd in g pin is a GPIO

Table 27. PSEL17_16 Bit Map (0x0088)

Bit Name Function

15:14 Reserved Read returns 0

13:8 PSEL17[5:0] Port Mapping Select.

000000 = Corr es po nd in g pin is a GPIO

7:6 Reserved Read returns 0

5:0 PSEL16[5:0] Port Mapping Select.

000000 = Corr es po nd in g pin is a GPIO

Table 28. PSEL19_18 Bit Map (0x0089)

Bit Name Function

15:14 Reserved Read returns 0

13:8 PSEL19[5:0] Port Mapping Select.

000000 = Corr es po nd in g pin is a GPIO

7:6 Reserved Read returns 0

5:0 PSEL18[5:0] Port Mapping Select.

000000 = Corr es po nd in g pin is a GPIO

Table 29. PSEL25_24 Bit Map (0x008C)

Bit Name Function

15:14 Reserved Read returns 0

13:8 PSEL11[5:0] Port Mapping Select.

000000 = Corr es po nd in g pin is a GPIO

7:6 Reserved Read returns 0

5:0 PSEL10[5:0] Port Mapping Select.

000000 = Corr es po nd in g pin is a GPIO

AN93

32 Rev. 1.41

Table 30. Port Mode 0 Bit Map (0x005C)

Bit Name Function

15:0 P0MD[15:0] Port Mode. Configures mode of GPIO 0 through 15 .

0 = Corresponding P.n output is open drain

1 = Corresponding P.n output is push-pull

Table 31. Port Mode 1 Bit Map (0x005D)

Bit Name Function

15:10 Reserved Read returns 0

9:0 P1MD[9:0] Port Mode. Configures mode of GPIO 16 through 25.

0 = Corresponding P.n output is open drain

1 = Corresponding P.n output is push-pull

Table 32. Port Latch 0 Bit Map (0x005E)

Bit Name Function

15:0 P0[15:0] Port Latch. Write output state or read logic state of pin.

Write:

0 = Logic low output

1 = Logic high output

Read:

0 = Corresponding pin is a logic low

1 = Corresponding pin is a logic high

Table 33. Port Latch 1 Bit Map (0x005F)

Bit Name Function

15:10 Reserved Read returns 0

9:0 P1[9:0] Port Latch. Write output state or read logic state of pin.

Write:

0 = Logic low output

1 = Logic high output

Read:

0 = Corresponding pin is a logic low

1 = Corresponding pin is a logic high

AN93

Rev. 1.41 33

2.6. SSI/Voice Mode (24-Pin TSSOP and 38-Pin QFN Only)

Voice mode is supported in the Si2439 and the Si2494. Table 34 lists the pin connections for the ISOmodem SSI

interface. This interface enables Voice Mode operation. See "7. Handset, TAM, and Speakerphone Operation" on

page 185 for additional information.

The Si3000 is used in conjunction with the ISOmodem to transmit and receive 16-bit voice samples to and from

telephone lines as shown in Figure 10.

Figure 10. Voice Mode Block Diagram

Table 34. SSI Interface Pin Connection

Signal Pin Number

(TSSOP-24) Pin Number

(QFN-38)

CLKOUT 3 3

FSYNC 42

SDI 18 8

SDO 24 9

RESET 12 16

Si24xx Modem

Si3000 Voice Codec

Si30xx

DAA

Handset

HOST AT commands

Responses 2- wire

SDISDO

FSYNC MCLK

CLKOUT

SDI SDO

FSYNC

TDMA Interface

AN93

34 Rev. 1.41

2.7. EEPROM Interface (24-Pin TSSOP and 38-Pin QFN Only)

The 24-pin TSSOP and 38-pin QFN packages feature an optional three-wire interface (EESD, EECS and EECLK)

that may be directly connected to SPI EEPROMs. An EEPROM may contain custom default settings, firmware

upgrades, and/or user-defined AT command macros for use in custom AT commands or country codes. Firmware

upgrades may also be automatically loaded into the ISOmodem using the BOOT format.

2.7.1. Supported EEPROM Types

The EEPROM must support SPI mode 3 with a 16-bit (8–64 kbit range) address. The EEPROM must be between

8192 and 65536 bits in size and support the commands given in Table 35. The EEPROM must also support 16-bit

addressing regardless of size, allow a clock frequency of at least 1 MHz, assert its output on falling edges of

EECLK and latch input data on rising edges of EECLK. All data are sent to and from the EEPROM with the LSB

first. Required EEPROM command format and signal timing are shown in Tables 35 to 37. A typical EEPROM-

access timing diagram is shown on Figure 11. Such EEPROMs are available from several different manufacturers,

for example:

Microchip: 25LC080..25LC640

Atmel: AT25080..AT25640

WEL = write enable latch

WIP = write in progress

Table 35. EEPROM Commands

Instruction Name Instru ction Format Description

READ 0000 0011 Read data from memory at address

WRITE 0000 0010 Write data to memory array beginning at addr es s

WRDI 0000 0100 Clear write enable bit (disable write operation)

RDSR 0000 0101 Read status reg ister

WRSR 0000 0001 Write status register

WREN 0000 0110 Set write enable bit (enable write operations)

Table 36. EEPROM Status Register (Any Other Bits are Unused)

76543210

——————WELWIP

Table 37. EEPROM Timing

Parameter Symbol Min. Typ. Max. Unit

EECLK period ECLK 1.0 — — µs

EESD input setup time EISU 100 — — ns

EESD input hold time EIH 100 — — ns

EESD output setup time* EOSU 500 — — ns

EESD output hold time* EOH 500 — — ns

EECS asserted to EECLK positive edge ECSS 500 — — ns

AN93

Rev. 1.41 35

Figure 11. EEPROM Serial I/O Timing

EESD tristated before last falling EECLK edge during read

cycle. Last positive half of EECLK cycle is extended to provide

both 500 ns minimum EOH and 100 ns EESD before EECLK

falling edge.

EOZ 100 — — ns

EECS disable time between accesses ECSW 500 — — ns

EECS asserted after final EECLK edge ECSH 1 — — µs

*Note: EESD output at negative EECLK edge

Table 37. EEPROM Timing

Parameter Symbol Min. Typ. Max. Unit

ECLK

LSB

MSB

EISU

EOSU EIH

EDH

ECSH ECSW

EOZ

ECSS

EEPROM Data Format

EESD

EECS

8-bit instruction 16-bit address 8-bit data

EOH

AN93

36 Rev. 1.41

2.7.2. Three-Wire SPI Interface to EEPROM

To enable the 3-wire SPI interface to EEPROM on the 24-pin TSSOP package, appropriate pins must be reset

strapped according to Table 6 on page 14, or Table 8 on page 15, depending on the interface selected. The

EEPROM option is not available on the 24-pin TSSOP package if the parallel host interface is selected.

Figure 12 shows the connection diagram for the 3-wire SPI interface to EEPROM. A four-wire EEPROM (with

separate serial input and output data wires) may also be used with the input and output pins connected to EESD, if

its SO output is tristated on the last falling edge of EECLK during a read cycle.

Figure 12. Three-Wire EEPROM Connection Diagram

2.7.3. Detailed EEPROM Examples

Upon powerup, if the option is selected, the ISOmodem attempts to detect an EEPROM. The modem looks for a

carriage return in the first 10 memory locations. If none is found, the modem assumes the EEPROM is not

programmed and stops reading it. If a programmed EEPROM is detected, customer defaults that are programmed

into the EEPROM be tween the option al heading "BOOT " and the "<CR><CR>" delimiter are executed immediately,

and AT command macros are loaded into the ISOmodem RAM. The memory that may be allocated to the

<commands> portion of the EEPROM is limited to 1000 bytes. Three <CR> must be the last three entries in the

EEPROM.

EEPROM Data are stored and read in hexadecimal ASCII format in eight address blocks beginning at a specified

hexadecimal address. For example, the AT:M0000,y0,y1,y2,y3,y4,y5,y6,y7 command writes the hexadecimal

values y0…y7 at addresses from 0 to 7, respectively. The AT:E0000 command reads the hexadecimal values

y0…y7 from addresses 0 to 7, resp ectively.

The following sections give specific examples of EEPROM usage for command macros, firmware upgrades, boot

commands, etc.

2.7.4. Boot Commands (Custom Defaults )

Commands to be executed upon boot-up are stored between the heading BOOT and the first <CR><CR> delimiter.

The boot command has the followin g format:

BOOT<CR>

<CR>

HOST

SPIEEPROM

SI/SO CS SCLK

MODEM

EESD EECS SCLK

Si3018/10

TELEPHONELINE

AN93

Rev. 1.41 37

The commands end with a <CR>, which, in combination with the final<CR>, provides the <CR><CR> delimiter.

Boot commands must be the first entry in the EEPROM and are used to set the modem up with custom defaults,

such as settings for specific countries, auto answer, or other special settings upon power up or after a hardware or

software reset.

This saves th e host proces sor from r eloadin g special c onfiguration strings at power up or after a reset, and allows

the modem to be customized by programming the EEPROM or by substituting preprogrammed EEPROMs. If the

BOOT command is the final entry in the EEPROM, it must end with an additional <CR> to provide the

<CR><CR><CR> delimiter indicating the end of the EEPROM.

2.7.5. AT Command Macros (Customized AT Commands)

Macros allow the creation of single custom AT commands that execute combinations of default AT commands

including special register configurations. AT command macros have the following format:

<CR>

Each AT Command Macro ends with a <CR><CR>. The final entry in the EEPROM ends with an additional <CR>

to provide the <CR><CR><CR> delimiter indicating the end of the EEPROM. AT command macros can have a

name consistin g of any stri ng of char act e rs but must be the only command on a line.

2.7.6. Firmware Upgrades

Firmware upgrades (“patches”) are typically executed upon boot-up and stored between the heading, BOOT, and

the first <CR><CR> delimiter. A firmware upgrade has the format: BOOT<firmware upgrade><CR>. The firmware

upgrade ends with a <CR>, which, in combination with the final<CR>, provides the <CR><CR> delimiter, which

marks the end of the EEPROM contents. A firmware upgrade can also be stored as an AT command macro in a

system where using the firmware upgrade is optional. The following are examples of boot commands, AT

command macros, and automatically-loaded firmware upgrades.

2.7.6.1. Boot Command Example

On power-up or reset, it is desired to set the UART rate to 115.2 kbps and limit the ISOmodem to V.34 and lower

operation.

The AT commands required to do this manu ally are:

AT\T12<CR>

AT&H2<CR>

To implement this as a boot command, the commands are:

BOOT<CR>

AT\T12<CR>

AT&H2<CR>

<CR>

This must be written to the EEPROM as ASCII hexadecimal in eight address block s. The actu al AT commands to

store this boot command in the EEPROM starting at address 0 are:

AT:M0000,42,4F,4F,54,0D,41,54,5C

AT:M0008,54,31,32,0D,41,54,26,48

AT:M0010,32,0D,0D,00,00,00

The value 0x41 co rresponds to th e display charac ter A, 0x54 to T, 0x42 to B, 0x4F to O etc., and the value 0x0D,

for carriage return corresponds to the decimal value, 13, stored in S-register 3 (S3). Table 39 shows the

relationship between the decimal values, he xadecimal values, and display characters.

AN93

38 Rev. 1.41

2.7.6.2. AT Command Macro Example

This example creates the AT command macro ATN<CR> to configure the ISOmodem for operation in Norway.

The AT commands required to do this manu ally are:

AT:U2C,00B0,0080<CR>

AT:U67,000C,0010,0004<CR>

AT:U4D,001<CR>

To implement this as an AT command macro, the EEPROM contents should be:

N<CR>

AT:U2C,00B0,0080<CR>

AT:U67,000C,0010,0004<CR>

AT:U4D,001<CR>

This must be written to the EEPROM as ASCII hexadecimal in eight address block s. The actu al AT commands to

store this boot command in the EEPROM starting at address 0 are:

AT:M0000,4E,0D,41,54,3A,55,32,43

AT:M0008,2C,30,30,42,30,0D,0D,30

AT:M0010,38,30,0D,41,54,3A,55,36

AT:M0018,37,2C,30,30,30,43,2C,30

AT:M0020,30,31,30,2C,30,30,30,34

AT:M0028,0D,41,54,3A,55,34,44,2C

AT:M0030,30,30,31,0D,0D,0D

With this macro installed in the EEPROM, th e comman d ATN<CR> configures the mo de m for op er ation in Norway.

2.7.6.3. Autoloading Firmware Upgrade Example

This example stores a firmware upgrade in EEPROM that is automatically loaded into the modem af ter power-up or

hardware/software reset if the EEPROM option is selected.

The AT commands required to load the firmware upgrade manually are:

AT*Y254:W0050,0000<CR>

AT:PF800.08D5

To implement this as a boot command macro, the commands are:

BOOT<CR>

AT*Y254:W0050,0000<CR>

AT:PF800.08D5

This must be written to the EEPROM as ASCII hexadecimal in eight address block s. The actu al AT commands to

store this boot command in the EEPROM starting at address 0 are:

AT:M0000,42,4F,4F,54,0D,41,54,2A

AT:M0008,59,32,35,34,3A,57,30,30

AT:M0010,35,30,2C,30,30,30,30,0D

AT:M0018,41,54,3A,50,46,34,30,30

AT:M0020,2C,30,38,44,35,0D,0D,0D

This firmware upgrade (patch) is only an example meant to illustrate the procedure for loading a patch into the

EEPROM. Loading this code into a ISOmodem causes undesirable behavior.

AN93

Rev. 1.41 39

2.7.6.4. Combination Example

This example shows boot commands and custom AT commands stored in the same EEPROM.

Table 38. Combination Example

Command Function

BOOT<CR>

Start of EEPROM contents

<CR>

End of BOOT string

Start of Custom AT Command 1

<CR>

End of Custom AT Command 1

Start of Custom AT Command 2

<CR>

End of Custom AT Command 2

Start of Custom AT Command 3

<CR> End of Custom AT Command 3

<CR> End of EEPROM Contents

AN93

40 Rev. 1.41

Table 39. ASCII Chart

dec hex Display dec hex Display dec hex Display dec hex Display

0 00 <NUL> 32 20 <space> 64 40 @ 96 60 `

1 01 <SOH> 33 21 ! 65 41 A 97 61 a

2 02 <STX> 34 22 “ 66 42 B 98 62 b

3 03 <ETX> 35 23 # 67 43 C 99 63 c

4 04 <EOT> 36 24 $ 68 44 D 100 64 d

5 05 <ENQ> 37 25 % 69 45 E 101 65 e

6 06 <ACK> 38 26 & 70 46 F 102 66 f

7 07 <BEL> 39 27 ' 71 47 G 103 67 g

8 08 <BS> 40 28 ( 72 48 H 104 68 h

9 09 <HT> 41 29 ) 73 49 I 105 69 i

10 0A <LF> 42 2A * 74 4A J 106 6A j

11 0B <VT> 43 2B + 75 4B K 107 6B k

12 0C <FF> 44 2C , 76 4C L 108 6C l

13 0D <CR> 45 2D - 77 4D M 109 6D m

14 0E <SO> 46 2E . 78 4E N 110 6E n

15 0F <SI> 47 2F / 79 4F O 111 6F o

16 10 <DLE> 48 30 0 80 50 P 112 70 p

17 11 <DC1> 49 31 1 81 51 Q 113 71 q

18 12 <DC2> 50 32 2 82 52 R 114 72 r

19 13 <DC3> 51 33 3 83 53 S 115 73 s

20 14 <DC4> 52 34 4 84 54 T 116 74 t

21 15 <NAK> 53 35 5 85 55 U 117 75 u

22 16 <SYN> 54 36 6 86 56 V 118 76 v

23 17 <ETB> 55 37 7 87 57 W 119 77 w

24 18 <CAN> 56 38 8 88 58 X 120 78 x

25 19 57 39 9 89 59 Y 121 79 y

26 1A 58 3A : 90 5A Z 122 7A z

27 1B <ESC> 59 3B ; 91 5B [ 123 7B {

28 1C <FS> 60 3C < 92 5C \ 124 7C |

29 1D <GS> 61 3D = 93 5D ] 125 7D }

30 1E <RS> 62 3E > 94 5E ^ 126 7E ~

31 1F <US> 63 3F ? 95 5F _ 127 7F

AN93

Rev. 1.41 41

3. DAA (Line-Side) Device

The Si3018/10 DAA or line-side device, contains an ADC, a DAC, control circuitry, and an isolation capacitor

interface. The Si3018/10 and surrounding circuitry provide all functionality for telephone line interface requirement

compliance, including a full-wave rectifier bridge, hookswitch, dc termination, ac termination, ring detection, loop

voltage and current monitoring, and call-progress monitoring. The Si3018/10 external circuitry is largely

responsible for EMI, EMC, safety, and surge performance.

3.1. Hookswitch and DC Termination

The DAA has program mable settings for the dc impedance, curr ent limiting, minimum operatio nal loop current, and

Tip-to-Ring voltag e. The dc impeda nce of the DAA is normally represented by a 50  slope as shown in Figure 13,

but can be changed to an 800  slope by setting the DCR bit. This higher dc termination presents a higher

resistance to the line as the loop current increases.

Figure 13. FCC Mode I/V Characteristics

DCV[1:0] =11, MINI[1:0] =00

For applications requiring current limiting per the legacy TBR21 standard, the ILIM bit may be set to select this

mode. In this mode, the dc I/V curve is changed to a 2000  slope above 40 mA, as shown in Figure 14. This

allows the DAA to operate with a 50 V, 230  feed, which results in the highest current possible in the old TBR21

standard.

Figure 14. TBR21 (Legacy) Mode I/V Characteristics

DCV[1:0] =11, MINI[1:0] =00

The MINI[1:0] bits select the minimum operational loop current for the DAA, and the DCV[1:0] bits adjust the DCT

pin voltage, which affects the Tip-to-Ring voltage of the DAA. These bits allow important trade-offs to be made

between signal headroom and minimum operational loop current. Increasing the Tip-Ring voltage increases signal

headroom, whereas decreasing the voltage allows compliance to PTT standards in low-voltage countries, such as

Japan or Ma laysia. Increasing the minimum o pera tional loop cur re nt ab ove 10 mA also increase s sig nal he adr oom

and prevents degradation of the signal level in low-voltage countries.

6.01 .02 .03 .04 .05 .06 .07 .08 .09 .1 .11

Loop Current (A)

FCC DCT Mode

Voltage Ac ross DAA (V)

.015 .02 .025 .03 .035 .04 .045 .05 .055 .06

Loop Current (A)

TBR21 D CT Mode

Voltage Acros s DAA (V)

AN93

42 Rev. 1.41

3.2. AC Termination

The ISOmodem has four ac termination impedances when used with the Si3018 lin e-side device, se lected by the

ACT bits in Register U63. The four available settings for the Si3018 are listed in Table 40. If an ACT[3:0] setting

other than the four listed in Table 40 is selected, the ac termination is forced to 600  (ACT[3:0] = 0000).

3.3. Ringer Impedance and Threshold

The ring detector in many DAAs is ac coupled to the line with a large 1 µF, 250 V decoupling capacitor. The ring

detector o n the ISOmodem is re sistively coupled to the line. This produces a high ringer impedance to the line of

approximately 20 M. This meets the majority of country PTT specifications, including FCC and ETSI ES 203 021.

Several countries, including Poland, South Africa, and Slovenia, require a maximum ringer impedance that can be

met with an internally synthesized impedance by setting the RZ bit (Register 67, bit 1).

Some countries specify different ringer thresholds. The RT bit (Register U67, bit 0) selects between two different

ringer thresholds: 15 V ±10% and 21.5 V ±10%. These two settings satisfy ringer threshold requirements

worldwide. The thresholds are set so that a ring signal is guaranteed to be detected above the maximum and not

detected below the minimum.

3.4. Pulse Dialing and Spark Quenching

Pulse dialing is accomplished by going off- and on-hook at a certain cadence to generate make and break pulses.

The nominal rate is ten pulses per second. Some countries have strict specifications for pulse fidelity that include

make and break times, make resistance, and rise and fall times. In a traditional, solid-state dc holding circuit, there

are many problems in m eeting these re quir ements. The ISOmodem dc holding circuit actively controls the on-hook

and of f-hook transients to maintain pulse dialing fidelity.

Spark-quenching requirements in countries such as Italy, the Netherlands, South Africa and Australia deal with the

on-hook transition during pulse dialing. These tests provide an inductive dc feed resulting in a large voltage spike.

This spike is caused by the line inductance and sudden decrease in current through the loop when going on-hook.

The traditional solution to the problem is to put a parallel resistive capacitor (RC) shunt across the hookswitch

relay. However, the capacitor required is bulky (~1 µF, 250 V) and relatively costly. In the ISOmodem, the loop

current can be controlle d to achieve three disti nct on-hook speeds to p ass sp ark-quenching te sts with out additional

BOM components. Through settings of two bits in two registers, OHS (Register U67, bit 6) and OHS2 (Register

U62, bit 8), a delay between the time the OH bit is cleared and the time the DAA actually goes on-hook, can be

created, which induces a slow ramp-down of the loop current.

3.5. Line Voltage and Loop Current Sensing

There are two methods for line voltage and loop current sensing. The first method is the legacy mode using

U79 (LVCS) [4:0]. The legacy mode is intended for backward compatibility in applications originally designed for

the previous generation ISOmodem. This mode is used in the intrusion detection algorithm implemented on the

device. The legacy mode is set when LLP (UAD [4] = 1 (default).

The second method of measuring line voltage and loop current takes advantage of the improved resolution

available on the Si3018 a nd Si3010 DAA chip s. U63 (LCS) [15:8] represents th e value of of f-hook loo p current as a

non-polar binary number with 1.1 mA/bit resolution. Accuracy is not guaranteed if the loop current is less than the

minimum required for normal DAA operation. U6C (LVS) [15:8] represents the value of on-hook and off-hook loop

voltage as a signed, two’s complement number with a resolution of 1 V/bit.

Table 40. AC Termination Settings for the Si3018 Line-Side Device

ACT[3:0] AC Termination

0000 600 

0011 220  + (820  || 120 nF) and 220  + (820  || 115 nF)

0100 370  + (620  || 310 nF)

1111 Global complex impedance

AN93

Rev. 1.41 43

Bit 15 represents the polarity of the Tip-Ring voltage, and a reversal of this bit represents a Tip-Ring polarity

reversal. LVS = 0x0000 if the T ip-Ring voltage is less than 3.0 V and, in the on-hoo k state, can be taken as “no line

connected.”

The ISOmodem r eports the on-hook line voltag e with the LVS bits in two’ s complement. LVS has a full scale o f 87 V

with an LSB of 1 V. The first code step (going from 0 to 1) is offset so that a 0 indicates a line voltage of less than

3 V. The accuracy of the LVS bits is ±10%. The user can read these bits directly through the LVS register. A typical

transfer function is shown in Figure 15.

When the ISOmodem is off-hook, the LCS bits measure loop current in 1.1 mA/bit resolution. These bit s enable the

user to detect another phone going off-hook by monitoring the dc loop current. Line-current sensing is detailed in

Figure 16 and Table 41.

Figure 15. Typical Loop Voltage LVS Transfer Function

112

128

0 163248648096112128

Tip/Ring Voltage (Vo lts)

LVS Bits

AN93

44 Rev. 1.41

Figure 16. Typical Loop Current LCS Transfer Function

Table 41. Loop Current Transfer Function

LVCS[4:0] Condition

00000 Insufficient line current for normal operation.

11111 Loop current overload. Overload is d efined as 12 8 mA or more, except

in TBR21, where ov er loa d is defined as 56 mA or more.

128

160

192

224

256

0 163248648096112128144

Loop Current (mA)

LCS Bits

ILIM = 1

ILIM = 0

AN93

Rev. 1.41 45

3.6. Legacy-Mode Line Voltage and Loop Current Measurement

The 5-bit LVCS register, U79 (LVCS) [4:0], reports line voltage measurements when on-hook and loop current

measurements when off-hook.

Using the LVCS bits, the user can determine the following:

When on-hook, detect if a line is connected.

When on-hook, detect if a parallel phone is off-hook.

When off-hook, detect if a parallel phone goes on or off-hook.

Detect if enough loop current is available to operate.

3.7. Billing Tone Detection

Billing tones or metering pulses generated by the central office can c ause connection difficulties in modems. The

billing tone is typically a 12 kHz or 16 kHz signal and is sometimes used in Germany, Switzerland, and South

Africa. Depending on line conditions, the billing tone may be large enough to cause major modem errors. The

ISOmodem chipset can provide feedback when a billing tone occurs and when it ends.

Billing tone detection is enabled by setting the BTE bit (U68, bit 2). Billing tones less than 1.1 V PK on the line are

filtered out by the low-pass digital filter on the ISOmodem. The ROV bit (U68, bit 1) is set when a line signal is

greater t han 1 .1 VPK, indicating a receive overload condition. The BTD bit is set when a line signal (billing tone) is

large enough to excessively reduce the line-derived power supply of the line-side device (Si3018/10). When the

BTE bit is set, the dc termination is changed to an 800  dc impedance. This ensures minimum line voltage levels

even in the presence of billing tones.

The OVL bit should be polled following billing-tone detection. When the OVL bit returns to 0, indicating that the

billing tone has passed, the BTE bit should be written to 0 to return the dc termination to its original state. It takes

approximately 1 se cond to return to norma l dc operatin g conditions. The BTD and ROV bit s are sticky and must be

written to 0 to be reset. After the BTE, ROV, and BTD bits are cleared, the BTE bit can be set to reenable billing-

tone detection.

Certain line events, such as an off-hook event on a para llel phone or a polar ity reversal, may trigger the ROV bit or

the BTD bit, after which the billing-tone detector must be reset. Look for multiple events before qualifying whether

billing tones are actually present.

Although the DAA remains off-hook during a billing-tone event, the received data from the line is corrupted (or a

modem disconnect or retrain may occur) in the presence of large billing tones. To receive data in the presence of a

billing tone, an external LC filter must be added. A modem manufacturer can provide this filter to users in the form

of a dongle th at co nn ec ts on the p ho n e lin e be fo re th e DAA. T h is k ee ps the man u fa ctu re r fro m ha vin g to inc l ud e a

costly LC filter internal to the modem when it may only be necessary to support a few countries or customers.

Alternatively, when a billing tone is detected, the host software may notify the user that a billing tone has occurred.

This notification can be used to prompt the user to contact the telephone company to have the billing tones

disabled or purchase an external LC filter.

AN93

46 Rev. 1.41

4. Hardware Design Reference

This section describes hardware design requirements for optimum Si24xx ISOmodem chipset implementation.

There are three important considerations for any hardware design. First, the reference design and components

listed in the associated bill of materials should be followed exactly. These designs reflect field experience with

millions of deployed u nit s througho ut the worl d and ar e optimized for cost an d perfor mance. Any deviation from the

reference design schematic and components will likely have an adverse affect on performance. Second, circuit

board layouts must follow "4.4. Layout Guidelines" rigorously. Deviations from these layout techniques will likely

affect modem performance and regulatory compliance. Finally, all reference designs use a standard component

numbering scheme. This simplifies documentation references and communication with the Silicon Laboratories

technical support team. It is strongly recommended that these same component reference designators be used in

all ISOmodem designs.

4.1. Component Functions

In spite of the significant internal complexity of the chip, the ex ternal support circuitry is very s imple. The following

section describes the modem’s functions in detail.

4.1.1. Power Supply and Bias Circuitry

Power supply bypassing is important for the proper operation of the ISOmodem, suppression of unwanted

radiation, and prevention of interfering signals and noise from being coupled into the modem via the power supply.

C50 and C52 provide filtering of the 3.3 V system power and must be located as close to the ISOmodem chip as

possible to minimize lead lengths. The best practice is to use surface-mount components connected between a

power plane and a ground plane. This technique minimizes the inductive effects of component leads and PCB

traces and provides bypassing over the widest possible frequency range, and minimizes loop areas that can

radiate radio frequency energy.

Two bias voltages used inside the modem chip require external bypassing and/or clamping. VDA (pin 7) is

bypassed by C51. VDB (pin 19) is bypassed by C53. R12 and R13 are optional resistors that can, in some cases,

reduce radiated emissions due to signals associated with the isolation capacitors. These components must be

located as close to the ISOmodem chip as possible to minimize lead lengths.

The Si3018/10 is powered by a small current passed across the ISOcap in the on-hook mode and by the loop

current in the off-hook mode. Since there is no system ground reference for the line-side chip due to isolation

requirements, a virtual ground, IGND, is used as a reference point for the Si3018/10. Several bias voltages and

signal reference points used inside the DAA chip require external bypassing, filtering, and/or clamping. VREG2

(pin 10) is bypassed by C6. VREG (pin 7) is bypassed by C5. These components must be located as close to the

Si3018/10 chip as possible to minimize lead lengths.

4.1.2. Hookswitch and DC Termination

The hookswitch and dc termination circuitry are shown in Figure 18 on page 49. Q1, Q2, Q3, Q 4, R5. R6, R 7, R8,

R15, R16, R17, R19, and R24 perform the hookswitch function. The on-hook/off-hook condition of the modem is

controlled by Si3018/10 pins 13 (QB) and 1 (QE).

4.1.3. Clocks

The crystal oscillator circuit has three operating frequencies/modes that are selected by using the correct clock

source and by installing the correct pulldown resistors on the modem in order to signal the ISOmodem which mode

to operate. Selecting among these modes of operation is described in "2.1. Resetting the Device" on page 11.

One mode requires a 4.9152 MHz fundamental mode parallel-resonant crystal. Typical crystals require a 20 pF

load capacitance. This load is calculated as the se ries combinati on of th e cap acit ance fro m each crystal terminal to

ground, including parasitic capacitance due to package pins and PCB traces. The parasitic capacitance is

estimated as 7 p F per terminal. This, in combination with the 33 pF capacitor, provides 40 pF p er terminal, which,

in series, yields the pr op er 20 pF loa d fo r the crys tal.

Instead of using a 4.9152 MHz crystal, a signa l at 4 .9152 MHz can be applied to the XTALI pin. In such a case, th e

crystal loading caps should not be used.

AN93

Rev. 1.41 47

The second mode is a 32.768 kHz fundamental mode parallel-resonant crystal. Typical crystals require a 12.5 pF

load capacitance. This load is calculated as the se ries combinati on of th e cap acit ance fro m each crystal terminal to

ground, including parasitic capacitance due to package pins and PCB traces. The parasitic capacitance is

estimated as 7 pF per terminal. This, in combination with the 18 pF capacitor s, provides 25 pF per terminal, which,

in series, yields the proper 12.5 pF load for the crystal.

Instead of a using a 32.768 kHz crystal, a sig nal at 32.768 kHz can be applied to the XTALI pin. In such a case, the

crystal loading caps should not be used.

The third mode is to use a 27 MHz clock signal. A crystal cannot be used for this mode, and the signal must be

applied to the XTALI pin.

Frequency stability and accuracy are critically important to the performance of the modem. ITU-T specifications

require less than 200 ppm difference be tween the carrier fre quencies of two modems. Th is value, split between the

two modems, requires the oscillator frequency of each modem to be accurate and stable over all operating

conditions within ±100 ppm. This tolerance includes the initial accuracy of the crystal, the frequency drift over the

temperature range that the crystal is expected to experien ce, and the five-year aging of the cry stal. Other factors

affecting the oscillator frequency include the tolerance and temperature drift of the load capacitor values. For

optimal V.92 performance, it is recommended to increase the oscillator stability to ±25 ppm.

For all the abov e three modes of oper ation, the CLKIN/XTALI pin (Pin 1) can accept a 3.3 V external clock signal

meeting the accuracy and stability requirements described above.

The CLKOUT/A0 pin outputs a signal derived from the 4.9152 MHz clock. If the frequency of the output is

controlled via register U6E (CK1) using the Si2404 or Si2415, this signal is programmable from 2.64 MHz to

40.96 MHz. If using the Si2434 or Si2457, this signal is programmable from 3.17 MHz to 49.152 MHz. There are

two special cases for the value of R1: R1 = 00000, CLKOUT is disabled, and R1 = 11111 (default),

CLKOUT = 2.048 MHz.

On older parts, the CLKOUT pulse starts immediately after RESET goes high, but, on the most recent versions

(those including SPI and 32 kHz operation), there is a small delay after RESET goes high. The delay is of

approximately 200 µs when using 4.91592 MHz or 27 MHz and approximately 8 ms when using a 32 kHz clock.

4.1.4. Ringer Network

R7 and R8 comprise the ringer network. These components determine the modem’s on-hook impedance at Tip

and Ring. These components are selected to present a high impedance to the line, and care must be taken to

ensure the circuit board area around these components is clean and free of contaminants, such as solder flux and

solder flakes. Leakage on RNG1 (Si3018/10 pin 8) and RNG2 (Si301 8/10 pin 9) can impair modem per formance.

R7 and R8 are also used by the modem to monitor the line voltage.

4.1.5. Optional Billing-Tone Filter

To operate without degradation during billing tones in Germany, Switzerland, and South Africa, an external LC

notch filter is required. (The Si3018/10 will remain off-hook during a billing tone event, but modem dat a may be lost,

or a modem disconnect or retrain may occur, in the presence of large billing-tone signals.) The notch filter design

requires two notches: one at 12 kHz and one at 16 kHz. Because these components are expensive and few

countries require billing-tone support, this filter is typically placed in an external dongle or added as a population

option. Figure 17 shows an example billing tone filter. L3 must carry the entire loop current. The series resistance

of the induct ors is important to a chieve a na rrow and de ep notch. This design has more th an 25 dB of at tenuatio n

at 12 kHz and 16 kHz. The billing tone filter degrades the ac termination and return loss slightly, but the global

complex ac termination passes worldwide return-loss specifications with and without the billing tone filter by at

least 3 dB.

AN93

48 Rev. 1.41

Figure 17. Billing-Tone Filter

Table 42. Optional Billing Tone Filters Component Values

Symbol Value

C1,C2 0.027 µF, 50 V, ±10%

C3 0.01 µF, 250 V, ±10%

L3 3.3 mH, >120 mA, <10 , ±10%

Coilcraft RFB0810 -332 or equivalent

L4 10 mH, >40 mA, <10 , ±10%

Coilcraft RFB0810 -103 or equivalent

RING

TIP

FROM

LINE To

DAA

AN93

Rev. 1.41 49

EECLK/D5/RXCLK

DCD_/D4

ESC/D3

AOUT/INT_

TXD/WR_

RESET_

RXD/RD_

CTS_/CS_/ALE_

alt_RI_/D6/TXCLK

INT_/D0

RI_/D1

EESD/D2

CLKOUT/A0/EECS

RTS_/D7

VDD

RING

TIP

No Ground Plane In DAA Section

External crystal option

Emissions option

Bias

Ring Detect/CID

Hookswitch

DC Term

Bypass

RV1

C41

FB1

C53

C40

Si3018

QE 1

DCT 2

RX 3

C1B

C2B

VREG

RNG1 8

DCT2 16

IGND

DCT3 14

QB 13

QE2 12

VREG2

10 RNG2 9

R12

R10

C10

Q5 Q1

R13

R11

R15

C50

C51

CLKIN/XTALI 1

XTALO 2

CLKOUT/A0/EECS

alt_RI/D6/TXCLK

VD3.3 5

GND

VDA

RTS/D7

VDB

GND

20 VD 3.3 21

C2A 13

C1A 14

ESC/D3

22 DCD/D4

23 EECLK/D5/RXCLK

CTS/CS/ALE

RXD/RD

TXD/WR

RESET

RI/D1

EESD/D2

AOUT/INT

INT/D0

FB2

R16

C52

Si2493/57/34/15/04

Hookswitch/DCT

EMI/EMC

Capacitors

ACT

ISOcap

Conducted Disturbance

Surge Protection

Figure 18. Si3018/10 Component Functions

AN93

50 Rev. 1.41

4.2. Schematic

EECLK/D5/RXCLK

DCD_/D4

ESC/D3

AOUT/INT_

TXD/WR_

RESET_

RXD/RD_

CTS_/CS_/ALE_

alt_RI_/D6/TXCLK

INT_/D0

RI_/D1

EESD/D2

CLKOUT/A0/EECS

RTS_/D7

VDD

RING

TIP

No Ground Plane In DAA Section

RV1

C41

FB1

Si2493/57/34/15/04

C40

Si3018/10

QE 1

DCT 2

RX 3

C1B

C2B

VREG

RNG1 8

DCT2 16

IGND

DCT3 14

QB 13

QE2 12

VREG2

10 RNG2 9

R12

R10

C10

Q5 Q1

R13

R11

R15

C50

C51

CLKIN/XTALI 1

XTALO 2

CLKOUT/A0/EECS

alt_RI/D6/TXCLK

VD3.3 5

GND

VDA

RTS/D7

VDB

GND

20 VD 3.3 21

C2A 13

C1A 14

ESC/D3

22 DCD/D4

23 EECLK/D5/RXCLK

CTS/CS/ALE

RXD/RD

TXD/WR

RESET

RI/D1

EESD/D2

AOUT/INT

INT/D0

FB2

R16

C52

Note: See Section "10.4.2. Safety" for information regarding the use of a fuse or PTC resisto r.

Figure 19. Si3018/10 Schematic

AN93

Rev. 1.41 51

4.3. Bill of Materials

Component Value Supplier(s)

C1, C2 33 pF, Y2, X7R, ±20% Panasonic, Murata, Vishay,

Holy Stone

C3 10 nF, 250 V, X7R, ±20% Venkel, SMEC

C4 1.0 µF, 50 V, Elec/Tant, ±20% Panasonic

C5, C6, C50, C5210.1 µF, 16 V, X7R, ±20% Venkel, SMEC

C7 2.7 nF, 50 V, X7R, ±20% Venkel, SMEC

C8, C9 680 pF, Y2, X7R, ±10% Panasonic, Murata, Vishay,

Holy Stone

C10 0.01 µF, 16 V, X7R, ±20% Venkel, SMEC

C40

C41 32.768 kHz, 18 pF, 16 V, NPO, ±5% Venkel, SMEC

4.9152 MHz, 27 MHz, 33 pF, 16 V, NPO, ±5%

C51, C5310.22 µF, 16 V, X7R, ±20% Venkel, SMEC

D1, D22Dual Diode, 225 mA, 300 V, MMBT3004S Diodes Inc.

FB1, FB2 Ferrite Bead, BLM18AG601SN1 Murata

Q1, Q3 NPN, 300 V, MMBTA42 Diodes Inc., Fairchild

Q2 PNP, 300 V, MMBTA92 Diodes Inc., Fairchild

Q4, Q5 NPN, 80 V, 330 mW, MMBTA06 Diodes Inc., Fa irchild

RV1 Sidactor, 275 V, 100 A Teccor, Protek, ST Micro

R1 1.07 k, 1/2 W, 1% Venke l, SMEC, Panasonic

R2 150 , 1/16 W, 5% Venkel, SMEC, Panaso ni c

R3 3.65 k, 1/2 W, 1% Venke l, SMEC, Panasonic

R4 2.49 k, 1/2 W, 1% Venke l, SMEC, Panasonic

R5, R6 100 k, 1/16 W, 5% Venke l, SMEC, Panasonic

R7, R8 20 M, 1/16 W, 5% V e n k el , SMEC , Pa na so ni c

R9 1 M, 1/16 W, 1% V e n kel , SMEC , Pa na so ni c

R10 536 , 1/4 W, 1% Venkel, SMEC, Panasonic

R11 73.2 , 1/2 W, 1% Venkel, SMEC, Pa na so ni c

R12, R13 56 , 1/16 W, 1% Venkel, SMEC, Panasonic

R15, R1630, 1/16 W Venkel, SMEC, Panasonic

U1 Si24xx ISOmodem Silicon Labs

U2 Si3018 Silicon Labs

Y1432.768 kHz, 12 pF, 100 ppm, 35 k max ESR ECS Inc., Siward, Abracon

4.9152 MHz, 20 pF, 100 ppm, 150  ESR

27 MHz (from external clock)

Z1 Zener Diode, 43 V, 1/2 W, BZT84C43 On Semi

Notes:

1. C52 and C53 should not be populated with the Si2493 16-pin package option.

2. Several diode bridge configurations are acceptable. For example, a single DF04S or four 1N4004 diodes may be used.

3. Murata BLM18AG601SN1 may be substituted for R15–R16 (0 ) to decrease emissions.

4. To ensure compliance with ITU specifications, frequency tolera nce must be less than 100 ppm including initial

accuracy, 5-year aging, 0 to 70 °C, and capacitive loading. For optimal V.92 PCM upstream performance, the

recommended crystal accuracy is ±25 ppm.

AN93

52 Rev. 1.41

4.4. Layout Guidelines

The key to a good layout is proper placement of the components. It is best to copy the placement shown in

Figure 20. Alternatively, follow the following steps, referring to the schematics and Figure 21. It is strongly

recommended to complete the checklist in Table 43 on page 54 while reviewing the final layout.

1. All traces, open pad sites, and vias connected to the following components are considered to be in the DAA

section and must be physically separated from non-DAA circuits by 5 mm to achieve the best possible surge

performance: R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R15, R16, U2, Z1, D1, FB1, FB2, RJ11, Q1, Q2,

Q3, Q4, Q5, C3, C4, C5, C6, C7, C8, C9, C10, RV1, C1 pin 2 only, C2 pin 2 only, C8 pin 2 only, and C9 pin 2

only.

2. The isolation capacitors, C1, C2, C8 and C9, are the only components permitted to straddle between the DAA

section and non-DAA section components and traces. This means that for each of these capacitors, one of the

terminals is on the DAA side, and the other is not. Maximize the spacing between the terminal s (between pin 1

and pin 2) of each of these capacitors.

3. Place and group the following components: U1, U2, R12*, R13*, C1, C2.

*Note: Do not use ferrite beads in place of R12 and R13.

a.U1 and U2 are placed so that the right side of U1 faces the left side of U2.

b.C1 and C2 are placed directly between U1 and U2.

c.Keep R12 and R1 3 close to U1.

d.Place U1, U2, C1, and C2 so that the minimum creepage distance for the target application is met.

e.Place C1 and C2 so that traces connected to U2 pin 5 (C1B) and U2 pin 6 (C 2 B) ar e ph ys ically separated

from traces connected to:

i.C8, R15, FB1

ii.C9, R16, FB2

iii.U2 pin 8, R7

iv.U2 pin 9, R9

4. Place and group the following components around U2: C4, R9, C7, R2, C5, C6, R7, R8. These components

should form the critical “inner circle” of components aroun d U2.

a.Place C4 close to U2 pin 3. This is best achieved by placing C4 northwest of U2.

b.Place R9 close to U2 pin 4. This is best achieved by placing R9 horizontally, directly to the north of U2.

c.Place C7 close to U2 pin 15. This is best achieved by placing C7 next to R9.

d.Place R2 next to U2 pin 16. This is best achieved by placing R2 northeast of U2.

e.Place C6 close to U2 pin 10. This is best achieved by placing C6 southeast of U2.

f.Place R7 and R8 close to U2. This is best achieved by placing these components to the south of U2.

g.Place C5 close to U2 pin 7. This is best achieved by placing C5 southwest of U2.

5. Place Q5 next to R2 so that the base of Q5 can be connected to R2 directly.

6. Place Q4 so that the base of Q4 can be routed to pin 13 of U2 easily and the emitter of Q4 can be r outed to U2

pin 12 easily. Route these two traces next to each other so that the loop area formed by these two traces is

minimized.

7. Place and group the following components around the RJ11 jack: FB1, FB2, RV1, R15, R16, C8, and C9.

a.Use 20-mil-wide traces on this gr ouping to minimize impedance.

b.Place C8 and C9 close to the RJ11 jack, recognizing that a GND trace will be routed between C8 and C9

back to the Si24xx GND pin through a 20- mil-wide trace. The GND trace from C8 and C9 must be isolated

from the rest of the Si3018/10 traces.

c.The trace from C8 to GND and the trace from C9 to GND must be short and of equal lengths.

AN93

Rev. 1.41 53

8. After the previous step, th er e sh ou ld be som e space between the grouping around U2 and the grouping of

components a round the RJ11 jack. Place the rest of the component s in this area, given the following g uidelines:

a.Space U2, Q4, Q5, R1, R3, R4, R10 and R11 away from each other for best thermal performance.

b.The tightest layout can be achieved by grouping R6, C10, Q2, R3, R5, and Q1.

c.Place C3 next to D1.

d.Make the size of the Q1, Q3, Q4, and Q5 collector pads each sufficiently large for the transistor to safely

dissipate 0.5 W under worst case conditions. See the transistor data sheet for thermal resistance and

maximum operating temperatur e information. Implement collector pads on both the component and solder

side, and use vias between them to improve heat transfer for best performance. When ambient conditions

are a moderate 50 deg or less, use 0.05 square inches of copper at the collectors of Q1, Q3, Q4, Q5. Both

sides of the PCB can be used to double the available area.

9. U2, IGND, is the return path for many of the discrete components and requires special mention:

a.Traces associated with IGND should be 20 mils wide.

b.U2's IGND should not be a large ground plane and should only occupy the space under U2. Beyond this

area, use trace s an d avoid getting clos e to the co mponents on the other side of the diode bridge.

c.C5, C6, C7 IGND return path should be direct.

10.The traces from R7 to FB1 and from R8 to FB2 should be well matched. This can b e a chieved by r outin g these

traces next to each other as much as possible. Ensure that these traces are not routed close to the traces

connected to C1 or C2.

11.Minimize all traces associated with Y1, C40, and C41.

12.Decoupling capacitors (0.22 µF and 0.1 µF capacitors connected to VDA, VDB, VDD) must be placed next to

those pins. Traces of these decoupling capacitors back to the Si24xx GND pin should be direct and short.

Figure 20. Reference Placement

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54 Rev. 1.41

Figure 21. Illustrated Layout Guidelines

4.4.1. ISOmodem Layout Check List

Ta ble 43 is a checklist that the designer can use during the layout process to ensure that all the recommendations

in this application note have been implemented. Additionally, Figure 21 provides an annotated diagram of all

relevant layout guidelines for the SI3054 CNR/AMR/ACR applications. See "10.4.2. Safety" on page 267 for

information about design for safety compliance.

Table 43. Layout Checklist

P # Layout Items Required

1 U1 and U2 are placed so that pins 9–16 of U1 are facing pins 1–8 of U2. C1 and C2

are placed directly between U1 and U2.

2Place U1, U2, C1, and C2 so that the recommended minimum creepage spacing for

the target application is implemented. R12 and R13 should be close to U1.

3C1 and C2 should be placed directly between U1 and U2. Short, direct traces should

be used to connect C1 and C2 to U1 and U2. These traces should not be longer than

two inches (measured between the system side pins and the DAA pins) and should be

minimized in length. Place C2 such that it s accomp anying tra ce to the C2B pin (p in 6)

on the Si3018 is not close to the trace from R7 to the

RNG1 pin on the Si3018 (pin 8).

If the system demands that the traces between U1 and U2 be between two and six

inches in length, then special trace layout techniques must be used, as shown in

Figure 22.

RING

TIP

3C 3E

3B 3A

3E3E

7B 7C 7C 7B7B

9C 9C

This is not a complete schematic. Only critical component placement and nets are drawn.

1Traces, pad sites and vias

enclosed in box are in the DAA

section, and must be separated

from all other circuits by 5 mm.

Note: Encircled references are described in the numbered paragraphs in Appendix A.

FB2

C26

RV1

R12*

R16

C50

1 2

U1 Si24HS

XTALI

XTALO

VDD3.3

GND

C1A 14

C1B 13

VDDA

VDD3.3 21

GND 20

VDDB 19

U2 Si3018

DCT

C1B

C2B

VREG

RNG1

DCT2 16

IGND 15

DCT3 14

QB 13

QE2 12

SC 11

VREG2 10

RNG2 9

C53

R15

C52

C27

FB1

C51

R13*

*Note: Do NOT use ferrite

beads in place of R12 and

R13.

AN93

Rev. 1.41 55

4Place R7 and R8 as close as possible to the RNG1 and RNG2 pins (pins 8 and 9),

ensuring a minimu m trace length from the RNG1 or RNG2 pin to the R7 or R8 resistor.

In order to sp ace the R7 component further from the trace from C2 to the C2B pin, it is

acceptable to orient it 90 degrees relative to the RNG1 pin (pin 8).

5The area of the loop from C50 to U1 pi n 4 and from C51 to pin 13 back to pin 12

(DGND) should be minimized. The return traces to U2 pin 12 (DGND) should be on

the component side.

6 The loop formed by XTALI, Y1, and XTALO should be minimized and routed on one

layer. The loop formed by Y1, C40, and C41 should be minimized and routed on one

layer.

7The digital ground plane is made as small as possible, and the ground plane has

rounded corners.

8Series resistors on clock signals are placed near source.

9Use a minimum of 15-mil-wide traces in DAA section, use a minimum of 20-mil-wide

traces for IGND.

10 C3 should be placed across the diode bridge, and the area of the loop formed from

Si3018 pin 11 through C3 to the diode bridge and back to Si3018 pin 15 should be

minimized.

11 FB1, FB2, and RV1 should be placed as close as possible to the RJ11.

12 C8 and C9 should be placed so that there is a minimal distance between the nodes

where they connect to digital ground.

13 Use at least a 20-mil-wide trace from RJ11 to FB1, FB2, RV1, C8, and C9.

14 The routing from Tip and Ring of the RJ11 to the ferrite beads should be well-

matched.

15 The traces from the RJ11 through R7 and R8 to U2 Pin 8 and Pin 9 should be well

matched. These traces may be up to 10 cm long.

16 The distance from Tip and Ring through EMC capacitors C8 and C9 to digital ground

must be short.

17 There should be no digital ground plane in the DAA Section.

18 Minimize the area of the lo op from U2 pin 7 and pin 10 to C5 and C6 and from those

components to U2 pin 15 (IGND).

19 R2 should be placed next to the ba se of Q5, and the trace from R2 to U2 pin16 sho uld

be less than 20 mm.

20 Place C4 close to U2 and connect C4 to U2 using a short, direct trace.

21 The area of the loop formed fro m U2 pin 13 to the base of Q4 and from U2 pin 12 to

the emitter of Q4 should be minimized.

22 The trace from C7 to U2 pin 15 should be short and direct.

Table 43. Layout Checklist (Continued)

P # Layout Items Required

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56 Rev. 1.41

Figure 22. Special Trace Layout Technique

23 The trace from C3 to the D1/D2 node should be short and direct.

24 Provide a minimum of 5 mm creepage (or use the cap acitor terminal plating spacing

as a guideline for small form factor applications) from any TNV component, pad or

trace, to any SELV component, pad or trace.

25 Minimize the area of the loop formed from U2 pin 4 to R9 to U2 pin 15.

26 Cathode marking for Z1.

27 Pin 1 marking for U1 and U2.

28 Space and mounting holes to accommodate for fire enclosure if necessary.

29 IGND does not extend under C3, D1, FB1, FB2, R15, R16, C8, C9, or RV1.

30 Size Q1, Q3, Q4, and Q5 collector pads to safely dissipate 0.5 W (see text).

31 Submit layout to Silicon Laboratories for review.

Table 43. Layout Checklist (Continued)

P # Layout Items Required

AN93

Rev. 1.41 57

4.4.2. Module Design and Application Considerations

Modem modules are more susceptible to radiated fields and ESD discharges than modems routed directly on the

motherboard because the module ground plane is discontinuous and elevated from the motherboard’s ground

plane. This separation also creates the possibility of loops that couple interfering signals to the modem. Moreover,

a poor motherboard layout can degrade the ESD and EMI performance of a well-designed module.

4.4.2.1. Module Design

Particular attention should be paid to power-supply bypassing and reset-line filtering when designing a modem

module. Trace routing is normally very short on modules since they are generally designed to be as small as

possible. Care should be taken to use ground and power planes in the low- vo ltage circuitry whenever possible and

to minimize the number of vias in the ground and power traces. Ground and power should each be connected to

the motherboard through only one pin so as not to create loops. Bypassing and filtering components should be

placed as close to the modem chip as possible with the shortest possible traces to a solid ground. It is

recommended that a pi filter be placed in series with the module VCC pin with a filter such as the one shown in

Figure 23 on the reset line. This filter also provides a proper power-on reset to the modem. Careful module design

is critical since the module designer often has little control over the motherboard design and the environment in

which the module will be used.

4.4.2.2. Motherboard Design

Motherboard design is critical to proper modem module performance and immunity to EMI and ESD events. First

and foremost, good design and layout practices must be followed. Use ground and power planes whenever

possible. Keep all traces short and direct. Use ground fill on the top and bottom layers. Use adequate power supply

bypassing, and use special precautions with the power and reset lines to the modem module. Bypass VCC right at

the modem module connector. Be sure the modem module is connected to VCC through a single pin. Likewise, be

sure ground is connected to the modem mo dule through one pin connected to the motherboard ground plane . The

modem reset line is sensitive and must be kept very short and routed well away from any circuitry or components

that could be subjected to an ESD event. Finally, mount the modem module as close to the motherboard as

possible. Avoid high-profile sockets that increase the separation between the modem module and the

motherboard.

Figure 23. Modem Module VCC and RESET Filter

RESET

Motherboard

Connector

1.0 F 10 k

2.2 F

To RESET

(Si24xx Pin 12)

GND

To Modem Chip VCC

(Si24xx Pins 5, 21)

GND

VCC

Murata BLM 18A

G601 SN1

0.1 F 0.1 F 1.0 F

AN93

58 Rev. 1.41

4.5. Analog Output

The call progress tone provided by AOUT and discussed in this section comes from a PWM output pin on the

ISOmodem. AOUT is a 50 % du ty cyc le, 3 2 kHz sq uare w ave, pulse-width modulated (PWM) by voice band audio,

such as call progress tones.

The PWM signal should be processed by a high-pass filter (R2, R3, R4, C2,C3 and C4), and, with the aid of a

bridge mode amplifier, provides low-cost 100 mW to 250 mW power with a 3 to 5 V supply. See the circuit in

Figure 24. A slightly more expensive amplifier (LM4862) is available and, while still pin-compatible, provides twice

as much power.

Figure 24. PWM Audio Processing and Amplifying Circuit

4.5.1. Interaction between the AOUT Cir cuit and the Required Modem Reset Time

When modifying the circuit shown in Figure 24, it is important to examine the reset timing and know that when

external reset is applied to the modem, the AOUT pin still has time to rise to VCC due to the pullup installed on it.

One has to assume that the modem has been operating prior to reset and has put AOUT into a PWM state that is

100% low.

This is important because the AOUT pin, which is shared with INT in some packages, is read by the strapping

option logic in the modem at the end of the reset time to set the operation al mo de as shown in "2. 1.3. Res et-Strap

Options for 16-Pin SOIC Package" and "2.1.4. Reset-Strap Options for 24-Pin TSSOP Package" on page 13 and

"2.1.5. Reset Strapping Options for QFN Parts" on page 15.

The value of the capacitors and resistors in the above circuit thus has an effect on the minimum required

ISOmodem reset time.

AN93

Rev. 1.41 59

4.5.2. Audio Quality

The mulipole filter illustrated in this diagram is designed to shape the response for a pleasant sound and remove

interference, but note that, when PWM is demodulated in this way, it carries all the audio spectrum noise that is

present in the power supply of the modem minus 6 dB. This requires VCC to be as clean as one wants the call

progress aud io to be. An alternative is for the AOUT signal to be buffered to a clean supply domain using a logic

gate or transistor buffer.

The 3-pole low-p ass filter, with a 3 dB point at approximate ly 2 kHz, filters the 32 kHz square wave from AOUT and

allows only audio signals below 2 kHz to pass. See Figure 25 below. The amplifier provides differential speaker

drive, eliminating the need for a large coupling capacitor. Some additional design work and optimization must be

done to select the optimum gain and frequency response of this circuit, depending on speaker efficiency, final

product enclosure, and performance requirements. A two- or even one-pole filter may be adequate in some

applications.

Keep this audio circuitry well away from digital signals and use generous ground fill in the PCB layout.

Figure 25. Audio Filter Response

4.5.3. Power Dissipation in the Si3018 DAA

The power dissipated in the DAA and its support circuitry is dependent on the operational state. Table 44 shows

how power is distributed among the components in the BOM circuit. Two examples are given: one is the modem in

the default FCC termination when the loop current is at its maximum, 120 mA. The other shows the power when

the modem is attached to a TBR21 termination at the maximum loop current.

Table 44. Power Dissipation

Device FCC Termination

Loop Current = 120 mA TBR21 Mode

Loop Current = 56 mA

R1 14 mW 407 mW

R3 17 mW 244 mW

R4 26 mW 432 mW

R10 7 mW 203 mW

R11 468 mW 1 mW

Q1 110 mW

Q2 2 mW

Q3 70 mW 161 mW



AN93

60 Rev. 1.41

Q4 176 mW 172 mW

Q5 166 mW 130 mW

D1,D2 120m A x 0.8 V

96 mW each 56 mA x 0.75 V

42 mW each

Other 257 mW (Si3018) 243 mW (Q1+Q2+Si3018)

Total 1.498 W 2.077 W

Table 44. Power Dissipation (Continued)

AN93

Rev. 1.41 61

5. Modem Reference Guide

This section provides information about the architecture of the m ode m, its functional blocks, its registers, and their

interactions. The AT command set is presented, and options are explained. The accessible memory locations (S

registers and U registers) are described. Instructions for writing to and reading from them are discussed along with

any limitations or special considerations. A large number of configuration and programming examples are offered

as illustrations of actual testable applications. These examples can be used alone or in combination to create the

desired modem operation. The use of S registers and U registers to control the operation, features, and

configuration of the modem is documented.

The Si24xx ISOmodem chipset family is controller-based. No modem driver is required to run on the system

processor. This makes the Si24xx ISOmodem family ideal for embedded systems because a wide variety of

processors an d ope ra tin g sys tem s ca n int er fa ce wit h the ISOmodem through a simple UART driver.

The modems in this family operate at maximum connect rates of 48 kbps upstream/V.92 (Si2494/93), 56 kbps

downstream/V.90 (Si2457), 33.6 kbps/V.34 (Si2439/34), 14.4 kbps/V.32b (Si2415), and 2400 bps/ V.22b (Si2404)

with support for all st an dard ITU-T fallba ck mode s. These ch ipset s can be programmed to comply with FCC, JATE,

ETSI ES 203 021 and other country-specific PTT requirements. They also support V.42 and MNP2–4 error

correction and V.42b and MNP5 compression. “Fast connect” and “ transparent HDL C” modes are also supported.

The basic ISOmodem functional blocks are shown in Figure 1 on page 1. The ISOmodem includes a controller,

data pump (DSP), ROM, RAM, an oscillator, phase-locked loop (PLL), timer, UART interface, a parallel interface

option, an SPI interface option, and a DAA interface. An optional voice mo de is su ppo rted th rou gh a n SSI inter fac e

and an external Si300 0 voice codec. The modem sof tware is perm anently stored in the on-chip ROM. Only modem

setup information (other than defaults) and other software updates need to be stored on the host or optional

external EEPROM and downloaded to the on-chip RAM during initialization. There is no nonvolatile on-chip

memory other than program ROM.

The following memory notation conventions are followed in this document:

Single-variable U registers are ide ntified in this document as the register type (i.e., U) followed by the register’s

hexadecimal address and finally the register identifier in parenthesis, e.g. U4A (RGFD). Once the full register

reference is made, continu ing discussion re fers to the register nam e to simplify the text. Th e address and value

of a single variable U register are always read from or written to the ISOmodem in hexade cim a l.

Bit-mapped U registers are identified in this document at the top level as the register type (i.e., U) followed by

the register’s hexadecimal address and finally the register identifier in parenthesis, e.g. U67 (ITC1). Once the

full register reference is made, continuing discussion of the register at the top level refers to the register name

to simplify the text. The address and value of a bit-mapped U register is always read from or written to the

ISOmodem in hexadecimal.

Bits within bit-mapped registers are identified in this document as the register type (i.e., U) followed by the

register’s hexadecimal address, the bi t or bit ran ge wi thin the r egister in brackets, and finally the bit or bit r ange

identifier in parenthesis. Example: U67 [6] (OHS) or U67 [3:2] (] (DCT). Once the full register reference is made,

continuing discussion of the bit s or bit rang e r efers to the bit or bit ra nge na me to simp lify the te xt. The bit or bit

range inside the bracket represents the actual bit or bit range within the registe r. The value of a bit or b it range

is presented in binar y for clarity. However , the addr ess and value of a bi t-mapped U register is always read from

or written to the ISOmodem in hexadecimal.

ISOmodem S registers are identified with a decimal address (e.g., S38), and the numb er stored in a n S re gister

is also a decimal value.

5.1. Controller

The controller provides several vital functions, including AT command parsing, DAA control, connect sequence

control, DCE (data communication equipment) protocol control, intrusion detection, parallel phone off-hook

detection, escape control, Caller ID control and formatting, ring detection, DTMF (dual tone multi-frequency)

control, call progress monitoring, error correction, and data compression. The controller also writes to the control

registers that configure the modem. Virtually all interaction between the host and the modem is done via the

controller. The controller us es AT (ATtention) command s, S registers, a nd U registers to configure and control the

modem.

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62 Rev. 1.41

5.2. DSP

The DSP (data pump) is primarily responsible for modulation, demodulation, equalization, and echo cancellation.

Because the ISOmodem is controller-based, all interaction with the DSP is via the controller through AT

commands, S registers, and/or U registers.

5.3. Memory

The user-acces sible memory in th e ISOmodem includes th e S registers, accessed via the ATSn command, and the

U registers, accessed via the AT:Rhh and AT:Uhh commands. These memory locations allow the modem to be

configured for a wide variety of functions and applications and for global operation.

5.4. AT Command Set

AT command s begin with the lette rs AT, end with a carriage return, and ar e case-ins ensitive. However, case cann ot

be mixed in a single command. The only exception to this format is the A/ command. This command is neither

preceded b y AT nor f ollo we d by a car ria g e r e tur n bu t re -e xe cu tes th e pr ev iou s command im me d iat ely when the “/ ”

character is typed. Generally, AT commands can be divided into two groups: control commands and configuration

commands. Control commands, such as ATD, cause the modem to perform an action (in this case, dialing). The

value of this type of command is changed at a particular time to perform a particular action. For example, the

command ATDT1234<CR> causes the modem to go off-hook and dial the number 1234 via DTMF. No change is

made to the modem settings during the execution of an action command. Configuration commands change

modem characteristics until they are modified or reversed by a subsequent configuration command or the modem

is reset. Modem configuration status can be determined with the use of ATY$, ATSn?, or AT:Rhh commands where

Y is a group of AT command arguments, n is an S-registe r number (decimal), and hh is the hexadecimal address of

a U register.

The AT commands for reading configuration status are listed in Table 45. Each command is followed by a carriage

return.

The examples in Table 46 assume the modem is reset to its default condition. Each command is followed by a

carriage retu rn .

Table 45. Configuration Status

Command Action

ATY$ settings Displa ys status of a grou p of

settings.

AT$ Basic AT command settings.

AT&$ AT& command settings.

AT%$ AT% command settings.

AT\$ AT\ command settings.

ATSn? Displays contents of S-register n

ATS$ Displays contents of all S registers

AT:Rhh Displays contents of U-register hh

AT:R Displays the current contents of all U registers.

AT+VCID? Displays Caller ID setting.

AN93

Rev. 1.41 63

The modem has a 48-character buffer, which makes it possible to enter multiple AT commands on a single line.

The multiple commands can be separated with spaces or linefeed characters to improve read ability. AT, space and

linefeed characters are not loaded into the buffer and are not included in the 48-character count. The command

line must end with carriage return for the modem to begin executing it. The modem ignores command lines longer

than 48 characters and reports ERROR. Table 47 shows examples of multiple AT commands on a single line.

When concatenating commands on the same line, the following must also be taken in to account:

A semicolon is used to append to :U or :R commands. For example, AT:U42,0022;:R43;S6=4.

The command +IPR cannot be on the same line as a :U or :R command.

The commands *Y, :W, :P, +MS and +MR cannot be appended to. They must be the last command in a string.

The command AT+GCI=9 must be on a line of its own.

Consecutive U registers can be written in a single command as AT:Uhh,xxxx,yyyy,zzzz where hh is the first U-

Uhh+1, and zzzz to Uhh+2. Additional consecutive values may be written up to the 48 character limit.

Table 46. Command Examples

Command Result Comment

AT$ E = 001 Configuration status of basic

AT command s.

M=000

Q=000

V=001

X=004

Y=000

AT&$ &D = 001

&G = 017 Configuration of &AT

commands.

&H = 000

(Si2457)

&P = 000

ATS2? 043 S-register 2 value—Escape

code charac ter (+).

AT:R2C 00A0 Value stored in register U2C.

Table 47. Multiple AT Commands on a Single Line

Command Result

ATS0=4M1X1<CR> The modem auto-answers on the

fourth ring. The speaker is on during

dial and handshake only. Blind dial-

ing is enabled.

AT S0=4 M1 X1 <CR> Same as above (spaces do not mat-

ter).

ATS0=4<CR> Same as above.

ATM1<CR>

ATX1<CR>

AN93

64 Rev. 1.41

Caution: Some U-register addresses are reserved for internal use and hidden from the user. Consequently, there

are gaps in the addresses of available U registers. Writing to reserved registers can cause unpredictable results.

Care must therefore be taken not to write to reserved or undefined register locations. This is especially likely when

writing to consecutive U-regi ster addresses: all addr esses covered by a co nscutive write operation must be defined

and allowed to the user.

The AT command execution time is as long as 300 ms. The host must wait for a response after each command

(e.g., OK) before issuing additional commands. The reset recovery time (the time between a hardware reset or the

carriage return of an ATZ command and the time the next AT command can be executed) must also be respected,

as described in "2.1.1. Reset Seq uence" on page 11.

It is recommended that the host delay a minimum of 100 ms before sending any AT commands after a modem

state change. A modem state change is indicated by the modem responses listed below; thus, the host should

delay the recommended minimum after any of these r esponses:

NO CARRIER

BUSY

LINE IN USE

NO DIALTONE

In addition, the host can initiate a modem state change with the AT commands listed below. The host should delay

the recommended minimum after the OK response from any of these commands:

ATH0

AT+FCLASS (if changing classes)

AT&T0

AT+VLS

Character Abort

Characters must not be sent between the ATDT command and the protocol message. During this time, the modem

is in a transition between command and data modes. Any characters sent during this time will cause the

connection attempt to fail; this is known as a character abort.

Blind dialing (dialing without waiting for dial tone) is enabled by ATX0, ATX1, and ATX3. Whether or not blind

dialing is enabled , use of the W dial modifier causes the modem to look for a dial tone before dialing the number

string after the W. For example, an AT command string, ATX1 DT 9, W123456<CR>, causes the modem to dial 9

immediately without detecting a dial tone but does not dial 123456 until a dial tone is detected. AT commands and

result codes are listed in Tables 49–54. The default settings are shown in bold.

Table 48. Consecutive U-Register Writes on a Single Line

Command Result

AT:U00,0078,67EF,C4FA 0x0078 written to U00

0x67EF written to U01

0xC4FA wri tten to U02

Table 49. Basic AT Command Set

Command Action

Display Basic AT command mode settings (see text for details).

Answer incoming call.

Re-execute last command (executes immediately, not preceded by AT

or followed by <CR>)

AN93

Rev. 1.41 65

Dial

The dial command, which may be followed by one or more dial com-

mand modifiers, dials a phone number:

Modifier

! or &

, or <

;

En Local DTE echo.

E0 Disable.

E1 Enable.

Hn Hook-switch.

H0 Go on-hook (h an g up mo de m).

H1 Go off-hook.

In Identification and checksum.

I0 Display Si24xx revision code.

A = Revision A.

B = Revision B, etc.

I1 Display Si24xx firmware revision code (numeric).

I3 Display line-side revision code.

18 (10)C = Si3018/10 Revision C.

Display the ISOmodem model number.

2404 = Si2404

2415 = Si2415

2434 = Si2434

2457 = Si2457

2493 = Si2493

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

66 Rev. 1.41

Diagnostic Results 1.

Format

RX <rx_rate>,TX <tx_rate>

PROTOCOL: <protocol>

LOCAL NAK <rre>

REMOTE NAK <rte>

RETRN/RR <rn>

DISC REASON <dr>

Diagnostic Results 2.

Format

RX LEVEL <rx_level>

TX LEVEL <tx_level>

EFFECTIVE S/N <esn>

RESIDUAL ECHO <re>

Ln Speaker Volume

L1 Low

L2 Medium

L3 High

L4 Very High

Mn Speaker operation (via AOUT).

M0 Speaker is always off.

M1 Speaker is on while dialing and handshaking; off in data mode.

M2 Speaker is always on.

M3 Speaker is off while dialing; on during handshaking and retraining.

On Return to data mode from command mode.

O0 Return to data mode.

O1 Return to data mode and perform a full retrain (at any speed except

300 bps).

O2 Return to data mode and perform rate ren eg o tia tion .

Qn Response mode.

Q0 Enable result codes (See Table 54.)

Q1 Disable result codes (enable quiet mode)

RInitiate V.23 Reversal (U53 bit 15 must be set.)

Sn S-register operations (see Table 56)

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

Rev. 1.41 67

S$ List contents of all S registers.

Sn? Display contents of S-register n.

Sn=x Set S-register n to value x (n and x are decimal values).

Vn Result code type (See Table 54)

V0 Numeric result codes.

V1 Verbal result codes.

Xn Call Progress Monitor (CPM)—This command controls which CPM sig-

nals are monito re d an d re po r te d to th e ho st fro m the ISOm od e m (Se e

Table 54).

X0 Basic results; disabl e CPM—Blind dial (does not wait for dial tone).

CONNECT message does not include speed.

X1 Extended results; disable CPM—Blind dial. CONNECT message

includes speed.

X2 Extended results and detect dial tone only. X1 with dial tone detection.

X3 Extended results and detect busy only. X1 with busy tone detection.

X4 Extended results, full CPM. X1 with dial and busy tone detection.

X5 Extended results—Full CPM enabled including ri ngback detection. X4

with ring back detection.

Yn Long spa ce disco nnect—M odem han gs up after 1.5 seconds or more of

continuous space while on-line.

*Y0 Disable data memo ry acce ss by dis allo win g :W an d :Q Com man ds.

*Y1 Enable continuous DTMF tone (ATxY1D9 sends continuous “9” tone).

*Y2 Enable continuous answer tone . To enable continuous answer to ne and

answer, use ATxY2A.

*Y254 Enables Data Memory Access, i.e. allows :W and :Q commands.

ZHard reset—This command is function ally- e quiva l en t to pulsin g th e

RESET pin low.

:E Read from serial EEPROM. The format is AT:Ehhhh, where hhhh is the

EEPROM address in hexadecimal.

Interrupt read—This command causes the ISOmo dem to report the

lower eight bit s of the inter rupt re gi ster U70 (IO0). The CID, OCD, PPD,

and RI bits of th is register are cleared, and the INT pin (HIR1 INT flag in

parallel or SPI mode) is deactivated on this read.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

68 Rev. 1.41

:LPhh

Read Quick Connect data.

hh is a hexadecimal value . Data are read as follows:

:LP0d1...d8

:LP8d9...d16

:LP10 d17...d24

:LP18 d25...d32

:M Write to serial EEPROM. The format is AT:Mhhhh,xxxx, where hhhh is

the EEPROM address in hexadecimal and xxxx is the EEPROM data in

hexadecimal.

Program RAM write: this command is used to upload firmwar e supplied

by Silicon Labs to the ISOmodem. The format for this command is

AT:Phhhh,xxxx,yyyy,.... where hhhh is the first address in hexadecimal,

and xxxx,yyyy,.... is data in hexadecimal. Only one :P command is

allowed per AT command line. No other command can be concatenated

in the :P command line. This command is only for use with special files

provided by Silicon Laboratories. Do not attempt to use this command

for any other purpose. Use &T6 to display checksum for patch verifica-

tion.

:Q :Qaaaa reads hexadecimal address aaaa. Returns hexadecimal data

value dddd. Only one comma nd per line.

U-register read—This command reads U-register values in hexadeci-

mal.

The format is AT:Rhh, where

hh = A particular U-register address in hexadecimal.

The AT:R command displays all U-register values.

Only one :R command is allowed per AT command line.

U-register write—This command writes to the 16-bit U registers. The for-

mat is AT:Uhh,xxxx,yyyy,zzzz,..., where

hh = user-access address in hexadecimal.

xxxx = data in hexadecimal to be written to location hh.

yyyy = data in hexadecimal to be written to location (hh + 1).

zzzz = data in hexadecimal to be written to location (hh + 2).

etc.

Only one :U command is allowed per AT command line.

:W :Waaaa,dddd writes hexadecimal data value dddd to hexadecim al data

address aaaa. Only one command per line.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

Rev. 1.41 69

*Y[sequence]

Special Access Mode—This command enab les special modes a nd dat a

memory access.

[sequence] Description

254:Waaaa,dddd Write hexadecimal data value dddd to hexadeci-

mal data address

aaaa. Only one 254:W command per line.

254:Qaaaa Read hexadecimal address aaaa. Returns

hexadecimal data value

dddd. Only one 254:Q command per line.

2 Enable continuous answer tone for the ATA

command. Use ATZ to clear this mode. For

example, the single-line, multiple command is

AT*Y2A.

1 Enable continuous DT MF tone for first digit used

in the ATD comman d. Use ATZ to clear this

mode. For example, the single-line, multiple

command for a continuo us DTMF “1” digit would

be AT*Y1D1.

0 Exit from 254:W or 254:Q access mode. Must

reside on a separate line and must be the final

sequence be sent after the final 254:W or 254:Q

command.

+DR=X

Data compression reporting.

X Mode

0 Disabled

1 Enabled

If enabled, the intermediate result code is transmitted at the point after

error control negotiation. The format of this result code is as follows:

Result code Mode

+DR:NONE Data compression is not in use

+DR:V42B Rec. V.42bis is in use in both directions

+DR:V42B RD Rec. V.42bis is in use in receive direction only

+DR:V42B TD Rec. V.42bis is in use in transmit directions only

+DR:V44 Rec. V.44 is in use in both directions

+DR:V44 RD Rec. V.44 is in use in re ce ive dir ec tio n on ly

+DR:V44 TD Rec. V.44 is in use in transmit directions only

+DS=

A,B,C,D

Controls V.42bis data compression function.

A Direction

0 No compression (V.42bis P0 = 0)

1 Transmit only

2 Receive only

3 Both Directions (V.42bis P0 = 11)

B Compression negotiation

0 Do not disconnect if Rec. V.42 is not negotiated.

1 Disconnect is Rec. V.42 is not negotiated.

C Max_dict 512 to 65535

D Max_string 6 to 250

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

70 Rev. 1.41

+DS44 =

A,B,C,D,E,F,G,H,I

Controls V.44 data compression function*

A Direction

0 No compression (V.42bis P0 = 0)

1 Transmit only

2 Receive only

3 Both Directions (V.42bis P0 = 11)

B Compression negotiation

0 Do not disconnect if Rec. V.42 is not negotiated

1 Disconnect is Rec. V.42 is not negotiated

C Capability

0 Stream method

1 Packet method

2 Multi-packet method

D Max_codewords_tx 256 to 65536

E Max_codewords_ rx 256 to 65536

F Max_string_tx 32 to 255

G Max_string_rx 32 to 255

H Max_history_tx  512

I Max_history_rx  512

*Note: Si2493 only

+ES = A, B, C

Enable synchronous access mode

A – specifies the mode of operation when initiating a modem con-

nection

D=Disable synchronous access mode

6 = Enable synchronous access mode when connection is com-

pleted and data state is entered.

B – This parameter should not be used.

C – Specifies the mode of operation when answer a modem con-

nection

D=Disable synchronous access mode

8 = Enable synchronous access mode when connection is com-

pleted and data state is entered.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

Rev. 1.41 71

+ESA =

A,B,C,D,E,F,G

Synchronous access mode control options

A – Specif ies action taken if an underrun condition occurs during

transparent sub-mode

0=Modem transmits 8-bit SYN sequences (see +ESA[G]) on

idle.

B – Specifies action taken if an underrun condition occurs after a

flag during framed sub-mode

0=Modem transmits 8-bit HDLC flags on idle.

C – Specifies action taken if an underrun or overrun condition occurs

after a non-flag during framed sub-mode

0=Modem transmits abort on underrun in middle of frame.

1 = Modem transmits flag on un der run in mi ddl e of fram e and noti-

fies host of underrun or overrun.

D – Specifies V.34 half duplex operation. This parameter should not be

used.

E – Specifies CRC polynomial used while in framed sub-mode

0=CRC generation checking disable

1 = 16-bit CRC generation and checking is performed by the

modem

F – Specifies NRZI encoding and decoding

0=NRZI encoding and decoding disabled

G – Defines 8-bit SYN

255 = Fixed at 255 (marks)

+FCLASS = X

Class 1 Mode Enable.

XMode

0Off

1 Enables support for V.29 Fast Connect mode.

8 Enables voice mo d e.

256 SMS mode

+FRM = X

Class 1 Receive Carrier.

XMode

2 Detect V.21 (980 Hz) tone for longer than 100 ms, then send

answer tone

(2100/2225 Hz) for 200 ms.

95 V.29 short synchronous.

96 V.29 full synchronous.

200 Returns to data mode prepared to receive an SMS message.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

72 Rev. 1.41

+FTM = X

Class 1 Transmit Carrier.

XMode

2 Transmit V.21 (980 Hz) tone and detect (2100/2225 Hz). Stop

transmit 980 Hz when (2100/2225 Hz is detected.

53 Same as &T4, but transmit V.29 7200 bps. Data pattern set by

S40 register. AT + FCLASS = 0 must be sent to restore the

ISOmodem to normal operation after test.

54 Same as &T4, but transmit V.29 9600 bps. Data pattern set by

S40 register. AT + FCLASS = 0 must be sent to restore the

ISOmodem to normal operation after test.

95 V.29 short synchronous.

96 V.29 full synchronous.

201 Returns to data mode prepared to transmit an SMS protocol 1

message.

202 Returns to data mode prepared to transmit an SMS protocol 2

message.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

Rev. 1.41 73

+GCI = X

Country settings: Automatically configure all registers for a particular

country.

X Country

9 Australia

AAustria

F Belgium

16 Brazil

1B Bulgaria

20 Canada

26 China

27 Columbia

2E Czech Republic

31 Denmark

35 Ecuador

3C Finland

3D France

42 Germany

46 Greece

50 Hong Kong

51 Hungary

53 India

57 Ireland

58 Israel

59 Italy

0 Japan

61 Sout h Kor e a

69 Luxembourg

6C Malaysia

73 Mexico

7B Netherlands

7E New Zealand

82 Norway

87 Paraguay

89 Philippines

8A Poland

8B Portugal

B8 Russia

9C Singapore

9F South Afr i ca

A0 Spain

A5 Sweden

A6 Switzerland

FE Taiwan

B4 United Kingdom

B5 United States (d ef au lt )

Note: U registers are configured to Silicon Laboratories’ recommended values.

Changes may be made by writing individual registers after sending the

AT+GCI command. The +GCI command resets U registers through U86

and S6 (in Japan) to default values before setting country-specific values.

Refer to the chart and setup tables beginning with "6.2.2.1. Country

Initialization Table" on page 146.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

74 Rev. 1.41

+GCI? List current country code setting (response is: + GCI:<setting>)

+GCI = ? List all possible country code settings.

+IFC Options

+IFC = A

+IFC = A,B

Specifies the flow control to be implemented.

A Specifies the flow control method used by the host to control data

from the modem

0None

2 Hardware flow control (RTS)

B Specifies the flow control method used by the modem to control

data from the host

0 None

2 Hardware flow control (CTS).

+IPR = <rate>

Fixed DTE Rate.

<rate> Description

0 Automatically detect the baud rate.

[BPS] The decimal value of the rate in bits per second.

Note that the <rate> parameter represents the DTE rate in bps and may

be set to any of the following values: 300, 600, 1200, 2400, 4800, 7200 ,

9600, 12000, 14400, 19200, 38400, 57600, 115200, 230400, 245760,

and 307200.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

Rev. 1.41 75

+ITF = <high>,

<low>,

<report_period>

Transmit Flow Control Thresholds.

<high> Threshold above which the modem will generate a flow

off signal. Th e p arameter's un it is a byte. The valid rang e is 0-1023. The

default is 895.

<low> Threshold below which the modem will generate a flow

on signal. The p aramete r's un it is a byte. T he valid rang e is 0-10 23. The

default is 128.

<report_period>The poll interval for the <bnum><octnum0><oct-

num1> report. The valid range is 0–300 in 10 ms units. The default

value of 0 indicates that r eporting is disabled.

Prior to a V.34 call, the modem dynamically splits the TX buffer to

accommodate the required DLE-shielding of in-band data. This resizing

affect s the Transmit Flow Control Threshold settings. If the <on> or <off>

threshold setting is greater than 512, it is reduced by 512 to accommo-

date the buffer splitting. For example, the de fault <high> setting of 895

would be reduced to 383 (895 – 512 = 383) prior to a V.34 call. See

Figure 3, “Transmit Data Buffers,” on page 22 and Figure 4, “Receive

Data Buffers,” on page 22 for the sizing and operation of TX and RX

elastic buffers.

Notes:

1. The <low> parameter must be set greater than the data frame size plus 2

(to accommodate the terminating < DLE><ETX> characters). Therefore,

the default <low> setting of 128 is appropriate for a frame size of 64

octets but not for a frame size of 256 octets. For this case, the <low>

setting must be greater than 258.

2. The optimum <high> parameter setting depends on the driver latency;

specifically, how many bytes are transmitted to the modem after the

modem's CTS signal becomes deasserted. If little or no data are

transmitted after CTS becomes deasserted, the <high> parameter can

be set to a value close to the TX buffer size for maximum buffer utilization

(e.g. a setting of 500 for V.34 applications ). If significant data are

transmitted after CTS becomes deasserted, the <high> parameter must

be chosen to pr ecl u d e TX bu ffer overrun.

+MR=X

Modulation reporting contro l.

X Mode

0 Disabled

1 Enabled

If enabled, the intermediate result co de is transmitted a t the poin t during

connect negotiation. The format of this result code is as follows:

+MCR: <carrier> e.g. +MCR: V32B

+MRR: <rate> e.g. +MRR: 14400

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

76 Rev. 1.41

+MS Options

+MS = A

+MS = A,B

+MS = A,B,C

+MS = A,B,C,D

+MS = A,B,C,D,E

Modulation Selection.

A Preferred modem carrier

V21 ITU-T V.21

V22 ITU-T V.22

V22B ITU-T V.22bis (default for Si2404)

V32 ITU-T V.32

V32B ITU-T V.32bis (default for Si2415)

V34 ITU-T V.34 (default for Si2434)

V90 ITU-T V.90 (default for Si2457)

V92 ITU-T V.92 (default for Si2493)

B Automatic modulation negotiation

0 Disabled

1 Enabled (default)

C Min Tx rate. Specifies minimum transmission rate.

0 Not configurable; always set to 0.

D Max Tx rate. Specifies highest transmission rate. If not speci-

fied, it is determined by the carrier and automode settings.

V21 300 V32 9600 V90 33600

V22 1200 V32B 14400 V92 48000

V22B 2400 V34 33600

E Min Rx rate. Specifies minimum receive rate.

0 Not configurable; always set to 0.

F Max Rx rate. Specifies maximum receive rate. If not specified

(set to 0), it is determined by the carrier and automode set-

tings.

V21 300 V32 9600 V90 54666

V22 1200 V32B 14400 V92 54666

V22B 2400 V34 33600

+PCW = X

Controls the action to be taken upon detection of ca ll waiting.

X Mode

0 Toggle RI and collect type II Caller ID if enabled by +VCID.

1 Hang up.

2 Ignore call waiting.

+PIG=X

Controls the use of PCM upstream in a V.92 DCE.

X Mode

0 Enable PCM upstream.

1 Disable PCM upstream.

+PMH=X

Controls the modem-on-hold procedures.

X Mode

0 Enables V.92 MOH.

1 Disables V.92 MOH.

+PMHF=X V.92 MOH hook flash. This command causes the DCE to go on-hook

and then return off-hook. If this command is initiated and the modem is

not On Hold, Error is returned.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

Rev. 1.41 77

+PMHR=X

Initiate MOH. Requests the DCE to initiate or to confirm a MOH proce-

dure. Valid only if MOH is enabled.

X Mode

0 V.92 MOH request denied or not available.

1 MOH with 10 s timeout gran ted.

2 MOH with 20 s timeout gran ted.

3 MOH with 30 s timeout gran ted.

4 MOH with 40 s timeout gran ted.

5 MOH with 1 min. timeout granted.

6 MOH with 2 min. timeout granted.

7 MOH with 3 min. timeout granted.

8 MOH with 4 min. timeout granted.

9 MOH with 6 min. timeout granted.

10 MOH with 8 min. timeout granted.

11 MOH with 12 min. timeout granted.

12 MOH with 16 min. timeout granted.

13 MOH with indefinite timeout granted.

14 MOH request denied. Future request will also be denied.

+PMHT=X

Controls access to MOH request and sets the timeout value.

X Mode

0 De ny V.92 MOH request.

1 Grant MOH with 10 s timeout.

2 Grant MOH with 20 s timeout.

3 Grant MOH with 30 s timeout.

4 Grant MOH with 40 s timeout.

5 Grant MOH with 1 min. timeout.

6 Grant MOH with 2 min. timeout.

7 Grant MOH with 3 min. timeout.

8 Grant MOH with 4 min. timeout.

9 Grant MOH with 6 min. timeout.

10 Grant MOH with 8 min. timeout.

11 Grant MOH with 12 min. timeout.

12 Grant MOH with 16 min. timeout.

13 Grant MOH with indefinite timeout.

+PQC=X

V.92 Phase 1 and Phase 2 Control.

XMode

0 Enable Short Phase 1 and Short Phase 2.

1 En able Sho r t Pha se 1.

2 En able Sho r t Pha se 2.

3 Disa bl e Sho rt Phas e 1 and Sho rt Phas e 2.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

78 Rev. 1.41

+PSS=X

Selection of full or short startup procedures.

X Mode

0 The DCEs decide to use short startup procedures.

1 Forces the use of short startup procedur es on next and subse-

quent connections.

2 Forces the use of full startup procedures on next and subsequent

connections.

+VCDT = n

Caller ID Type.

nMode

0=After ring only

1=Always on

2 = UK with wetting pulse

3=Japan

+VCID = n

Caller ID Enable.

nMode

0=Off

1 = Formatted Caller ID enabled.

2 = Raw data Caller ID enabled.

+VCIDR? Type II Caller ID information—”+VCIDR:” will be followed by raw Caller

ID information including checksum. NO DATA will be displayed if no

Type II data are available.

+VDR = n

Distinctive Ring.

n Mode

0,x Disable distinctive ring; x = don't care

1,0 Enable distinctive ring. The ISOmodem will report

DROF and DRON result codes only. DROF and DRON

are reported in 100 ms units.

1,m Enable distinctive ring. The ISOmodem will report

DROF and DRON result codes as well as well as a

RING result code m/10 seconds af ter th e falling edge of

a ring pulse. DROF and DRON are reported in 100 ms

units.

+VGR

Receive Gain Selection.

The <gain> parameter has a range of 112-134 with 128 being the nomi-

nal value. This represen ts a range of -48 dB to 18 dB. The d efault is 128

(0 dB). This command is used to control the receive gain at the DTE

from either the Si3000 Codec or the DAA. The purpose is to adjust the

DTE receive gain for the TAM voice stream during idle state.

+VGT

Transmit Gain Selection.

The <gain> parameter has a range of 112-134 with 128 being the nomi-

nal value. This represents a range of -48 to 18 dB. The default is 128 (0

dB). This command is used to control the transmit gain at the DTE to

either the Si3000 Codec or the DAA. The purpose is to adjust the DTE

transmit gain for the TAM voice stream during idle state.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

Rev. 1.41 79

+VIP Load Voice Factory Defaults.

+VIT DTE/DCE Inactivity Timer.

The <timer> parameter has a range of 0–255 with units of seconds.

The default is 0 (disable).

+VLS = n Analog Source / Destination Select.

n Description

0 ISOmodem on-hook. AOUT disabled. Tone detectors

disabled. Si3000 sample pass-through to DAA is inac-

tive.

1 ISOmodem off-hook. AOUT disabled. Tone detec tor s dis-

abled.

4 ISOmodem on-hook. AOUT connected to ISOmodem tone

generators. Tone detectors disabled.

5 ISOmodem off-hook. AOUT co nn ec te d to PST N. Tone

detectors enabled.

15 ISOmodem goes off-hook, begins V.253 tone event report-

ing and Si3000 to DAA sample pass-through becomes

active. Dial tone can be heard on handset.

20 ISOmodem on-hook. AOUT disabled. Tone detectors

enabled.

21 ISOmodem on-hook. AOUT connected to ISOmodem tone

generators. Tone detectors enabled.

+VNH = <hook> Automatic Hangup Control.

<hook> Hook control descri ption

0 The ISOmodem retains automatic hangups as is

normal in the other modes (such as hanging up the

phone when the ISOmodem does not detect a data

carrier with a given time interval).

1 The ISOmodem shall disable automatic hangups in the

other non-voice modes.

2 The ISOmodem shall disable all hang-ups in other non-

voice modes. The ISOmodem shall only perform a “log-

ical” hangup (return the OK result code).

+VRA = n Ringing Tone Goes Away Timer.

The ISOmodem only uses th is command in ca ll origination tr ansactions.

This command sets the amount of time in 0.1 second units the ISOmo-

dem shall wait between Ringing Tone before it can assume that the

remote modem has gone off-hook. Default time is five seconds.

+VRID = n Repeat Caller ID.

n Description

0 Display Caller ID information of the last incoming call in

formatted form.

1 Display Caller ID information of the last incoming call in

unformatted form.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

80 Rev. 1.41

+VRN = n Ringing Tone Never Appeared Timer.

This command sets the amount of time in seconds the ISOmodem will

wait looking for Ringing Tone. If the ISOmodem does not detect Ring ing

Tone in this time period, the ISOmodem shall assume that the remote

station has go ne of f- hook and return an OK r esult code. Default time is

0 seconds .

+VRX Receive Voice Stream.

Enable DTE receive of voice stream. The DCE will return a CONNECT

response followed by the voice stream as defined by the +VSM com-

mand. The DTE can issue a <DLE><!> or <DLE><ESC> sequence to

terminate the receive stream. The DCE will return a <DLE><ETX> fol-

lowed by an OK response for <DLE><!> and <DLE><ESC> followed by

an OK response for <DLE><ESC>. The DCE can be configured to ter-

minate the stream using the DTE/DCE Inactivity Timer, which is config-

ured using the +VIT command. The DTE will need to process any

<DLE> shielded events pr esent in the data stream. Any <DLE><DLE>

sequences can be preserved to allow less overhead during playback of

the stream with the +VTX command.

+VSD = <sds>,

<sdi> Silence Detection.

<sds> Noise level sensitivity

127 Less aggressive [more sensitive, lower noise levels

considered to be silence].

128 Nominal level of sensitivity.

129 More aggressive [less sensitive, higher noise levels

considered to be silence].

<sdi> sets the length of a time interval in 0.1 second

units, which must contain no or little activity,

before the ISOmodem will report (QUIET) (<DLE><q>).

Default is five seconds.

+VSM = n Voice Compression Method.

0 Signed PCM

1 Unsigned PCM

4 G.711 µ-Law

5 G.711 A-Law

129 ADPCM 2-bit (2 kB/s storage)

131 ADPCM 4-bit (4 kB/s storage)

+VSP Voice Speakerphone State

<mode> Description

0 Speakerphone AEC, AES and LEC disabled.

Handset FIR filter coeff icients are selected.

1 Speakerphone AEC, AES and LEC enabled.

Speakerphone FIR filter coefficients are selected.

The +VLS=13 command must be used in combination with this setting.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

Rev. 1.41 81

+VTD = n DTMF / Tone Duration Timer.

This command sets the default DTMF / tone generation duration in

10 ms units for the +VTS command. Defau lt time is 1 second

(n = 100).

+VTS = [<freq1>,

<freq2>, <dur>] DTMF and Tone Generation.

This command c an be us ed to pr od uc e DT MF to ne s, sin gle -f re qu e ncy

tones, and double-freq uency tones. Note that the bracket characters ar e

required for correct operation.

<freq1> Frequency one, which ha s a ra ng e of 0, 200 - 32 00 Hz.

<freq2> Frequency two, which has a range of 0, 200-3200 Hz.

<dur> Duration of the tone(s ) in 10 m s uni ts.

+VTX Transmit Voice Samples.

Used for sending digitized voice sample s from host memory through the

UART inter face. The +VSM command determines the format o f the sam-

ples. Multiple routing options are available.

Table 49. Basic AT Command Set (Continued)

Command Action

AN93

82 Rev. 1.41

Table 50. Basic ATI Command Set

AT Command Si2493/57/34/15/04 Si2494/39 Patch

Chip Revision

B C D/D1 A/A1

ATI0 B C D A None

ATI1 00 00 000 000

ATI0 B C Revision B

(rb_pX_YYYY)

ATI1 X X

ATI0 C Revision C

(rc_pX_YYYY)

ATI1 X

ATI0 D A Revision D/D1

(rd_pX_YYYY)

ATI1 XX

ATI0 D A Revision A/A1

(ra_pX_YYYY)

ATI1 XX

Note: Gray cell = not allow ed.

AN93

Rev. 1.41 83

5.5. Extended AT Commands

The extended AT commands, described in Tables 51–53 , ar e su pp or te d by the ISOmodem.

Table 51. Extended AT& Command Set

Command Action

&$ Display AT& current settings (see text for details).

&Dn Escape pin function (similar to DTR)

&D0 E sc ap e pin is not us ed .

&D1 Escape pin escapes to command mode from data mode. The escape pin must be enabled by

setting bit HES (Enable Ha rdware Escape Pin, U70 bit 15).

&D2 Escape pin assertion during a modem connection causes the modem to go on-hook and return to

command mode. The escape pin must be enabled by setting bit HES (Enable Hardware Escape

Pin, U70 bit 15).

&D3 Escape pin assertion causes ATZ command (reset and return OK result code). The escap e pin must

be enabled by setting bit HES (Enable Hardware Escape Pin, U70 bit 15).

&Gn Line connection rate limit—This command set s an upper limit on the line speed that the ISOmod em

can connect. The &Hn commands may limit the line speed as well (&Gn not used for &H0 or &H1).

Not all modulations support rates given by &G. Improper settings are ignored.

&G3 1200 bps max.

&G4 2400 bps max.

&G5 4.8 kbps max.

&G6 7.2 kbps max.

&G7 9.6 kbps max.

&G8 12 kbps max.

&G9 14.4 kbps max (default for Si2415)

&G10 16.8 kbps max.

&G11 19.2 kbps max.

&G12 21.6 kbps max.

&G13 24 kbps max.

&G14 26.4 kbps max.

&G15 28.8 kbps max.

&G16 31.2 kbps max.

&G17 33.6 kbps max (default for Si2457 transmit an d Si2434)

&Hn Switched network handsha ke mode—&Hn commands must be on a separate command line from

ATD, ATA, or ATO commands.

&H0 V.90 with automatic fallback (56 kbps to 300 bps) (default for Si2457)

Notes:

1. The initial number attempted to test for an outside line is controlled by S51 (default = 1).

2. AT&$ reflects the last AT&P command issued but does not reflect any subsequent changes made by writing U registers

with AT:U.

AN93

84 Rev. 1.41

&H1 V.90 only (56 kbps to 28 kbps)

&H2 V.34 with automatic fallback (33.6 kbps to 300 bps) (default for Si2434)

&H3 V.34 only (33.6 kbps to 2400 bps)

&H4 ITU-T V.32bis with automatic fallback (14.4 kbps to 300 bps) (default for Si2415)

&H5 ITU-T V.32bis only (1 4.4 kbps to 4800 bps)

&H6 ITU-T V.22bis only (2400 bps or 1200 bps) (default for Si2404)

&H7 ITU-T V.22 only (1200 bps)

&H8 Bell 212 only (1200 bps)

&H9 Bell 103 only (300 bps)

&H10 ITU-T V.21 only (300 bps)

&H11 V.23 (1200/75 bps)

&H12 V.92 with automatic fallback (default for Si2493)

&Pn Japan pulse dialing*

&P0 Configure ISOmodem for 10 pulse-per-second pulse dialing

&P1 Configure ISOmodem for 20 pulse-per-second pulse dialing (Japan)

&Tn Test mode.

&T2

Initiate ITU-T V.54 (ANALOOP) test. Modem mode set by &H. Test loop is through the DSP an d

DAA interface section of the ISOmodem only. ISOmodem echoes data from TX pin (Hardware In ter-

face Register 0 in parallel or SPI mode) back to RX pin (Hardwa re Interface Reg ister 0 in parallel or

SPI mode). This test mode is typically used during board-level debug.

&T3

Initiate ITU-T V.54 (ANALOOP) test. Modem mode set by &H. Test loop is through the DSP (ISOmo-

dem), DAA interface section (ISOmodem), ISOcap interface (Si3018/10), and analog hybrid circuit

(Si3018/10). ISOmodem echoes data from TX pin (Hardware Interface Register 0 in parallel or SPI

mode) back to RX pin (Register 0 in parallel or SPI mode). Phone line termina tion required as in

Figure 26. In order to test only the ISOcap link operation, the hybrid and AFE codec can be removed

from the test loop by setting U62 [1] (DL) = 1.

&T4

Initiate transmit as or igin a tin g mo d em with au to m at ic dat a gen er at ion . Mo du la tion , da ta rate, and

symbol rate are set by &H, &G, and S41. Data pattern is set by the S40 register. Continues until the

ATH command is sent after an escape into command mode. Data are also demodulate d as in

ANALOOP. The test can be ended by escaping and issuing the ATH command.

&T5

Initiate transmit as an sw er ing modem with automatic data generation. Modulation, data rate, and

symbol rate are set by &H, &G, and S41. Data pattern is set by the S40 register. Continues until the

ATH command is sent after an escape into command mode. Data are also demodulate d as in

ANALOOP. The test can be ended by escaping and issuing the ATH command.

&T6 Compute checksum for firmware-u pgradeable section of program memory. If no firmware upgrade

is installed, &T6 returns C:80e9.

Table 51. Extended AT& Command Set (Continued)

Notes:

1. The initial number attempted to test for an outside line is controlled by S51 (default = 1).

2. AT&$ reflects the last AT&P command issued but does not reflect any subsequent changes made by writing U registers

with AT:U.

AN93

Rev. 1.41 85

Figure 26. Phone Line Termination Circuit

&T7

Built-in modem self-test. This test checks the RAM and calculates ROM CRC. If the RAM check

fails, it will display the offending RAM address, and return ERROR. If the RAM check passes, it will

display th e ROM CRC and return OK. In either case, the modem is hard reset after the test. The

host should wait for 100ms after the OK to issue the next AT command.

&Xn Automatic determination of telephone line type.

&X0 Abort &x1 or &x2 command.

&X1

Automatic determination of telephone line type.

Result code: WXYZn

W: 0 = line supports DTMF dialing.

1 = line is pulse dial only.

X: 0 = line supports 20 pps dialing.

1 = line supports 10 pps dialing only.

Y: 0 = extension network present (PBX).

1 = outside line (PSTN) connected directly.

Z: 0 = continuous dial tone.

1 = make-break dial tone.

n: 0–9 (number required for ou tside line if Y = 0).1

&X2 Same as &X1, but Y result (PBX) is not tested.

Y2A2Produce a constan t an swer tone (ITU-T) a nd return to command mode. The answer tone continue s

until the ATH command is received or the S7 timer expires.

&Z Enter low-power wake-on-ring mode.

Table 51. Extended AT& Command Set (Continued)

Notes:

1. The initial number attempted to test for an outside line is controlled by S51 (default = 1).

2. AT&$ reflects the last AT&P command issued but does not reflect any subsequent changes made by writing U registers

with AT:U.

RING

Si3018 VTR IL

600 

10 µF

–

TIP

AN93

86 Rev. 1.41

Table 52. Extended AT% Command Set

Command Action

%$ Display AT% command settings (see te xt for details).

%B Report blacklist. See also S42 register.

%Cn Data compression.

%C0 Disable V.42bis and MNP5 data compression.

%C1 Enable V.42bis in transmit and receive paths.

If MNP is selected (\N2), %C1 enables MNP5 in transmit and receive paths.

%C2 Enable V.42bis in transmit path only.

%C3 Enable V.42bis in receive path only.

%On Answer mode.

%O1 ISOmodem answers a call in answer mode.

%O2 ISOmodem answers a call in originate mode.

%Vn

Automatic Line Status Detection.

After the %V1 and %V2 commands a re issued, the ISOmodem automatically checks the telephone

connection for whether a line is present. If a line is present, the ISOmodem automatically checks if

the line is already in use. Finally, the ISOmodem checks line status both before going off-hook and

again before dialing. %V1 uses the fixed method, and %V2 uses the adaptive method. %V0

(default) disables this feature.

%V0 Disa bl e au t omat ic lin e -i n-u se de te ct ion .

%V1

Automatic Line Status Detection - Fixed Method.

Description: Before going of f-hook with the ATD, A T O, or ATA commands, the ISOmodem compares

the line voltage (via LVCS) to registers NOLN (U83) and LIUS (U84) :

Loop Voltage Action

0LVCS NOLN Report NO LINE and remain on-ho ok.

NOLN LVCS LIUS Report LINE IN USE and remain on-hook.

LIUS LCVS Go off-hook and establish a modem connection.

Once the call has begun, the of f-hook intrusion algorithm (described in "6.6.2. Intr usion Explanation"

on page 174) operates norm ally. In addition, the ISOmodem reports NO LINE if the line is com-

pletely disconnected. If the HOI bit (U77, bit 11 ) is set, LINE IN USE is reported upon intrusion.

AN93

Rev. 1.41 87

%V2

Automatic Line Status Detection - Adaptive Method.

Description: Before going of f-hook with the ATD, A T O, or ATA commands, the ISOmodem compares

the line voltage (via LVCS) to the NLIU (U85) register:

Loop Voltage Action

0LVCS (0.0625 x NLIU) Report NO LINE and remain on-hook.

(0.0625 x NLIU) < LVCS (0.85 x NLIU) Report LINE IN USE and remain on-hook.

(0.85 x NLIU) < LCVS Go off-hook and establish a modem connection.

The NLIU register is updated every 1 ms with the minimum non-zero value of LVCS in the last

30 ms. This allows the ISOmodem to eliminate errors due to 50/60 Hz interference and also adapt

to relatively slow changes in the on-hook dc reference value on the telephone line. This algorithm

does not allow any non-zero values for NLIU below 0x0007. The host may also initialize NLIU prior

to issuing the %V2 command. Once the call has begun, the off-hook intrusion algorithm (described

in "6.6.2. Intrusion Explanation" on page 17 4) operates no rmally. In addition, the ISOmodem report s

NO LINE if the telephone line is comple te ly disconn ected. If the HOI (U77, bit 11) bit is set, LINE IN

USE is reported upon intrusion.

Table 53. Extended AT\ Command Set

Command Action

\$ Display AT\ command settings (see text for details).

\Bn Cha racter length is automatically set in autobaud mode .

\B0 Reserved

\B1 7N1—Seven data bits, no parity, one stop bit, one start bit, nine bits total (\N0 only)

\B2 7P1—Seven data bit s, pa rit y opt i on e d by \P , one stop bit, one start bit, ten bits total

\B3 8N1—Eight data bits, no parity, one stop bit, one start bit, 10 bits total (default)

\B5 8P1—Eight data bits, parity optioned by \P, one stop bit, one start bit, 11 bits total (\N0 only) This

mode is not all o wed with a parallel or SPI interface.

\B6 8X1—Eight data bits, one escape bit, one stop bit, one start bit, 11 bits total (enables ninth-bit

escape mode) This mode is not allowed with a parallel or SPI interface.

\Nn Asy nch r on ou s pr ot oc ol.

Notes:

1. When in autobaud mode, \B0, \B1, and \P1 is not detected automatically. The combination of \B2 and \P3 is detected.

This is compatible with seven data bit s, no p arity, two stop bits. Seven data bit s, no parity, one stop bit may be forced by

sending AT\T17\B1.

2. After changing the baud rate, the result code OK is sent at the old DTE rate. Subsequent commands must be sent at

the new rate. If the ISOmodem is configured in autobaud mode, AT commands \T0 through \T15 lock the new baud rate

and disable autobaud. To eliminate any possibility of a race condition between the receipt of the result code and the

changing of the UART speed, CTS is de-asserted while the result code is being sent until after the rate has been

successfully changed. The host should send the \T command and wait for the OK response. After OK has been

received, the host may send data at the new rate as soon as CTS is asserted. The \T command should be the last

command sent in a multi-command line and may not be used on the same command line as :U or :R commands. If it is

not, the OK from the \T command is sent at the old DTE rate, and other result codes are sent at the new DTE rate.

3. The autobaud feature does not detect this rate.

4. Default is \T16 if autobaud is selected by reset-strap option; otherwise default is \T9 (19.2 kbps).

5. The autobaud feature does not detect this rate in voice mode (+FCLASS = 8).

Table 52. Extended AT% Command Set (Continued)

AN93

88 Rev. 1.41

\N0 Wire mode (no error correction, no compression).

\N2 MNP reliable mode. The ISOmodem attempts to connect with th e MNP protocol. If unsuccessful, the

call is dropped. Compression is controlled by %Cn.

\N3 V.42 auto-reliable—The ISOmodem attempts to connect with the V.42 protocol. If unsuccess-

ful, the MNP protocol is attempted. If unsuccessful, wire mode is attempted. Compression is

controlled by %Cn.

\N4 V.42 (LAPM) reliable mod e (or dr op call) —Sa m e as \N3 except that the ISOmodem drops the call

instead of connecting in MNP or wire mode. Compression is controlled by %Cn.

\N5 V.42 and MNP reli able m ode - The ISOm odem attempts to connect with V.42. If unsu ccessful, MNP

is attempted. If MNP is unsuccessful, the call is dropped. Wiremode is not attempted. Compression

is controlled by %Cn.

\Pn Parity type is automatically set in autobaud mode.

\P0 Even

\P1 Space1

\P2 Odd

\P3 Mark.

\Qn Modem-to-DTE flow control.

\Q0 Disable all flow control—This may only be used if the DTE speed and the line (DCE) speed are guar-

anteed to match throughout the call.

\Q2 Use CTS only.

\Q3 Use RTS/CTS.

\Tn DTE rate2

\T0 300 bps

\T1 600 bps

\T2 1200 bps

Table 53. Extended AT\ Command Set (Continued)