FreescaleSemiconductorInc.
TWRK60D100MUM
TWR‐K60D100MTowerModule
User'sManual
Rev.1.1
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage2of18
TableofContents
1TWRK60D100MandTWRK60D100MKITOverview..............................................................4
1.1Contents..................................................................................................................................................................................4
1.2Features..................................................................................................................................................................................5
1.3GettingStarted.....................................................................................................................................................................6
1.4ReferenceDocuments.......................................................................................................................................................6
2HardwareDescription...........................................................................................................................6
2.1K60DN512Microcontroller............................................................................................................................................7
2.2Clocking..................................................................................................................................................................................8
2.3SystemPower.......................................................................................................................................................................8
2.3.1RTCVBAT..............................................................................................................................................................................................8
2.4DebugInterface...................................................................................................................................................................9
2.4.1OSJTAG....................................................................................................................................................................................................9
2.4.2CortexDebug+ETMConnector.....................................................................................................................................................9
2.5InfraredPort......................................................................................................................................................................10
2.6Accelerometer...................................................................................................................................................................10
2.7Potentiometer,Pushbuttons,LEDs.........................................................................................................................10
2.8GeneralPurposeTowerPlug‐in(TWRPI)Socket...............................................................................................11
2.9TouchInterface.................................................................................................................................................................11
2.10Ethernet............................................................................................................................................................................12
2.11USB......................................................................................................................................................................................13
2.12SecureDigitalCardSlot..............................................................................................................................................13
2.13ExternalBusInterface–FlexBus............................................................................................................................13
3JumperTable..........................................................................................................................................14
4Input/OutputConnectorsandPinUsageTable.........................................................................14
5TowerElevatorConnections............................................................................................................16
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage3of18
ListofFigures
Figure1.FreescaleTowerSystemOverview..............................................................................................4
Figure2.CalloutsonfrontsideoftheTWR‐K60D100M............................................................................5
Figure3.CalloutsonbacksideoftheTWR‐K60D100M.............................................................................6
Figure4.TWR‐K60D100MBlockDiagram..................................................................................................7
Figure5.InfraredPortImplementation...................................................................................................10
ListofTables
Table1.CortexDebug+ETMConnectorPinout..........................................................................................9
Table2.GeneralPurposeTWRPIsocketpinout.......................................................................................11
Table3.TouchTWRPIsocketpinout........................................................................................................12
Table4.Ethernetoperationjumpersettings...........................................................................................13
Table5.TWR‐K60D100MJumperTable...................................................................................................14
Table6.I/OConnectorsandPinUsageTable...........................................................................................15
Table7.TWR‐K60D100MPrimaryConnectorPinout...............................................................................16
RevisionHistory
RevisionDateChanges
1.0Jun1,2011 InitialReleaseforPWA700‐27291RevB
1.1Aug28,2011FixedhyperlinkinSection1.4
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage4of18
1 TWRK60D100MandTWRK60D100MKITOverview
TheTWR‐K60D100MisaTowerControllerModulecompatiblewiththeFreescaleTowerSystem.Itcan
functionasastand‐alone,low‐costplatformfortheevaluationoftheKinetisK10,K20andK60family
ofmicrocontroller(MCU)devices.TheTWR‐K60D100MfeaturestheKinetisK60low‐power
microcontrollerbasedontheARM®Cortex™‐M4architecturewithUSB2.0full‐speedOTGcontroller
and10/100MbpsEthernetMAC.
TheTWR‐K60D100Misavailableasastand‐aloneproductorasakit(TWR‐K60D100M‐KIT)withthe
TowerElevatorModules(TWR‐ELEV)andtheTowerSerialModule(TWR‐SER).TheTWR‐K60D100M
canalsobecombinedwithotherFreescaleTowerperipheralmodulestocreatedevelopment
platformsforawidevarietyofapplications.Figure1providesanoverviewoftheFreescaleTower
System.
Figure1. FreescaleTowerSystemOverview
1.1 Contents
TheTWR‐K60D100Mcontentsinclude:
• TWR‐K60D100Mboardassembly
• 3ftUSBcable
• CR2025CoinCellBattery
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage5of18
• QuickStartGuide
TheTWR‐K60D100M‐KITcontains:
• TWR‐K60D100MMCUmodule
• TWR‐ELEV–PrimaryandSecondaryElevatorModules
• TWR‐SER–SerialmoduleincludingUSBhost/device/OTG,Ethernet,CAN,RS232andRS485
1.2 Features
Figure2andFigure3showtheTWR‐K60D100Mwithsomeofthekeyfeaturescalledout.The
followinglistsummarizesthefeaturesoftheTWR‐K60D100MTowerMCUModule:
• Towercompatiblemicrocontrollermodule
• MK60DN512VMD10:K60DN512ina144MAPBGAwith100MHzoperation
• TouchTowerPlug‐inSocket
• GeneralpurposeTowerPlug‐in(TWRPI)socket
• On‐boardJTAGdebugcircuit(OSJTAG)withvirtualserialport
• Threeaxisaccelerometer(MMA78451Q)
• Four(4)user‐controllableLEDs
• Four(4)capacitivetouchpads
• Two(2)userpushbuttonswitches
• Potentiometer
• BatteryHolderfor20mmlithiumbattery(e.g.2032,2025)
• SDCardslot
• 3.3Vor1.8Voperation
• Isolationforlowpowermeasurements
Figure2. CalloutsonfrontsideoftheTWR‐K60D100M
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage6of18
Figure3. CalloutsonbacksideoftheTWR‐K60D100M
1.3 GettingStarted
FollowtheQuickStartGuidefoundprintedintheTWR‐K60D100Mboxoronthewebforthelistof
recommendedstepsforgettingstarted.Therearealsolabwalk‐throughguidesavailableonthetool
supportpagefortheTWR‐K60D100M:http://www.freescale.com/TWR‐K60D100M.
1.4 ReferenceDocuments
ThedocumentslistedbelowshouldbereferencedformoreinformationontheKinetisfamily,Tower
System,andMCUModules.Thesecanbefoundinthedocumentationsectionof
http://www.freescale.com/TWR‐K60D100Morhttp://freescale.com/kinetis.
• TWR‐K60D100M‐QSG:QuickStartGuide
• TWR‐K60D100M‐SCH:Schematics
• TWR‐K60D100M‐PWA:DesignPackage
• K60FamilyProductBrief
• K60FamilyReferenceManual
• KinetisQuickReferenceUserGuide(QRUG)
• TowerConfigurationTool
2 HardwareDescription
TheTWR‐K60D100MisaTowerControllerModulefeaturingtheMK60DN512VMD10—anARMCortex‐
M4basedmicrocontrollerwithUSB2.0full‐speedOTGcontrollers,Ethernet,andEncryptionina144
MAPBGApackagewithamaximumcoreoperatingfrequencyof100MHz.Itisintendedforuseinthe
FreescaleTowerSystembutcanoperatestand‐alone.Anon‐boarddebugcircuit,OSJTAG,providesa
JTAGdebuginterfaceandapowersupplyinputthroughasingleUSBmini‐ABconnector.Figure4
showsablockdiagramoftheTWR‐K60D100M.Thefollowingsectionsdescribethehardwareinmore
detail.
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage7of18
Figure4. TWR‐K60D100MBlockDiagram
2.1 K60DN512Microcontroller
TheTWR‐K60D100MmodulefeaturestheMK60DN512VMD10.TheK60microcontrollerfamilyispart
oftheKinetisportfolioofdevicesbuiltaroundanARMCortex‐M4core.RefertotheK60Family
ProductBriefandtheK60FamilyReferenceManualforcomprehensiveinformationonthe
MK60DN512VMD10device.Thekeyfeaturesarelistedhere:
• 32‐bitARMCortex‐M4corewithDSPinstructions
• 100MHzmaximumcoreoperatingfrequency
• 144MAPBGA,13mmx13mm,1.0mmpitchpackage
• 1.71V–3.6Voperatingvoltageinputrange
• 512Kbytesofprogramflash,128KbytesofstaticRAM
• Externalbusinterface
• Powermanagementcontrollerwith10differentpowermodes
• Multi‐purposeclockgeneratorwithPLLandFLLoperationmodes
• 16‐bitSARADC,12‐bitDAC
• High‐speedanalogcomparatorwith6‐bitDAC
• Programmablevoltagereference
• USBfull‐speed/low‐speedOTG/Host/Devicecontrollerwithdevicechargedetect
• 10/100MbpsEthernetMAC
• SPI,I2C(w/SMBUSsupport),UART(w/ISO7816andIrDA),CAN,I2S
• SDHostController(SDHC)
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage8of18
• GPIOwithpininterruptsupport,DMArequestcapability,digitalglitchfiltering
• Capacitivetouchsensinginputs(TSI)
• Debuginterfaces:JTAG,cJTAG,SWD
• Trace:TPIU,FPB,DWT,ITM,ETM,ETB
2.2 Clocking
TheKinetisMCUsstartupfromaninternaldigitallycontrolledoscillator(DCO).Softwarecanenable
oneortwoexternaloscillatorsifdesired.TheexternaloscillatorfortheMultipurposeClockGenerator
(MCG)modulecanrangefrom32.768KHzuptoa32MHzcrystalorceramicresonator.Theexternal
oscillatorfortheRealTimeClock(RTC)moduleacceptsa32.768kHzcrystal.
TheEXTALpinofthemainexternaloscillatorcanalsobedrivendirectlyfromanexternalclocksource.
TheTWR‐K60D100Mfeaturesa50MHzon‐boardclockoscillatorasseeninsheet4oftheschematics.
However,whentheK60EthernetMACisoperatinginRMIImode,synchronizationoftheMCUinput
clockandthe50MHzRMIItransferclockisimportant.Inthismode,theMCUinputclockmustbekept
inphasewiththe50MHzclocksuppliedtotheexternalPHY.Therefore,theTWR‐K60D100Mprovides
theoption(seedescriptionforJ6inTable5)toselecttheclockinputtotheMCUfrom1)theon‐board
50MHzsourceor2)anexternalclockfromtheCLKIN0pinonthePrimaryConnector3)routeCLKIN0
fromTWR‐SER50MHztoENET_1588_CLKIN.WhentheK60isoperatinginEthernetRMIImode,the
TowerperipheralmoduleimplementingtheRMIIPHYdeviceshoulddrivea50MHzclockonthe
CLKIN0signalthatiskeptinphasewiththeclocksuppliedtotheRMIIPHY.Refertosection2.10
“Ethernet”formoreinformation.
2.3 SystemPower
Instand‐aloneoperation,themainpowersourcefortheTWR‐K60D100Mmoduleisderivedfromthe
5.0VinputfromeithertheUSBmini‐Bconnector,J17,orthedebugheader,J16,whenashuntisplaced
onjumperJ15.Low‐dropoutregulatorsprovideeithera3.3Vor1.8Vsupplyfromthe5.0Vinput
voltageviaJ13.Refertosheet5oftheTWR‐K60D100Mschematicsformoredetails.
WheninstalledintoaTowerSystem,theTWR‐K60D100Mcanbepoweredfromeitheranon‐board
sourceorfromanothersourceintheassembledTowerSystem.Ifboththeon‐boardandoff‐board
sourcesareavailable,theTWR‐K60D100Mwilldefaulttotheoff‐boardsource.
TheV_BRDpowersuppliedtotheMCUisroutedthroughajumper,J14.Thejumpershuntcanbe
removedtoallowforeither1)alternateMCUsupplyvoltagestobeinjectedor2)themeasurementof
powerconsumedbytheMCU.
2.3.1 RTCVBAT
TheRealTimeClock(RTC)moduleontheK60hastwomodesofoperation,systempower‐upand
systempower‐down.Duringsystempower‐down,theRTCispoweredfromthebackuppowersupply,
VBAT.TheTWR‐K60D100Mprovidesabatteryholderforacoincellbatterythatcanbeusedasthe
VBATsupply.Theholdercanacceptcommon20mmdiameter3Vlithiumcoincellbatteries(e.g.2032,
2025).RefertothedescriptionofJ12inTable5“TWR‐K60D100MJumperTable”formoreinformation.
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage9of18
Additionally,theRTC_WAKEUPsignalfromtheK60wasconnectedtotheJM60todemonstratethe
featurewheretheRTCcansetanalarmandasserttheRTC_WAKEUPsignaltoexternalcircuitrysothe
externalcircuitrycanapplyMCUVDD.
2.4 DebugInterface
Therearetwodebuginterfaceoptionsprovided:theon‐boardOSJTAGcircuitandanexternalCortex
Debug+ETMconnector.
2.4.1 OSJTAG
Anon‐boardMC9S08JM60basedOpenSourceJTAG(OSJTAG)circuitprovidesaJTAGdebuginterface
totheK60D100M.AstandardUSBAmaletoMini‐Bmalecable(provided)canbeusedfordebugging
viatheUSBconnector,J16.TheOSJTAGinterfacealsoprovidesaUSBtoserialbridge.Driversforthe
OSJTAGinterfaceareprovidedintheP&EMicroOSBDM/OSJTAGTowerToolkit.Thesedriversand
moreutilitiescanbefoundonlineathttp://www.pemicro.com/osbdm.
Note:TheportpinsconnectedtotheOSJTAGUSB‐to‐serialbridge(PTD6andPTD7)arealsoconnected
totheinfraredinterface.RefertoTable6“I/OConnectorsandPinUsageTable”andTable5“TWR‐
K60D100MJumperTable”formoreinformation.
2.4.2 CortexDebug+ETMConnector
TheCortexDebug+ETMconnectorisa20‐pin(0.05")connectorprovidingaccesstotheSWD,SWV,
JTAG,cJTAG,EzPortandETMtrace(4‐bit)signalsavailableontheK60device.ThepinoutandK60pin
connectionstothedebugconnector,J16,isshowninTable1.
Table1. CortexDebug+ETMConnectorPinout
PinFunctionTWR‐K60D100MConnection
1VTref3.3VMCUsupply(P3V3_MCU)
2TMS/SWDIOPTA3/SCI0_RTS_b/FTM0_CH0/JTAG_MS/SWD_DIO
3GNDGND
4TCK/SWCLKPTA0/SCI0_CTS_b/FTM0_CH5/JTAG_CLK/SWD_CLK/EZP_CLK
5GNDGND
6TDO/SWOPTA2/SCI0_TX/FTM0_CH7/JTAG_DO/TRACE_SWO/EZP_DO
7Key―
8TDIPTA1/SCI0_RX/FTM0_CH6/JTAG_DI/EZP_DI
9GNDDetectPTA4/FTM0_CH1/MS/NMI_b/EZP_CS_b
10nRESETRESET_b
11TargetPower5Vsupply(viaJ12)
12TRACECLKPTA6/FTM0_CH3/TRACE_CLKOUT
13TargetPower5Vsupply(viaJ12)
14TRACEDATA[0]PTA10/FTM2_CH0/FTM2_QD_PHA/TRACE_D0
15GNDGND
16TRACEDATA[1]PTA9/FTM1_CH1/FTM1_QD_PHB/TRACE_D1
17GNDGND
18TRACEDATA[2]PTA8/FTM1_CH0/FTM1_QD_PHA/TRACE_D2
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PinFunctionTWR‐K60D100MConnection
19GNDGND
20TRACEDATA[3]PTA7/FTM0_CH4/TRACE_D3
Note:Manyofthetracesignalsconnectedtothedebugconnectorarealsoconnectedelsewhereon
theTWR‐K60D100M.RefertoTable6“I/OConnectorsandPinUsageTable”andTable7“TWR‐
K60D100MPrimaryConnectorPinout”formoreinformation.
2.5 InfraredPort
AninfraredtransmitandreceiveinterfaceisimplementedasshowninFigure5below.TheCMT_IRO
pindirectlydrivesaninfrareddiode.Thereceiverusesaninfraredphototransistorconnectedtoanon‐
chipanalogcomparatorthroughalow‐passfilter.InternaltotheK60device,theoutputoftheanalog
comparatorcanberoutedtoaUARTmoduleforeasierprocessingoftheincomingdatastream.
Figure5. InfraredPortImplementation
2.6 Accelerometer
AnMMA78451QdigitalaccelerometerisconnectedtotheK60MCUthroughanI2Cinterfaceanda
GPIO/IRQsignal.RefertoTable6“I/OConnectorsandPinUsageTable”forconnectiondetails.
2.7 Potentiometer,Pushbuttons,LEDs
TheTWR‐K60D100MfeaturestwopushbuttonswitchesconnectedtoGPIO/interruptsignals,onepush
buttonconnectedtothemasterresetsignal,fourcapacitivetouchpadelectrodes,fouruser‐
controllableLEDs,andapotentiometerconnectedtoanADCinputsignal.RefertoTable6“I/O
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage11of18
ConnectorsandPinUsageTable”forinformationaboutwhichportpinsareconnectedtothese
features.
2.8 GeneralPurposeTowerPlugin(TWRPI)Socket
TheTWR‐K60D100MfeaturesasocketthatcanacceptavarietyofdifferentTowerPlug‐inmodules
featuringsensors,RFtransceivers,andmore.TheGeneralPurposeTWRPIsocketprovidesaccessto
I2C,SPI,IRQs,GPIOs,timers,analogconversionsignals,TWRPIIDsignals,reset,andvoltagesupplies.
ThepinoutfortheTWRPISocketisdefinedinTable2.
RefertoTable6“I/OConnectorsandPinUsageTable”forthespecificK60pinconnectionstothe
GeneralPurposeTWRPIsocket.
Table2. GeneralPurposeTWRPIsocketpinout
Left‐side2x10Connector Right‐side2x10Connector
PinDescription
15VVCC
23.3VVCC
3GND
43.3VVDDA
5VSS(AnalogGND)
6VSS(AnalogGND)
7VSS(AnalogGND)
8ADC:Analog0
9ADC:Analog1
10VSS(AnalogGND)
11VSS(AnalogGND)
12ADC:Analog2
13VSS(AnalogGND)
14VSS(AnalogGND)
15GND
16GND
17ADC:TWRPIID0
18ADC:TWRPIID1
19GND
20Reset
Pin Description
1GND
2GND
3I2C:SCL
4I2C:SDA
5GND
6GND
7GND
8GND
9SPI:MISO
10 SPI:MOSI
11 SPI:SS
12 SPI:CLK
13 GND
14 GND
15 GPIO:GPIO0/IRQ
16 GPIO:GPIO1/IRQ
17 GPIO:GPIO2
18 GPIO:GPIO3
19 GPIO:GPIO4/Timer
20 GPIO:GPIO5/Timer
2.9 TouchInterface
Thetouchsensinginput(TSI)moduleoftheKinetisMCUsprovidescapacitivetouchsensingdetection
withhighsensitivityandenhancedrobustness.EachTSIpinimplementsthecapacitivemeasurementof
anelectrode.
TheTWR‐K60D100MprovidestwomethodsforevaluatingtheTSImodule.Therearefourindividual
electrodeson‐boardtheTWR‐K60D100Mthatsimulatepushbuttons.Additionally,twelveTSIsignals
areconnectedtoaTouchTowerPlug‐in(TWRPI)socketthatcanacceptTouchTWRPIdaughtercards
thatmayfeaturekeypads,rotarydials,sliders,etc.
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage12of18
ThepinoutfortheTouchTWRPIsocketisdefinedinTable3.RefertoTable6“I/OConnectorsandPin
UsageTable”forthespecificK60pinconnectionstotheTouchTWRPIsocket.
Table3. TouchTWRPIsocketpinout
Pin Description
15VVCC
23.3VVCC
3Electrode0
43.3VVDDA
5Electrode1
6VSS(AnalogGND)
7Electrode2
8Electrode3
9Electrode4
10 Electrode5
11 Electrode6
12 Electrode7
13 Electrode8
14 Electrode9
15 Electrode10
16 Electrode11
17 ADC:TWRPIID0
18 ADC:TWRPIID1
19 GND
20 Reset
2.10 Ethernet
TheK60D100Mfeaturesa10/100MbpsEthernetMACwithMIIandRMIIinterfaces.TheTWR‐
K60D100MroutestheRMIIinterfacesignalsfromtheK60MCUtothePrimaryConnector,allowingthe
connectiontoanexternalEthernetPHYdeviceonaTowerperipheralmodule.
WhentheK60EthernetMACisoperatinginRMIImode,synchronizationoftheMCUclockandthe50
MHzRMIItransferclockisimportant.TheMCUinputclockmustbekeptinphasewiththe50MHz
clocksuppliedtotheexternalPHY.Therefore,theTWR‐K60D100Mprovidestheoption(see
descriptionforJ10inTable5)toclocktheMCUfromanexternalclockfromtheCLKIN0pinonthe
PrimaryConnector.TheTowerperipheralmoduleimplementingtheRMIIPHYdeviceshoulddrivea50
MHzclockontheCLKIN0pinthatiskeptinphasewiththeclocksuppliedtotheRMIIPHY.
TheTWR‐SERmodulethatcomesaspartoftheTWR‐K60D100M‐KITprovidesa10/100EthernetPHY
thatcanoperateineitherMIIorRMIImode.BydefaultthePHYisbootstrappedtooperateinMII
mode;thereforejumperconfigurationchangesmayberequired.Inadditiontothat,theTWR‐
K60D100MalsoallowstheoptiontorouteCLKIN0fromtheTWR‐SER50MHztothe
ENET_1588_CLKIN.Table4showsthesettingsforproperinteroperabilitybetweentheEthernet
interfaceontheTWR‐SERandtheTWR‐K60D100M.
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Table4. Ethernetoperationjumpersettings
TowerModule Jumper Setting
TWR‐
K60D100M
J10 2‐3
TWR‐SER J2 3‐4
TWR‐SER J3 2‐3
TWR‐SER J12 9‐10
2.11 USB
TheK60D100MfeaturesaUSBfull‐speed/low‐speedOTG/Host/Devicecontrollerwithbuilt‐in
transceiver.TheTWR‐K60D100MroutestheUSBD+andD‐signalsfromtheK60MCUtothePrimary
Connector,allowingtheconnectiontoexternalUSBconnectorsoradditionalcircuitryonaTower
peripheralmodule.
TheTWR‐SERmoduleincludedaspartoftheTWR‐K60D100M‐KITprovidesaUSBOTG/Host/Device
interfacewithamini‐ABUSBconnector.Therearemanyconfigurationoptionsthatcanbeselectedto
evaluatedifferentUSBmodesofoperation.Bydefault,theTWR‐SERisconfiguredforUSBDevice
operation.
ThefollowingjumperconfigurationoptionsallowtheTWR‐K60N512toutilizetheTWR‐SERUSBinterfacein
DevicemodeusingasingleUSBcablefortheentireKit:
TWR‐SER:
J3:position2‐3[provides50MHztoTWR‐K60N512]
J10:position2‐3[powerforTowerSystemfromUSBconnectoronSerialboard]
J16:position3‐4[get5VfromUSBcable]
TWR‐K60D100M:
J4:ON[5VfromTWR‐SERtoK60VREGIN]
J10:position2‐3[receive50MHzfromTWR‐SER]
PleaserefertothedocumentationincludedwiththeTWR‐SERformoreinformationonthe
configurationoptions.
2.12 SecureDigitalCardSlot
ASecureDigital(SD)cardslotisavailableontheTWR‐K60D100MconnectedtotheSDHostController
(SDHC)signalsoftheK60MCU.ThisslotwillacceptSDmemorycardsaswellasSecureDigitalInput
Output(SDIO)cards.RefertoTable6“I/OConnectorsandPinUsageTable”fortheSDHCsignal
connectiondetails.
2.13 ExternalBusInterface–FlexBus
TheK60devicefeaturesamulti‐functionexternalbusinterfacecalledtheFlexBusinterfacecontroller
capableofinterfacingtoslave‐onlydevices.TheFlexBusinterfaceisnotuseddirectlyontheTWR‐
K60D100M.Instead,asubsetoftheFlexBusisconnectedtothePrimaryConnectorsothatthe
externalbuscanaccessdevicesonTowerperipheralmodules.RefertoTable7“TWR‐K60D100M
PrimaryConnectorPinout”andsheet8oftheTWR‐K60D100Mschematicsformoredetails.
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage14of18
3 JumperTable
ThereareseveraljumpersontheTWR‐K60D100Mthatprovideconfigurationselectionandsignal
isolation.Refertothefollowingtablefordetails.Thedefaultinstalledjumpersettingsareshownin
boldwithasterisks.
Table5. TWR‐K60D100MJumperTable
JumperOptionSetting Description
J1DriveRSTOUTSelection*1‐2* UsePTE27todriveRSTOUT
2‐3 UsePTB8todriveRSTOUT
J2InfraredTransmitter
Connection
ON ConnectPTD7/CMT_IRO/UART0_TXtoIRTransmitter(D5)
*OFF*DisconnectPTD7/CMT_IRO/UART0_TXfromIRTransmitter
(D5)
J4USBVREGINPower
Connection
*ON*ConnectUSB0_VBUSfromPrimaryElevator(A57)to
VREGIN
OFF DisconnectVREGINfromPrimaryElevator
J5Potentiometer
Connection
*ON* ConnectpotentiometertoADC1_DM1
OFFDisconnectpotentiometerfromADC1_DM1
J7OscillatorSelectionON Disableon‐boardoscillator
*OFF* Enableon‐boardoscillator
J10ClockInputSource
Selection
*1‐2* ConnectmainEXTALtoon‐board50MHzclock
2‐3ConnectEXTALtoCLKIN0signalonPrimaryElevator(B24)
3‐4ConnectCLKIN0signalonPrimaryElevator(B24)to
ENET_CLKIN
J14MCUPowerConnection
*1‐2* Connecton‐board3.3Vor1.8V(V_BRD)supplytoMCU
2‐3IsolateMCUfrompowersupply(allowsforexternalsupply
orpowermeasurements)
J12VBATPowerSelection
*1‐2* ConnectVBATtoon‐board3.3Vor1.8Vsupply
2‐3ConnectVBATtothehighervoltagebetweenMCUsupply
(MCU_PWR)orcoin‐cellsupply(VBATD)
J18OSJTAGModeSelectionONOSJTAGbootloadermode(OSJTAGfirmware
reprogramming)
*OFF* Debuggermode
J15JTAGPowerConnectionONConnecton‐board5VsupplytoJTAGport(supports
poweringboardfromexternalJTAGprobe)
*OFF*Disconnecton‐board5VsupplyfromJTAGport
4 Input/OutputConnectorsandPinUsageTable
ThefollowingtableprovidesdetailsonwhichK60D100MpinsareusingtocommunicatewiththeLEDs,
switches,andotherI/OinterfacesonboardtheTWR‐K60D100M.
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage15of18
Note:Someportpinsareusedinmultipleinterfaceson‐boardandmanyarepotentiallyconnectedto
off‐boardresourcesviathePrimaryandSecondaryConnectors.Takecaretoavoidattempted
simultaneoususageofmutuallyexclusivefeatures.
Table6. I/OConnectorsandPinUsageTable
FeatureConnection PortPin PinFunction
OSJTAGUSB‐to‐serial
Bridge
OSJTAGBridgeRXData PTE9 UART5_RX
OSJTAGBridgeTXData PTE8 UART5_TX
SDCardSlot
SDClockPTE2 SDHC0_DCLK
SDCommand PTE3 SDHC0_CMD
SDData0PTE1 SDHC0_D0
SDData1PTE0 SDHC0_D1
SDData2PTE5 SDHC0_D2
SDData3PTE4 SDHC0_D3
SDCardDetect PTE28 PTE28
SDWriteProtect PTE27 PTE27
InfraredPortIRTransmitPTD7 CMT_IRO
IRReceivePTC6 CMP0_IN0
Pushbuttons
SW1(IRQ0)PTA19 PTA19
SW2(IRQ1)PTE26 PTE26
SW3(RESET) RESET_b RESET_b
TouchPads
E1/TouchPTA4 TSI0_CH5
E2/TouchPTB3 TSI0_CH8
E3/TouchPTB2 TSI0_CH7
E4/TouchPTB16 TSI0_CH9
LEDs
E1/OrangeLED PTA11 PTA11
E2/YellowLED PTA28 PTA28
E3/GreenLED PTA29 PTA29
E4/BlueLED PTA10 PTA10
PotentiometerPotentiometer(R71) ―ADC1_DM1
Accelerometer
I2CSDAPTD9 I2C0_SDA
I2CSCLPTD8 I2C0_SCL
IRQPTD10 PTD10
GeneralPurpose
TWRPISocket
TWRPIAN0(J4Pin8) ―ADC0_DP0/ADC1_DP3
TWRPIAN1(J4Pin9) ―ADC0_DM0/ADC1_DM3
TWRPIAN2(J4Pin12) ―ADC1_DP0/ADC0_DP3
TWRPIID0(J4Pin17) ―ADC0_DP1
TWRPIID1(J4Pin18) ―ADC0_DM1
TWRPII2CSCL(J5Pin3) PTD8 I2C0_SCL
TWRPII2CSDA(J5Pin4) PTD9 I2C0_SDA
TWRPISPIMISO(J5Pin9) PTD14 SPI2_SIN
TWRPISPIMOSI(J5Pin10) PTD13 SPI2_SOUT
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage16of18
FeatureConnection PortPin PinFunction
TWRPISPISS(J5Pin11) PTD15 SPI2_PCS0
TWRPISPICLK(J5Pin12) PTD12 SPI2_SCK
TWRPIGPIO0(J5Pin15) PTD10 PTD10
TWRPIGPIO1(J5Pin16) PTB8 PTB8
TWRPIGPIO2(J5Pin17) PTB9 PTB9
TWRPIGPIO3(J5Pin18) PTA19 PTA19
TWRPIGPIO4(J5Pin19) PTE26 PTE26
TouchPadTWRPI
Socket
Electrode0(J3Pin3) PTB0 TSI0_CH0
Electrode1(J3Pin5) PTB1 TSI0_CH6
Electrode2(J3Pin7) PTB2 TSI0_CH7
Electrode3(J3Pin8) PTB3 TSI0_CH8
Electrode4(J3Pin9) PTC0 TSI0_CH13
Electrode5(J3Pin10) PTC1 TSI0_CH14
Electrode6(J3Pin11) PTC2 TSI0_CH15
Electrode7(J3Pin12) PTA4 TSI0_CH5
Electrode8(J3Pin13) PTB16 TSI0_CH9
Electrode9(J3Pin14) PTB17 TSI0_CH10
Electrode10(J3Pin15) PTB18 TSI0_CH11
Electrode11(J3Pin16) PTB19 TSI0_CH12
TWRPIID0(J3Pin17) ―ADC1_DP1
TWRPIID1(J3Pin18) ―ADC1_SE16
5 TowerElevatorConnections
TheTWR‐K60D100Mfeaturestwoexpansioncard‐edgeconnectorsthatinterfacetothePrimaryand
SecondaryElevatorboardsinaTowersystem.ThePrimaryConnector(comprisedofsidesAandB)is
utilizedbytheTWR‐K60D100MwhiletheSecondaryConnector(comprisedofsidesCandD)only
makesconnectionstotheGNDpins.Table7providesthepinoutforthePrimaryConnector.
Table7. TWR‐K60D100MPrimaryConnectorPinout
Pin # Side B Pin # Side A
Name Usage Name Usage
B1 5V 5.0V Power A1 5V 5.0V Power
B2 GND Ground A2 GND Ground
B3 3.3V 3.3V Power A3 3.3V 3.3V Power
B4 ELE_PS_SENSE Elevator Power Sense A4 3.3V 3.3V Power
B5 GND Ground A5 GND Ground
B6 GND Ground A6 GND Ground
B7 SDHC_CLK / SPI1_CLK PTE2 A7 SCL0 PTD8
B8 SDHC_D3 / SPI1_CS1_b A8 SDA0 PTD9
B9 SDHC_D3 / SPI1_CS0_b PTE4 A9 GPIO9 / CTS1 PTC19
B10 SDHC_CMD / SPI1_MOSI PTE1 A10 GPIO8 / SDHC_D2 PTE5
B11 SDHC_D0 / SPI1_MISO PTE3 A11 GPIO7 / SD_WP_DET PTE27
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage17of18
Pin # Side B Pin # Side A
Name Usage Name Usage
B12 ETH_COL A12 ETH_CRS
B13 ETH_RXER PTA5 A13 ETH_MDC PTB1
B14 ETH_TXCLK A14 ETH_MDIO PTB0
B15 ETH_TXEN PTA15 A15 ETH_RXCLK
B16 ETH_TXER A16 ETH_RXDV PTA14
B17 ETH_TXD3 A17 ETH_RXD3
B18 ETH_TXD2 A18 ETH_RXD2
B19 ETH_TXD1 PTA17 A19 ETH_RXD1 PTA12
B20 ETH_TXD0 PTA16 A20 ETH_RXD0 PTA13
B21 GPIO1 / RTS1 PTC18 A21 SSI_MCLK PTE6
B22 GPIO2 / SDHC_D1 PTE0 A22 SSI_BCLK PTE12
B23 GPIO3 PTE28 A23 SSI_FS PTE11
B24 CLKIN0 PTA18 A24 SSI_RXD PTE7
B25 CLKOUT1 PTE26 A25 SSI_TXD PTE10
B26 GND Ground A26 GND Ground
B27 AN7 PTB7 A27 AN3 PGA0_DP/ADC0_DP0/ADC1_DP3
B28 AN6 PTB6 A28 AN2 PGA0_DM/ADC0_DM0/ADC1_DM3
B29 AN5 PTB5 A29 AN1 PGA1_DP/ADC1_DP0/ADC0_DP3
B30 AN4 PTB4 A30 AN0 PGA1_DM/ADC1_DM0/ADC0_DM3
B31 GND Ground A31 GND Ground
B32 DAC1 DAC1_OUT A32 DAC0 DAC0_OUT
B33 TMR3 A33 TMR1 PTA9
B34 TMR2 PTD6 A34 TMR0 PTA8
B35 GPIO4 PTB8 A35 GPIO6 PTB9
B36 3.3V 3.3V Power A36 3.3V 3.3V Power
B37 PWM7 PTA2 A37 PWM3 PTA6
B38 PWM6 PTA1 A38 PWM2 PTC3
B39 PWM5 PTD5 A39 PWM1 PTC2
B40 PWM4 PTA7 A40 PWM0 PTC1
B41 CANRX0 PTE25 A41 RXD0 PTE25
B42 CANTX0 PTE24 A42 TXD0 PTE24
B43 1WIRE A43 RXD1 PTC16
B44 SPI0_MISO PTD14 A44 TXD1 PTC17
B45 SPI0_MOSI PTD13 A45 VSS VSSA
B46 SPI0_CS0_b PTD11 A46 VDDA VDDA
B47 SPI0_CS1_b PTD15 A47 VREFA1 VREFH
B48 SPI0_CLK PTD12 A48 VREFA2 VREFL
B49 GND Ground A49 GND Ground
B50 SCL1 PTD8 A50 GPIO14
B51 SDA1 PTD9 A51 GPIO15
B52 GPIO5 / SD_CARD_DET PTE28 A52 GPIO16
B53 USB0_DP_PDOWN A53 GPIO17
B54 USB0_DM_PDOWN A54 USB0_DM USB0_DM
B55 IRQ_H PTA24 A55 USB0_DP USB0_DP
B56 IRQ_G PTA24 A56 USB0_ID
B57 IRQ_F PTA25 A57 USB0_VBUS VREGIN
B58 IRQ_E PTA25 A58 TMR7
B59 IRQ_D PTA26 A59 TMR6
TWRK60D100MUMTWR‐K60N512TowerModuleUser'sManualPage18of18
Pin # Side B Pin # Side A
Name Usage Name Usage
B60 IRQ_C PTA26 A60 TMR5
B61 IRQ_B PTA27 A61 TMR4
B62 IRQ_A PTA27 A62 RSTIN_b RESET_b
B63 EBI_ALE / EBI_CS1_b PTD0 A63 RSTOUT_b RESET_b
B64 EBI_CS0_b PTD1 A64 CLKOUT0 PTC3
B65 GND Ground A65 GND Ground
B66 EBI_AD15 PTB18 A66 EBI_AD14 PTC0
B67 EBI_AD16 PTB17 A67 EBI_AD13 PTC1
B68 EBI_AD17 PTB16 A68 EBI_AD12 PTC2
B69 EBI_AD18 PTB11 A69 EBI_AD11 PTC4
B70 EBI_AD19 PTB10 A70 EBI_AD10 PTC5
B71 EBI_R/W_b PTC11 A71 EBI_AD9 PTC6
B72 EBI_OE_b PTB19 A72 EBI_AD8 PTC7
B73 EBI_D7 PTB20 A73 EBI_AD7 PTC8
B74 EBI_D6 PTB21 A74 EBI_AD6 PTC9
B75 EBI_D5 PTB22 A75 EBI_AD5 PTC10
B76 EBI_D4 PTB23 A76 EBI_AD4 PTD2
B77 EBI_D3 PTC12 A77 EBI_AD3 PTD3
B78 EBI_D2 PTC13 A78 EBI_AD2 PTD4
B79 EBI_D1 PTC14 A79 EBI_AD1 PTD5
B80 EBI_D0 PTC15 A80 EBI_AD0 PTD6
B81 GND Ground A81 GND Ground
B82 3.3V 3.3V Power A82 3.3V 3.3V Power
