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XMEGA A3U [DATASHEET]
Atmel-8386E-AVR-XMEGA A3U-Datasheet_09/2014
3. Overview
The Atmel AVR XMEGA is a family of low power, high performance, and peripheral rich 8/16-bit microcontrollers
based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the AVR
XMEGA device achieves throughputs CPU approaching one million instructions per second (MIPS) per
megahertz, allowing the system designer to optimize power consumption versus processing speed.
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32 registers are
directly connected to the arithmetic logic unit (ALU), allowing two independent registers to be accessed in a
single instruction, executed in one clock cycle. The resulting architecture is more code efficient while achieving
throughputs many times faster than conventional single-accumulator or CISC based microcontrollers.
The AVR XMEGA A3U devices provide the following features: in-system programmable flash with read-while-
write capabilities; internal EEPROM and SRAM; four-channel DMA controller, eight-channel event system and
programmable multilevel interrupt controller, 50 general purpose I/O lines, 16-bit real-time counter (RTC); seven
flexible, 16-bit timer/counters with compare and PWM channels; seven USARTs; two two-wire serial interfaces
(TWIs); one full speed USB 2.0 interface; three serial peripheral interfaces (SPIs); AES and DES cryptographic
engine; two 16-channel, 12-bit ADCs with programmable gain; one 2-channel 12-bit DAC; four analog
comparators (ACs) with window mode; programmable watchdog timer with separate internal oscillator; accurate
internal oscillators with PLL and prescaler; and programmable brown-out detection.
The program and debug interface (PDI), a fast, two-pin interface for programming and debugging, is available.
The devices also have an IEEE std. 1149.1 compliant JTAG interface, and this can also be used for boundary
scan, on-chip debug and programming.
The ATx devices have five software selectable power saving modes. The idle mode stops the CPU while
allowing the SRAM, DMA controller, event system, interrupt controller, and all peripherals to continue
functioning. The power-down mode saves the SRAM and register contents, but stops the oscillators, disabling
all other functions until the next TWI, USB resume, or pin-change interrupt, or reset. In power-save mode, the
asynchronous real-time counter continues to run, allowing the application to maintain a timer base while the rest
of the device is sleeping. In standby mode, the external crystal oscillator keeps running while the rest of the
device is sleeping. This allows very fast startup from the external crystal, combined with low power
consumption. In extended standby mode, both the main oscillator and the asynchronous timer continue to run.
To further reduce power consumption, the peripheral clock to each individual peripheral can optionally be
stopped in active mode and idle sleep mode.
Atmel offers a free QTouch library for embedding capacitive touch buttons, sliders and wheels functionality into
AVR microcontrollers.
The devices are manufactured using Atmel high-density, nonvolatile memory technology. The program flash
memory can be reprogrammed in-system through the PDI or JTAG interfaces. A boot loader running in the
device can use any interface to download the application program to the flash memory. The boot loader
software in the boot flash section will continue to run while the application flash section is updated, providing
true read-while-write operation. By combining an 8/16-bit RISC CPU with in-system, self-programmable flash,
the AVR XMEGA is a powerful microcontroller family that provides a highly flexible and cost effective solution for
many embedded applications.
All Atmel AVR XMEGA devices are supported with a full suite of program and system development tools,
including C compilers, macro assemblers, program debugger/simulators, programmers, and evaluation kits.