This is information on a product in full production.
December 2014 DocID027274 Rev 1 1/16
STD110N8F6
N-channel 80 V, 0.0056 typ.,80 A, STripFET™ F6
Power MOSFET in a DPAK package
Datasheet
-
production data
Figure 1. Internal schematic diagram
Features
Very low on-resistance
Very low gate charge
High avalanche ruggedness
Low gate drive power loss
Applications
Switching applications
Description
This device is an N-channel Power MOSFET
developed using the STripFET™ F6 technology
with a new trench gate structure. The resulting
Power MOSFET exhibits very low R
DS(on)
in all
packages.
$0Y
'7$%
*
6
7$%
'3$.
Order code V
DS
R
DS(on)max
I
D
P
TOT
STD110N8F6 80 V 0.0065 80 A 167 W
Table 1. Device summary
Order code Marking Package Pac king
STD110N8F6 110N8F6 DPAK Tube
www.st.com
Contents STD110N8F6
2/16 DocID027274 Rev 1
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DocID027274 Rev 1 3/16
STD110N8F6 Electrical ratings
16
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
DS
Drain-source voltage 80 V
V
GS
Gate-source voltage ±20 V
I
D
Drain current (continuous) at T
C
= 25 °C 80 A
I
D
Drain current (continuous) at T
C
= 100 °C 72 A
I
DM(1)
1. Pulse width is limited by safe operating area
Drain current (pulsed) 320 A
P
TOT
Total dissipation at T
C
= 25 °C 167 W
E
AS(2)
2. S tarting T
J
= 25 °C, I
D
= 55 A, V
DD
= 60 V
Single pulse avalanche energy 180 mJ
T
J
Operating junction temperature -55 to 175 °C
T
stg
Storage temperature °C
Table 3. Thermal data
Symbol Parameter Value Unit
R
thj-case
Thermal res is t anc e jun cti on- cas e max . 0.9 °C/W
R
thj-pcb(1)
1. When mounted on 1 inch² FR-4, 2 Oz copper board.
Thermal res is t anc e jun cti on- pcb max. 50 °C/W
Electrical characteristics STD110N8F6
4/16 DocID027274 Rev 1
2 Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 4. On/off-state
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
breakdown voltage V
GS
= 0, I
D
= 1 mA 80 V
I
DSS
Zero-gate voltage
drain current
V
GS
= 0, V
DS
= 80 V 1 µA
V
GS
= 0, V
DS
= 80 V,
T
C
= 125 °C 100 µA
I
GSS
Gate-body leakage
current V
DS
= 0, V
GS
= +20 V 100 nA
V
GS(th)
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA 2.5 4.5 V
R
DS(on)
Static drain-source
on- resistance V
GS
= 10 V, I
D
= 40 A 0.0056 0.0065
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
C
iss
Input capacitance
V
DS
= 40 V, f = 1 MHz,
V
GS
= 0
- 9130 - pF
C
oss
Out put capacitance - 320 - pF
C
rss
Reverse transfer
capacitance - 225 - pF
Q
g
Tot al gate charg e V
DD
= 40 V, I
D
= 80 A,
V
GS
= 10 V
(see Figure 14)
- 150 - nC
Q
gs
Gate-sou rce charge - 40 - nC
Q
gd
Gate-drain charge - 30 - nC
Table 6. Switching times
Symbol Parameter Test conditions Min. Ty p. Max. Unit
t
d(on)
Turn-on delay time V
DD
= 40 V, I
D
= 55 A,
R
G
= 4.7 , V
GS
= 10 V
(see Figure 13)
-24-ns
t
r
Rise time - 61 - ns
t
d(off)
Turn-off delay time - 162 - ns
t
f
Fall time - 48 - ns
DocID027274 Rev 1 5/16
STD110N8 F6 E lect ri cal chara ct er istics
16
Table 7. Source-drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
SD(1)
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Forward on voltage I
SD
= 80 A, V
GS
= 0 - 1.2 V
t
rr
Reverse recovery time I
SD
= 80 A, di/dt = 100 A/µ s
V
DD
= 64 V (see Figure 15)
-30 ns
Q
rr
Reverse recovery charge - 34 nC
I
RRM
Reverse recovery current - 2.3 A
Electrical characteristics STD110N8F6
6/16 DocID027274 Rev 1
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
,'


 9'69

$
2SHUDWLRQLQWKLVDUHDLV
/LPLWHGE\PD[5
'6RQ
PV
PV
V
7M &
7F &
6LQJOHSXOVH
*,3*)65
į 
6LQJOHSXOVH





.
 W
S
V
  



*,3*)65
Figure 4. Output characteristics Figure 5. Transfer characteristics
,'


9'69
$
9
9
9*6 9




*,3*/0
,'


9*69
$


9'6 9


*,3*/0
Figure 6. Gate charge vs gate-source Figure 7. Static drain-source on-resistance
9
*6
 4
J
Q&
9


9
''
9
,
'
$

 
*,3*)65
5'6RQ



 ,'$
Pȍ

9*6 9




*,3*)65
DocID027274 Rev 1 7/16
STD110N8 F6 E lect ri cal chara ct er istics
16
Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage vs
temperature
&


 9'69
S)
&LVV
&RVV
&UVV

     
*,3*/0
9*6WK




 7-&
QRUP
 
 
,' $
*,3*/0
Figure 10. Normalized on-resistance Figure 11. Normalized V
(BR)DSS
vs temperature
5'6RQ

  7-&
QRUP
  

9*6 9

*,3*/0
9%5'66
 7-&
QRUP
 
 



,' P$

*,3*/0
Figure 12. Drain-source diode forward
characteristics
96'
 ,6'$
9
 
 




7- &
7- &
7- &

*,3*/0
Test circuits STD110N8F6
8/16 DocID027274 Rev 1
3 Test circuits
Figure 13. Switching times test circuit for
resistive load Figure 14. Gate charge test circuit
Figure 15. Test circuit for inductive load
switching and diode recovery times Figure 16. Unclamped inductive load test circ uit
Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
μF
3.3
μFVDD
AM01469v1
VDD
47kΩ1kΩ
47kΩ
2.7kΩ
1kΩ
12V
Vi=20V=VGMAX
2200
μF
PW
IG=CONST
100Ω
100nF
D.U.T.
VG
AM01470v1
A
D
D.U.T.
S
B
G
25 Ω
AA
B
B
RG
G
FAST
DIODE
D
S
L=100μH
μF
3.3 1000
μFVDD
AM01471v1
Vi
Pw
VD
ID
D.U.T.
L
2200
μF
3.3
μFVDD
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
AM01473v1
VDS
ton
tdon tdoff
toff
tf
tr
90%
10%
10%
0
0
90%
90%
10%
VGS
DocID027274 Rev 1 9/16
STD110N8F6 Package information
16
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Package information STD110N8F6
10/16 DocID027274 Rev 1
Figure 19. DPAK (TO-252) type A drawing
B5
DocID027274 Rev 1 11/16
STD110N8F6 Package information
16
Table 8. DPAK (TO-252) type A mechanical data
Dim. mm
Min. Typ. Max.
A2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
b0.64 0.90
b4 5.20 5.40
c0.45 0.60
c2 0.48 0.60
D6.00 6.20
D1 5.10
E6.40 6.60
E1 4.70
e2.28
e1 4.40 4.60
H 9.35 10.10
L1.00 1.50
L1 2.80
L2 0.80
L4 0.60 1.00
R0.20
V2
Package information STD110N8F6
12/16 DocID027274 Rev 1
Figure 20. DPAK (TO-252) footprint
(a)
a. All dimensions are in millimeters
)3B5
DocID027274 Rev 1 13/16
STD110N8F6 Packing information
16
5 Packing information
Figure 21. Tape for DPAK (TO-252)
3
$ '
3
)
:
(
'
%
.
7
8VHUGLUHFWLRQRIIHHG
3
SLWFKHVFXPXODWLYH
WROHUDQFHRQWDSHPP
8VHUGLUHFWLRQRIIHHG
5
%HQGLQJUDGLXV
%
)RUPDFKLQHUHIRQO\
LQFOXGLQJGUDIWDQG
UDGLLFRQFHQWULFDURXQG%
$0Y
7RSFRYHU
WDSH
Packing information STD110N8F6
14/16 DocID027274 Rev 1
Figure 22. Reel for DPAK (TO-252)
Table 9. DPAK (TO-252) tape and reel mechanical dat a
Tape Reel
Dim. mm Dim. mm
Min. Max. Min. Max.
A0 6.8 7 A 330
B0 10.4 10.6 B 1.5
B1 12.1 C 12.8 13.2
D 1.5 1.6 D 20.2
D1 1.5 G 16.4 18.4
E 1.65 1.85 N 50
F 7.4 7.6 T 22.4
K0 2.55 2.75
P0 3.9 4.1 Base qty. 2500
P1 7.9 8.1 Bulk qty. 2500
P2 1.9 2.1
R40
T 0.25 0.35
W 15.7 16.3
$
'
%
)XOOUDGLXV *PHDVXUHGDWKXE
&
1
5((/',0(16,216
PPPLQ
$FFHVVKROH
$WVO RWORFDWLRQ
7
7DSHVORW
LQFRUHIRU
WDSHVWDUWPPPLQ
ZLGWK
$0Y
DocID027274 Rev 1 15/16
STD110N8F6 Revision history
16
6 Revision history
Table 10. Document revision history
Date Revision Changes
15-Dec-2014 1 First release.
STD110N8F6
16/16 DocID027274 Rev 1
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve th e right to make change s, co rrections, enh ancements, modifications, and
improveme nts to ST product s and/o r to this do cument at any time without not ice. Purcha sers should o bta in the latest relevant in format ion on
ST products before placing orders. ST products are sold pursua nt to ST’s terms and conditi ons of sale in plac e at the time of order
acknowledgement.
Purchase rs are s olely r espon si ble for t he cho ic e, selec tion, a nd use of ST pro duc ts and ST assume s no l i abil ity f or applic ation as sist ance or
the design of Purchasers ’ products.
No license, express or implied, to any inte llectual property right is granted by ST herein.
Resale of ST pr oducts with provis ions different from the in formation set forth herein shall void any warranty grant ed by ST for such pro duct.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document su persedes and replaces information previously supplied in any prior versions of this documen t.
© 2014 STMicroelectronics – All rights reserved
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
STMicroelectronics:
STD110N8F6