1
TM
November 1997
ACS139MS
Radiation Hardened
Dual 2-to-4 Line Decoder/Demultiplexer
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25Micr on Radiation Harde ned SOS CMOS
• Radiati on Environment
- Latch-up Free Under any Condi tions
- Total Dose. . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD(Si)
- SEU Immunity. . . . . . . . . . . <1 x 10-10 Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm2)
• Input Logi c Levels . . .VIL = (0.3)(VCC), VIH = (0.7)(VCC)
• Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±8mA
• Quiescent Supply Current. . . . . . . . . . . . . . . . . . .400µA
• Propagati on Delay
- Enable to Output . . . . . . . . . . . . . . . . . . . . . . . . . 13ns
- Address to Output . . . . . . . . . . . . . . . . . . . . . . . . 15ns
Applications
• Memory Decoding
• Data Routing
• Code conversion
Description
The Radiation Hardened ACS139MS contains two indepen-
dent binary to one-of-four decoders, each with a single active
low enable input. Data on the select inputs cause one of the
four normally high outputs t o go low.
If the enable input is hi gh, all four outputs remain hi gh. During
demultiplexer operation the enable input acts as the data input.
The enable input also functions as a chip select when the
devices are cascaded.
The ACS139MS is fabricated on a CMO S Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer significant
power reduction and faster performance when compared to
ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers list ed below must be used when ordering .
Detailed Electrical Specifications for the ACS139 are
contained in SMD 5962-97639. A “hot-link” is provided
on our homep age with instruct ions for downloading.
http://www.semi.Intersil.com/data/sm/index.htm
Ordering Information
SMD PART NUMBER INTERSIL PART NUMBER TEMP. RANGE (oC) PACKAGE CASE OUTLI NE
5962F9763901VEC AC S139DMSR-02 -55 to 12 5 16 Ld SBD IP CDIP2-T16
N/A ACS139D/Sample-02 25 16 Ld SBDIP CDIP2-T16
5962F9763901 VXC ACS139KMSR-02 -55 to 12 5 16 Ld Flatpack CDFP4-F16
N/A ACS139K/Sample-02 25 16 Ld Flatpack CDFP4-F16
N/A ACS139HMSR-02 25 Die N/A
Pinouts
ACS139 (SBDIP)
TOP VIEW ACS139 (FLATPACK)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
1E
1A0
1A1
1Y0
1Y1
1Y2
GND
1Y3
VCC
2A0
2A1
2Y0
2Y1
2Y2
2Y3
2E 1E
1A0
1A1
1Y0
1Y1
1Y2
1Y3
GND
2
3
4
5
6
7
8
116
15
14
13
12
11
10
9
VCC
2E
2A0
2A1
2Y0
2Y1
2Y2
2Y3
FN4431
CA UTION: These dev ices are sensitive to electrostatic disc harge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 |Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
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Die Charact eris tics
DIE DIMENSIONS:
Size: 2390µm x 2390µm ( 94 mils x 94 mils)
Thickness: 525µm ±25µm (20.6 mils ±1 mil)
Bond Pad: 110µm x 110µm (4.3 mils x 4.3 mils)
METALLIZATION:
Type: Al
Metal 1 Thickness: 0.7µm ±0.1µm
Metal 2 Thickness: 1.0µm ±0.1µm
SUBSTRATE:
Silicon on Sapphir e (SOS)
SUBSTRATE POTENTIAL:
Unbiased Insulator
BACKSIDE FINISH:
Sapphire
PASSIVATION
Type: Phosphorous Sili con Glass (PSG)
Thickness: 1.30µm ±0.15µm
SPECIAL INSTRUCTIONS:
Bond VCC First
ADDITIONAL INFORMATION:
Worst Case Density: <2.0 x 105 A/c m 2
Transistor Count: 190
Metallization Mask Layout
ACS139MS.
1A0 1E VCC 2E
1A1
1Y0
1Y1
1Y2
2A0
2A1
2Y0
2Y1
1Y3 GND 2Y3 2Y2
ACS139MS
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Intersi l pro ducts are sol d by descri ption only . Inte rsil Corporat ion reser ves th e right to mak e changes in circuit d esign and/or specifi cations at any time with out noti ce.
Accordingly, the reader is caution ed to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-
able. H owever, no responsi bility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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