1/8November 2002
.
STP60NS04Z
N-CHANNEL CLAMPED 10m Ω - 60A TO-220
FULLY PROTECTED ME SH OVERLAY™ MOSFET
■TYPICAL RDS(on) = 0.010 Ω
■100% AVALANCHE TESTED
■LOW CAPACITANCE AND GAT E CHARG E
■175 oC MAXIMUM JUNCTION
TEMPERATURE
DESCRIPTION
This fully clamped Mosfet is produced by using the latest
advanced Company’s Mesh Overlay process which is
based on a novel strip layout.
The inherent benefits of the new technology coupled with
the extra clamping capabilities make this product
particularly suitab le for th e har shest opera tion co nditio ns
such as those encountered in the automotive
environment. Any other application requiring extra
ruggedness is also recommended.
APPLICATIONS
■ABS, SOLEN O ID D RIVERS
■MOTOR CONTROL
■DC-DC CONVERTERS
TYPE VDSS RDS(on) ID
STP60NS04Z CLAMPED <0.015 Ω60 A
123
TO-220
ABSOLUTE MAXIMUM RATINGS
(•) P ul se width l i m i ted by sa fe o perati ng area.
Symbol Parameter Value Unit
VDS Drain-so urce Voltag e (VGS = 0) CLAMPED V
VDG Drain-gate Voltage CLAMPED V
VGS Gate- source Voltage CLAMPED V
IDDrain Current (continuous) at TC = 25°C 60 A
IDDrain Current (continuous) at TC = 100°C 42 A
IDG Drain Gate Current (continuous) ± 50 mA
IGS Gate SourceCurrent (continuous) ± 50 mA
IDM(•) Drain Current (pulsed) 240 A
Ptot Total Dissipation at TC = 25°C 140 W
Derating Factor 0.93 W/°C
VESD(G-S) Gate-Source ESD (HBM - C = 100pF, R=1.5 kΩ)2 kV
V
ESD(G-D) Gate-Drain ESD (HBM - C = 100pF, R=1.5 kΩ)4 kV
V
ESD(D-S) Drain-source ESD (HBM - C = 100pF, R=1.5 kΩ)4 kV
T
stg Storage Temperature -65 to 175 °C
TjMax. Operating Junction Temperature -40 to 175 °C
INTERNAL SCHEMAT IC DIAGRAM
STP60NS04Z
2/8
THE RMAL DA TA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTE RISTICS (Tcase = 25 °C unless otherwise specified)
OFF
ON (*)
DYNAMIC
Rthj-case
Rthj-case
Rthj-amb
Rthc-sink
Tl
Thermal Resistance Junction-case
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Thermal Resistance Case-sink
Maximum Lead Temperature For Soldering Purpose
Max
Typ
Max
Typ
1.07
0.85
62.5
0.5
300
°C/W
°C/W
°C/W
°C/W
°C
Symbol Paramet er Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max) 60 A
EAS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 30 V) 550 mJ
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Clamped Voltage ID = 1 mA, VGS = 0
-40 < TJ < 175 oC33 V
IDSS Zero Gate Voltage
Drain Current (VGS = 0) VDS = 16 V TJ =150 oC
VDS = 16 V TJ =175 oC50
100 µA
µA
IGSS Gate-body Leakage
Current (VDS = 0) VGS = ± 10 V TJ =175 oC
VGS = ± 16 V TJ =175 oC50
150 µA
µA
VGSS Gate-Source
Breakdown Voltage IGS = 100 µA 18 V
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS = VGS I
D
= 1 mA
-40 < TJ < 150 oC1.7 3 4.2 V
RDS(on) Static Drain-source On
Resistance VGS = 10 V ID = 30 A
VGS = 16 V ID = 30 A 11
10 15
14 mΩ
mΩ
ID(on) On S tate Drain Curre nt VDS > ID(on) x RDS(on)max,
VGS =10V 60 A
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (*) Forward Transconductance VDS>ID(on)xRDS(on)max ID=30A 20 30 S
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS = 25V, f = 1 MHz, VGS = 0 2500
800
150
3400
1100
200
pF
pF
pF
3/8
STP60NS04Z
SWITCHIN G ON
SWITCHIN G OFF
SOURCE DRAIN DI ODE
(*)Pulsed : P ul se durat i on = 300 µs, duty cycle 1.5 %.
(•)Puls e width l imited by s afe operating area.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD= 16 V ID= 60 A VGS= 10V 68
15
19
100 nC
nC
nC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Vclamp = 30 V ID = 60 A
RG= 4.7Ω, V
GS = 10 V
(Inductive Load, Figure 5)
85
145
90
110
180
120
ns
ns
ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM (•) Source-drain Current
Source-drain Current (pulsed) 60
240 A
A
VSD (*) Forward On Voltage ISD = 60 A VGS = 0 1.5 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 60 A di/dt = 100A/µs
VDD = 25 V Tj = 150°C
(see test circuit, Figure 5)
65
0.15
4.5
ns
µC
A
ELECTRICAL CHARACTE RISTICS (continued)
Safe Operating Area Thermal Impedance
STP60NS04Z
4/8
Output Characteristics Transfer Characteristics
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
5/8
STP60NS04Z
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature
Zero Gate Voltage Drain Current vs Temperature Source-drain Diode Forward Characteristics.
. .
STP60NS04Z
6/8
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Induc tive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switchin g
And Diode Recovery Ti m es
7/8
STP60NS04Z
DIM. mm. inch.
MIN. TYP. MAX. MIN. TYP. TYP.
A4.4 4.6 0.173 0.181
C1.23 1.32 0.048 0.051
D2.40 2.72 0.094 0.107
D1 1.27 0.050
E0.49 0.70 0.019 0.027
F0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G4.95 5.15 0.194 0.203
G1 2.40 2.70 0.094 0.106
H2 10 10.40 0.393 0.409
L2 16.10 16.40 16.73 0.633 0.645 0.658
L4 13 14 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.20 6.60 0.244 0.260
L9 3.50 3.93 0.137 0.154
DIA 3.75 3.85 0.147 0.151
TO-220 MECHANICAL DATA
STP60NS04Z
8/8
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