1
©2007- Integrated Device Technology, Inc.
OCTOBER 2008
DSC-3873/09
Features
◆◆
◆◆
◆128K x 8 advanced high-speed CMOS static RAM
◆◆
◆◆
◆JEDEC revolutionary pinout (center power/GND) for
reduced noise
◆◆
◆◆
◆Equal access and cycle times
– Commercial: 10/12/15/20ns
– Industrial: 10/12/15/20ns
◆◆
◆◆
◆One Chip Select plus one Output Enable pin
◆◆
◆◆
◆Inputs and outputs are LVTTL-compatible
◆◆
◆◆
◆Single 3.3V supply
◆◆
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◆Low power consumption via chip deselect
◆◆
◆◆
◆Available in a 32-pin 300- and 400-mil Plastic SOJ, and
32-pin Type II TSOP packages.
Functional Block Diagram
Description
The IDT71V124 is a 1,048,576-bit high-speed static RAM organized
as 128K x 8. It is fabricated using IDT’s high-performance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs. The JEDEC center power/GND pinout reduces
noise generation and improves system performance.
The IDT71V124 has an output enable pin which operates as fast as
5ns, with address access times as fast as 9ns available. All bidirec-
tional inputs and outputs of the IDT71V124 are LVTTL-compatible and
operation is from a single 3.3V supply. Fully static asynchronous
circuitry is used; no clocks or refreshes are required for operation.
ADDRESS
DECODER
1,048,576-BIT
MEMORY ARRAY
I/O CONTROL
•
•
•
A
0
A
16
3873 drw 01
8
8
I/O
0
-I/O
7
8
•
•
•
CONTROL
LOGIC
WE
OE
CS
.
3.3V CMOS Static RAM
1 Meg (128K x 8-Bit)
Center Power &
Ground Pinout
IDT71V124SA/HSA
2
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges
Truth Table(1)
Recommended DC Operating
Conditions
Absolute Maximum Ratings(1)
DC Electrical Characteristics
(VDD = Min. to Max., Commercial and Industrial Temperature Ranges)
Pin Configuration
SOJ and TSOP
Top View
Capacitance
(TA = +25°C, f = 1.0MHz, SOJ package)
5
6
7
8
9
10
11
12
A
0
A
1
A
2
1
2
3
4
32
31
30
29
28
27
26
25
24
23
22
21
A
15
A
3
CS
I/O
1
V
DD
A
14
OE
I/O
7
I/O
6
GND
I/O
5
3873 drw 02
GND
13 20
14 19
15 18
16
A
7
17
I/O
2
I/O
3
WE
A
4
A
5
A
6
A
12
A
11
A
10
A
9
A
8
SO32-2
SO32-3
SO32-4
I/O
0
A
16
A
13
V
DD
I/O
4
.
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliabilty.
Symbol Rating Value Unit
V
DD
Supply Voltage Relative
to GND -0.5 to +4.6 V
V
IN
, V
OUT
Terminal Voltage Relative
to GND -0. 5 to V
DD
+0.5 V
T
A
Commercial
Operating Temperature -0 to +70
o
C
Industrial
Operating Temperature -40 to +85
T
BIAS
Te mperature Under Bias -55 to +125
o
C
T
STG
Storage Temperature -55 to +125
o
C
P
T
Power Dissipation 1.25 W
I
OUT
DC Outp ut Current 50 mA
3873 tbl 02
NOTE:
1. H = V IH, L = VIL, X = Don't care.
CS OE WE I/O Function
LLHDATA
OUT
Read Data
LXLDATA
IN
Write Dat a
L H H High-Z Output Disabled
H X X H igh-Z Des elect ed – St andby
3873 tbl 01
NOTE:
1. This parameter is guaranteed by device characterization, but is not production tested.
Symbol Parameter
(1)
Conditions Max. Unit
C
IN
Input Capacitance V
IN
= 3dV 6 pF
C
I/O
I/O Capacit ance V
OUT
= 3dV 7 pF
3873 tbl 03
NOTES:
1. For 71V124SA10 only.
2. For all speed grades except 71V124SA10.
3. VIH (max.) = VDD+2V for pulse width less than 5ns, once per cycle.
4. VIL (min.) = –2V for pulse width less than 5ns, once per cycle.
Symbol Parameter Min. Typ. Max. Unit
V
DD
(1)
Supply Volt age 3. 15 3. 3 3. 6 V
V
DD
(2)
Supply Volt age 3.0 3. 3 3. 6 V
V
SS
Ground 0 0 0 V
V
IH
Input H igh Volt age 2. 0 ____ V
DD
+0.3
(3)
V
V
IL
Input Lo w Voltage –0. 5
(1)
____ 0.8 V
3873 tbl 04
Symbol Parameter Test Conditions Min. Max. Unit
|I
LI
| In put L ea kage Current V
DD
= M ax., V
IN
=
GND to V
DD
___
5µA
|I
LO
|
Ou tput Lea kage Current V
DD
= Max.,CS
=
V
IH
, V
OUT
=
GND to V
DD
___
5µA
V
OL
Ou tput Low Voltage I
OL
= 8mA, V
DD
= M in.
___
0.4 V
V
OH
Ou tput H igh Voltage I
OH
= –4mA, V
DD
= Min. 2.4
___
V
3873 tbl 05
Recommended Operating Tempera-
ture and Supply Voltage
Grade Temperature GND V
DD
Comme rcial 0°C to +70° C 0V See Below
Ind u strial -40° C to + 85° C 0V S e e Be lo w
3873 tb l 02a
6.42
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges
3
+1.5V
50Ω
I/O Z
0
=50Ω
3873 drw 03
30pF
.
*Including jig and scope capacitance.
Figure 2. AC Test Load
(for t CLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
Figure 1. AC Test Load
AC Test Conditions
DC Electrical Characteristics(1, 2)
(VDD = Min. to Max., VLC = 0.2V, VHC = VDD – 0.2V)
3873 drw 04
320Ω
350Ω5pF*
DATA
OUT
3.3V
NOTES:
1. All values are maximum guaranteed values.
2. All inputs switch between 0.2V (Low) and VDD–0.2V (High).
3. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
Symbol Parameter
71V124SA10 71V124SA12 71V124SA15 71V124SA20
UnitCom'l Ind Com'l Ind Com'l Ind Com'l Ind
I
CC
Dynamic Operating Current
CS < V
LC
, Outputs Open, V
DD
= Max., f = f
MAX
(3)
145 150 130 140 100 120 95 115 mA
I
SB
Dynam i c S tand b y P o we r Sup p ly Curre nt
CS > V
HC
, Outputs Open, V
DD
= Max., f = f
MAX
(3)
45 50 40 40 35 40 30 35 mA
I
SB1
Full Standby Power Supply Current (static)
CS > V
HC
, Outputs Open, V
DD
= Max., f = 0
(3)
10 10 10 10 10 10 10 10 mA
3873 tbl 06
Input Pulse Levels
Input Rise/Fall Tim es
Input Tim ing Ref erence Levels
Ou tput R eference Lev els
AC Test Load
GND to 3. 0V
3ns
1.5V
1.5V
See Figure 1 and 2
3873 tbl 07
4
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(VDD = Min. to Max., Commercial and Industrial Temperature Ranges)
NOTES:
1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
Symbol Parameter
71V124SA10 71V124SA12 71V124SA15 71V124SA20
Unit
Min. Max. Min. Max. Min. Max. Min. Max.
READ CYCLE
t
RC
Re ad Cy cle Ti me 10
____
12
____
15
____
20
____
ns
t
AA
Address Access Time
____
10
____
12
____
15
____
20 ns
t
ACS
Chip Select Acce ss Time
____
10
____
12
____
15
____
20 ns
t
CLZ
(1)
Chip Select to Output in Low-Z 4
____
4
____
4
____
4
____
ns
t
CHZ
(1)
Chip Deselect to Output in High-Z 05060708 ns
t
OE
Outp ut E nab le to Outp ut Val id
____
5
____
6
____
7
____
8ns
t
OLZ
(1)
Outp u t Enab le to Outp ut in Lo w-Z 0
____
0
____
0
____
0
____
ns
t
OHZ
(1)
Output Disable to Output in High-Z 05050507 ns
t
OH
Output Hold from Address Change 4
____
4
____
4
____
4
____
ns
WRITE CYCLE
t
WC
Write Cycle Time 10
____
12
____
15
____
20
____
ns
t
AW
Address Valid to End-of-Write 7
____
8
____
10
____
12
____
ns
t
CW
Chip Select to End-of-Write 7
____
8
____
10
____
12
____
ns
t
AS
Address Set-up Time 0
____
0
____
0
____
0
____
ns
t
WP
Write Pulse Width 7
____
8
____
10
____
12
____
ns
t
WR
Write Re co v ery Time 0
____
0
____
0
____
0
____
ns
t
DW
Data Valid to End-of-Write 5
____
6
____
7
____
9
____
ns
t
DH
Data Ho ld Time 0
____
0
____
0
____
0
____
ns
t
OW
(2)
Outp ut A ctiv e fro m E nd -o f-Wri te 3
____
3
____
3
____
4
____
ns
t
WHZ
(2)
Write Enable to Output in High-Z 05050508ns
3873 tbl 08
6.42
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges
5
NOTES:
1. WE is HIGH for Read Cycle.
2. Device is continuously selected, CS is LOW.
3. Address must be valid prior to or coincident with the later of CS transition LOW; otherwise tAA is the limiting parameter.
4. OE is LOW.
5. Transition is measured ±200mV from steady state.
Timing Wav eform of Read Cyc le No. 1(1)
Timing Wa vef orm of Read Cyc le No. 2(1, 2, 4)
ADDRESS
3873 drw 05
OE
CS
DATA
OUT
(5)
(5)
(5)
(5)
DATA
OUT
VALID
HIGH IMPEDANCE
t
AA
t
RC
t
OE
t
ACS
t
OLZ
t
CHZ
t
CLZ
(3)
t
OHZ
.
DATA
OUT
ADDRESS
3873 drw 06
t
RC
t
AA
t
OH
t
OH
DATA
OUT
VALIDPREVIOUS DATA
OUT
VALID
.
6
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges
Timing Wa vef orm of Write Cycle No . 1 (WE Controlled Timing)(1,2,4)
Timing Wa vef orm of Write Cyc le No. 2 (CS Controlled Timing)(1, 4)
NOTES:
1. A write occurs during the overlap of a LOW CS and a LOW WE.
2. OE is continuously HIGH. During a WE controlled write cycle with OE LOW, tWP must be greater than or equal to tWHZ + tDW to allow the I/O drivers to turn off and data to be
placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the minimum write pulse is the specified tWP.
3. During this period, I/O pins are in the output state, and input signals must not be applied.
4. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high impedance state. CS must be active during the tCW write period.
5. Transition is measured ±200mV from steady state.
ADDRESS
CS
WE
DATA
OUT
DATA
IN
3873 drw 07
(5)
(2)
(5) (5)
DATA
IN
VALID
HIGH IMPEDANCE
t
WC
t
AW
t
AS
t
WHZ
t
WP
t
CHZ
t
OW
t
DW
t
DH
t
WR
(3)(3)
.
CS
ADDRESS
DATA
IN
3873 drw 08
t
AW
t
WC
t
CW
t
AS
t
WR
t
DW
t
DH
DATA
IN
VALID
WE
(3)
.
6.42
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges
7
Ordering Information
SA
Power
XX
Speed
X
Package
TY
Y
PH
300-mil SOJ (SO32-2)
400-mil SOJ (SO32-3)
TSOP Type II (SO32-4)
10
12
15
20
Device
Type
Speed in nanoseconds
3873 drw 09
71V124
.
X
Process/
Temperature
Range
Blank
I
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)
X
G Restricted hazardous substance device
H
HCurrent generation die step optional
Blank First generation or current die step
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
Datasheet Document History
8
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit), Center Power & Ground Pinout Commercial and Industrial Temperature Ranges
CORPORATE HEADQUARTERS for SALES: for Tech Support:
6024 Silver Creek Valley Road 800-345-7015 or ipchelp@idt.com
San Jose, CA 95138 408-284-8200 800-345-7015
fax: 408-284-2775
www.idt.com
11/22/99 Updated to new format
Pg. 1–4, 7 Added Industrial Temperature range offerings
Pg. 2 Added Recommended Operating Temperature and Supply Voltage table
Pg. 6 Revised footnotes on Write Cycle No. 1 diagram
Pg. 8 Added Datasheet Document History
08/30/00 Pg. 3 Tighten ICC and ISB
Pg. 4 Tighten AC Characteristics tOHZ, tOW and tWHZ
08/22/01 Pg. 7 Removed footnote "400-mil SOJ package only offered in 10ns and 12ns speed grade"
11/30/03 Pg. 1,3,7 Added Industrial temperature offering 10ns speed grade
01/30/04 Pg. 7 Added "Restricted hazardous substance device" to ordering information.
2/14/07 Pg. 7 Added H generation die step to data sheet ordering information.
10/13/08 Pg. 7 removed "IDT" form the orderable part number
