co C74HC4518AP/AF TC74HC4520AP/AF TC74HC4518AP/AF DUAL BCD COUNTER TC74HC4520AP/AF DUAL 4-BIT BINALY COUNTER [ The TC?74HC4518A and TC74HC4520A are high speed CMOS DUAL BCD/4-BIT BINARY COUNTER | fabricated with silicon gale CMOS technology. : <S They achieve the high speed operation similar to . 1 q equivalent LSTTL while maintaining the CMOS low power 16 Noy i tv i dissipation. vi Since the TC74HC4518A and the TC74I1C4520A each } 1 contain two independent counter circuits in one package, P 1 counting or frequency division of two BCI) digits or eight binary bits can be achieved with one device. The counters 16 6 are reset to O (Q0~Q3 low) by setting the CLEAR iuput ait high regardless of the other inputs. pout Counting occurs on the positive going (rising edge) transition of CLOCK if CE is high or the negative going F (falling edge) transition of CLOCK if CE is low. All inputs are equipped with protection circuits against static discharge or transient excess voltage. PIN ASSIGNMENT U a FEATURES: reLock 1 (] [J 6 vee * High Speed streets = Aryy SOMH2(Typ. Jat Vee 75V 1CE 2 C a 15 2CLEAR: * Low Power Dissipation Icp 74M A(Max. Jat Ta-25T 100.3 7 [] 14 203 * High Noise Immunity sree Vani Va 28% Vee (Min. ) 1016 r) 13 202 Output Drive Capability --+r+-++-- 10 LSTTL Loads 125 A) iz 201 * Symmetrical Output Impedance -* | Igy] =Ig, =4mA (Min. ) * Balanced Propagation Delays *--*" tony > tpt 103 6 C [] 11 200 Wide Operating Voltage Range Voc (opr)=2V~6V LICLEAR ? C [] 10 2ceE Pin and Function Compatible with 4518B/4520B i enpe (] T] 9 2CLOCK (TOP VIEW) IEC LOGIC SYMBOL TC74HC4518A TC74HC45204 CTRDIVIO CTR4 icLock + >1 of 2 100 1CLOCK +] >1 ot 100 1CE aa) pt +4 101 1ce 2 * | 14 3Q1 IcLEAR Jet ") [ 102 IcLEAR erso "! L& 102 L193 LL& 103 2cLock 24 +". 200 2cLock 4 L 200 2CE mfp |? 201 2CE mp 12 201 2CLEAR #4 I-13. 202 2CLEAR 34 13 202 L 4 993 L*. 203 TC74HC4518AP/AF 4520AP/AF-1 845TRUTH TABLE INPUT Loc CE CLEAR FUNCTION _- H L INCREMENT COUNTER L wh L INCREMENT COUNTER e xX L NO CHANGE Xx 4 L NO CHANGE - L L NO CHANGE H he L NO CHANGE x xX H 00 THRU O3=L X:Dont Care TC74HC4518AP/AF 4520AP/AF-2 846TIMING CHART TCI4HC4518A CLOCK CLEAR CE Qo Qi Q2 0: 1 Anohannnnch. | 2| 3] 4 5) 6) 7: 8] 8] 8) 8] 0 to TC74HC4520A CLOCK CLEAR CE Qo Qi Q2 Q3 3] 4) 51 6] 7) 8 S10lat[i4)47 [12] 13] 14) 18; 0) 1 TC74HC4518AP/AF 4520AP/AF-3 847LOGIC DIAGRAM TC74HC4518A CE CLOCK CLEAR TC74HC4520A cE CLOCK CLEAR TC74HC4518AP/AF 4520AP/AF-4 848ABSOLUTE MAXIMUM RATINGS TPARAME? ER /SYMBOL VALUE UNIT Vec ~0.5~7 Vv *500mW in the range of Ta= mG 5 ~V-=0.5 Vv ~40C~ 65C, From Ta=65C Jo IN fe : to 85C a derating factor of Vaut 0.5 ~Vee+0.5 V _ | -1WmW-" shall be applied ; lik __. +29 m A 7 unti, JOOmW. | lo +20 mA Lys +25 mA Tee +50 mA Jissipalon Pp 500( DIP) */180(SOIC) mW ; Storage Vermperature stg -65 ~150 C Tam peraiie lsec T, 300 C RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL VALUE UNIT ty Veltage Vee 2~6 Vv (> Vix 0~ Voc v rut Voltage Vout o~ Voc Vv Operating Temperature Topr ~40 ~ 85 c | 0 ~ 10006 Vpc-=2.0V) iInpat Rise and Fall Time | te, te O0~ 5000 Voc =4.5V) ns 1 i O~ 400(Vee=6.0V) DC ELECTRICAL CHARACTERISTICS mien evar - : Ta=25C Ta=-40 ~85 |,, ANTM ET oVApan r r _ PARAMETER .SYMb0L TEST CONDITION Woo] MI TYP. [MAX.| MIN. MAX. UNIT | High Level 2.0 - bo 1.5 = | input Voltage Vi 4.5 ~ - 3.15 - Vv | . 6.0 = - 4.2 = 1 Tne 2.0 ~ a) - 0.5 Tao Volage YU , 4.5 - 5) - | 135] p PMN Snags | 6.0 ~ Bi 18 | | | 2.0 i. 2.0 - 1,9 - i Tigh-- Level . Vin = p70 =20u A: 4.5 4. 4.5 4.4 ~ , Ourput Voltage Vou | VyyorVy 6.0 ae : 6.0 7 5.9 fT v ie Woy =-4 mA] 4.5 4, ; 4.31 - 4.13 - oo. __, ci. oy =5,2mAl 6.0 5. i 5. 80 = 5. 63 =} ' 2.0 0,0 0.1 - i = 5 = ! | ow = Level lve (toe 20 WA] 45 00 | or = 7 or Output Voltage Vo. ViyorV 6.0 0.0 0.1 0.1 V pT To =a mA] 45 O17 | 0.26, = 0.33 es Iq. =5,2mA | 6.0 0.18 | 0,26 = 0,33 | [ Tao: Leakage Curreti Ins Vix =Voc or GND 6.0 - +0.1 = +1.0 A i &iescent Sepply Cucrest Ire Vix =Ver or GND 6.0 - 4,0 - 40.0 Ht TC74HC4518AP/AF 4520AP/AF-5 849TIMING REQUIREMENTS (Input tr=th=6ns) , : AANA ! Ta=25C Ta=~ 40 ~85C \, i S ow ay 99. UN PARAMETER SYMBOL, TEST CONDITION Va TYE. LIMIT LIMIT UNIT Minimum Pulse Width tye, 20 iS 95 (CK, CE) i ten. 4.5 15 19 | _ NE 1 6.0 13, io 9 7 5 Minimum Pulse Width as 7 i is ns WaT ne t s (CLEAR) 60 - 13 16 2.0 | - a0 60 Minimum Removal Time | trem 4.5 - 10 12 6.0 = | 9 Uy 2.0 | - | 6 4 Clock Frequency ff 4.5: - i 30 24 MHz 6.0 8s 28 AC ELECTRICAL CHARACTERISTICS(C, =15pF.Voc=5V,Ta=25C) PARAMETER SYMBOL! TEST CONDITION MIN. TYP MAX. |UNIT Output Transition Time TLE 4 8 {THL Propagation Delay Time | typ ! _ - - (CK, CE-Qn) tou | P17 27 ns Propagation Delay Time _ (CLEAR-Qn) tpHL 45 25 Maximum Clock Frequency | fviax 1 33 95 = MHz AC ELECTRICAL CHARACTERISTICS(C, =50pF, Input t-=t;=6ns) a : Ta=25C [Ta=40 ~85C | Ss T PARAMETER | SYMBOL TEST CONDITION Vat MIN- | TYP. >MAX. MIN. MAX. UNIT t 2.0 ~ 800: 7 95 ; Output Transition Time ale 4.5 - rn 19 | TH 6.0 = 7 13 i = 16 oo _ Propagation Delay Time | toy 2. 9 _ 72 160 | Z 200 (CK, CE-Qn) ton 4.5 22 32. C; 40 ns , 6.0 = 18 27} 34 Propagation Delay Time t ee 7 - " - pHL 5: (CLEAR-Qn) | 6.0 _ 16 96 _ 33 . ! 90: 6 23 - 4 - N 1 . ' 1 Maximum Clock | pgs | 3ioa0 i st | - | a) = [Mme aes 6.0 | 35 | 69 - 98 i - Input Capacitance Ci. 5 10 - +4 10 Power Dissipation Copp (1) _TC7T4HC4518A 38 = = =| pF Capacitance PD TC74HC4520A c - 32 = = 7: Note(1) Crp is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: Iccepe= poe Voce fin tl oo /2(per cireuit) TC74HC4518AP/AF 4520AP/AF-6 850