1
2
3
4
8
7
6
5
ILIM
FB
VFF
DISCH
VDD
OUT
GND
RC
UCC25705-Q1, UCC25706-Q1
www.ti.com
SLUSAI1 MAY 2011
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
Check for Samples: UCC25705-Q1,UCC25706-Q1
1FEATURES Smallest Footprint of the 8-pin MSOP
Package Minimizes Board Area and Height
Qualified for Automotive Applications
Greater Than 4-MHz Operation D PACKAGE
(TOP VIEW)
Integrated Oscillator / Voltage Feed Forward
Compensation
>4:1 Input Voltage Range
25-ns Current Limit Delay
Programmable Maximum Duty Cycle Clamp
Optocoupler Interface
50-µA Start-Up Current
4.2-mA Operating Current at 1 MHz
Latch-Up Exceeds 100mA per JESD78 Class I
DESCRIPTION
The UCC25705-Q1 and UCC25706-Q1 devices are 8-pin voltage mode primary side controllers with fast
over-current protection. These devices are used as core high-speed building blocks in high performance isolated
and non-isolated power converters.
UCC25705-Q1/UCC25706-Q1 devices feature a high speed oscillator with integrated feed-forward compensation
for improved converter performance. A typical current sense to output delay time of 25 ns provides fast response
to overload conditions. The IC also provides an accurate programmable maximum duty cycle clamp for increased
protection which can also be disabled for the oscillator to run at maximum possible duty cycle.
Two UVLO options are offered. The UCC25705-Q1 with lower turn-on voltage is intended for dc-to-dc converters
while the higher turn-on voltage and the wider UVLO range of the UCC25706-Q1 is better suited for offline
applications.
The UCC2570x-Q1 family is offered in an 8-pin SOIC (D) package.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright ©2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
VDD
OUT
GND
RC
ILIM
VFF
DISCH
UCC2570x-Q1
+
--
V
+
OUT
VIN
SOFT
START
CIRCUIT
4
5
3
6
8
7
1
TPS2829
--
FB 2
MODE =1
FET DRIVER
UCC25705-Q1, UCC25706-Q1
SLUSAI1 MAY 2011
www.ti.com
Figure 1. TYPICAL APPLICATION SCHEMATIC
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature (unless otherwise noted)(1)(2)
VALUE UNIT
Supply voltage 15 V
Input voltage (VFF,RC,ILIM) 7 V
Input voltage (FB) 15 V
Input current (DISCH) 1 mA
Output current (OUT) dc ±20 mA
Storage temperature, Tstg 65 to 150 °C
Junction temperature, TJ55 to 150 °C
Lead temperature (soldering, 10 sec) 300 °C
(1) Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditionsis not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. Consult ti.com/packaging for more
information.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted) VALUE UNIT
TAOperating ambient temperature 40 to 105 °C
ORDERING INFORMATION TABLE TOP-SIDE
TAPACKAGE ORDERABLE PART NUMBER MARKING
-40°C to 125°C SOIC-8 D Reel of 2500 UCC25706QDRQ1 25706Q
-40°C to 125°C SOIC-8 D Reel of 2500 UCC25705QDRQ1 Preview
2Copyright ©2011, Texas Instruments Incorporated
UCC25705-Q1, UCC25706-Q1
www.ti.com
SLUSAI1 MAY 2011
ESD RATINGS TABLE
PARAMETER VALUE UNIT
Human Body Model (HBM) 1000 V
ESD Charged- Device Model (CDM) 1000 V
Machine Model ( MM) 200 V
Copyright ©2011, Texas Instruments Incorporated 3
UCC25705-Q1, UCC25706-Q1
SLUSAI1 MAY 2011
www.ti.com
ELECTRICAL CHARACTERISTICS
VDD = 11 V, VIN = 30 V, RT= 47 k, RDISCH = 400 k, RFF = 14 k, CT= 220 pF, CVDD = 0.1 µF, and no load on the outputs, TA=
-40°to 125°C, (unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
UVLO section (UCCx5705)
Start threshold 8.0 8.8 9.6 V
Stop threshold 7.4 8.2 9.0 V
Hysteresis 0.3 0.6 1.0 V
UVLO section (UCCx5706)
Start threshold 11.2 12.0 12.8 V
Stop threshold 7.2 8.0 8.8 V
Hysteresis 3.2 4.0 4.5 V
Supply Current Section
Start-up current VDD = UVLO start 1 V, VDD comparator off 30 90 µA
IDD active VDD comparator on, oscillator running at 1 MHz 4.2 5.0 mA
Line Sense Section
Low line comparator threshold 0.95 1.00 1.15 V
Input bias current (VFF) 100 100 nA
Oscillator Section
Frequency VFF = 1.2 V to 4.8 V 0.9 1.0 1.1 MHz
VFF = 1.2 V, See (1) 1.2 V
CT peak voltage VFF = 4.8 V, See (1) 4.8 V
CT valley voltage See (1) 0 V
Current Limit Section
Input bias current 0.2 0.2 1µA
Current limit threshold 180 200 220 mV
Propagation delay, ILIM to OUT 50 mV overdrive 25 35 ns
Pulse Width Modulator Section
FB input impedance VFB = 3 V 30 50 90 kΩ
Minimum duty cycle VFB <2 V 0 %
VFB = VDD, FOSC = 1 MHz 70 75 80 %
Maximum duty cycle VDISCH = 0 V, FOSC = 1 MHz 93 %
PWM gain VFF = 2.5 V, MODE = 1 12 %/V
Propagation delay, PWM to OUT 65 130 ns
Output Section
VOH IOUT =5 mA, VDD output 0.3 0.6 V
VOL IOUT = 5 mA 0.15 0.4 V
Rise time CLOAD = 50 pF 10 25 ns
Fall time CLOAD = 50 pF 10 25 ns
(1) Specified by design.
4Copyright ©2011, Texas Instruments Incorporated
FF
FF DISCH
2 R
VFF VIN
2 R R
æ ö
´
» ´ ç ÷
´ +
è ø
UCC25705-Q1, UCC25706-Q1
www.ti.com
SLUSAI1 MAY 2011
PIN DESCRIPTIONS
DISCH: A resistor to VIN sets the oscillator discharge current programming a maximum duty cycle. When
grounded, an internal comparator switches the oscillator to a quick discharge mode. A small 100-pF capacitor
between DISCH and GND may reduce oscillator jitter without impacting feed-forward performance. IDISCH must
be between 25 µA and 250 µA over the entire VIN range.
FB: Input to the PWM comparator. This pin is intended to interface with an optocoupler. Input impedance is
50-kΩtypical.
GND: Ground return pin.
ILIM:Provides a pulse-by-pulse current limit by terminating the PWM pulse when the input is above 200 mV. This
provides a high speed (25 ns typical) path to reset the PWM latch, allowing for a pulse-by-pulse current limit.
OUT: The output is intended to drive an external FET driver or other high impedance circuits, but is not intended
to directly drive a power MOSFET. This improves the controllers noise immunity. The output resistance of the
PWM controller, typically 60 Ωpull-up and 30 Ωpull-down, will result in excessive rise and fall times if a power
MOSFET is directly driven at the speeds for which the UCC2570x-Q1 is optimized.
RC: The oscillator can be configured to provide a maximum duty cycle clamp. In this mode the on-time is set by
RT and CT, while the off-time is set by RDISCH and CT.Since the voltage ramp on CTis proportional to VIN,
feed-forward action is obtained. Since the peak oscillator voltage is also proportional to VIN, constant frequency
operation is maintained over the full power supply input range. When theDISCH pin is grounded, the duty cycle
clamp is disabled. The RC pin then provides a low impedance path to ground CT during the off time.
VDD:Power supply pin. This pin should be bypassed with a 0.1-µF capacitor for proper operation. The
undervoltage lockout function of the UCC2570x-Q1 allows for a low current startupmode and ensures that all
circuits become active in a known state. The UVLO thresholds on the UCC25705-Q1 are appropriate for a
dc-to-dc converter application. The wider UVLO hysteresis of the UCC25706-Q1 (typically 4 V) is optimized for a
bootstrap startup mode from a high impedance source.
VFF:The feed-forward pin provides the controllerwith a voltage proportional to the power supply input voltage.
When the oscillator is providing a duty cycle clamp, a current of 2 ×IDISCH is sourced from the VFF pin. A single
resistor RFF between VFF and GND then set VFF to:
When the DISCH pin is grounded and the duty cycle clamp is not used, the internal current source is disabled
and a resistor divider from VIN is used to set VFF. In either case, when the voltage on VFF is less than 1.0 V,
both the output and oscillator are disabled.
Copyright ©2011, Texas Instruments Incorporated 5
7
2
58
OUT
VDD
6 GND
S Q
Q
RD
RD
RD
1 ILIM
200 mV
CURRENT LIMIT
1 pF20 k
30 k
+
0.7 V PWM
SQ
QRD
CLK
PWM
LATCH
100 mV
2 * I (MODE = 1)
0 (MODE = 0)
LOW LINE
1.0 V
30 *I(MODE=1)
80 (MODE =0)
I
RC
VFF
FB
3
DISCH 4
50 mV
VDD
MODE
UCC25705-Q1 (8.8V/8V)
UCC25706-Q1 (12V/8V)
UVLO
+
--
+
--
+
--
+
--
+
--
+
--
UCC25705-Q1, UCC25706-Q1
SLUSAI1 MAY 2011
www.ti.com
Figure 2. Block Diagram
FUNCTIONAL DESCRIPTION
Oscillator and PWM
The oscillator can be programmed to provide a duty cycle clamp or be configured to run at the maximum
possible duty cycle.
The PWM latch is set during the oscillator discharge and is reset by the PWM comparator when the CTwaveform
is greater than the feedback voltage. The voltage at the FB pin is attenuated before it is applied to the PWM
comparator. The oscillator ramp is shifted by approximately 0.65-V at room temperature at the PWM comparator.
The offset has a temperature coefficient of approximately -2 mV/°C.
The ILIM comparator adds a pulse by pulse current limit by resetting the PWM latch when VILIM >200 mV. The
PWM latch is also reset by a low line condition (VFF <1.0 V).
All reset conditions are dominant; asserting any output will force a zero duty cycle output.
Oscillator With Duty Cycle Clamp (MODE = 1)
The timing capacitor CTis charged from ground to VFF through RT. The discharge path is through an on-chip
current sink that has a value of 30 ×IDISCH, where IDISCH is the current through the external resistor RDISCH. Since
the charge and discharge currents are both proportional to VIN, their ratio, and the maximum duty cycle remains
constant as VIN varies.
6Copyright ©2011, Texas Instruments Incorporated
45
RC DI SCH
3
VFF
RFF
2 * I DISCH
RDISCH
RT
CT
VIN
30 *I DISCH
VDD
IDISCH
FF FF
ON T T
IN DISCH
V 2 R
T R C where V R
´
= a´ ´ a = »
( )
T T DISCH
OFF
T DISCH
C R ×R
T
30 R -R
´
= a´ ´
1DISCH
T T
T DISCH
1 1
fR
R C
30 R -R
= ´
a´ ´ +´
UCC25705-Q1, UCC25706-Q1
www.ti.com
SLUSAI1 MAY 2011
Figure 3. Duty Cycle Clamp (MODE = 1)
The on-time is approximately:
The off-time is:
The frequency is:
The maximum duty cycle is:
Copyright ©2011, Texas Instruments Incorporated 7
FF(min)
18
V = =1.20 V
15
IN(min) ON(max)
T
FF(min) T
V T
RV C
´
=´
T
DISCH
FF(min)
T T
IN(min)
OFF(min)
30 R
RVR C
V
1T
´
=æ ö
æ ö´ ´
ç ÷
ç ÷
è ø
ç ÷
+ç ÷
ç ÷
è ø
( )
FF(min) DISCH
FF
IN(min)
V R
R2 V 1
´
=´ -
UCC25705-Q1, UCC25706-Q1
SLUSAI1 MAY 2011
www.ti.com
Component Selection for Oscillator With Duty Cycle Clamp (MODE = 1)
For a power converter with the following specifications:
VIN(min) = 18 V
VIN(max) = 75 V
VIN(shutdown) = 15 V
FOSC = 1 MHz
MAX = 0.78 at VIN(min)
In this mode, the on-time is approximately:
TON(max) = 780 ns
TOFF(min) = 220 ns
1. Pick CT= 220 pF.
2. Calculate RT.
RT= 51.1 kΩ
3. RDISCH
RDISCH = 383 kΩ.
IDISCH must be between 25 µA and 250 µA over the entire VIN range.
With the calculated values, IDISCH ranges from 44 µA to 193 µA, within the allowable range. If IDISCH is too
high, CTmust be decreased.
4. RFF
The nearest 1% standard value to the calculated value is 13.7 k.
8Copyright ©2011, Texas Instruments Incorporated
45
RC DISCH
3
VFF
RT
CT
VIN
FF
ON T T
IN
V
T R C where V
= a´ ´ a =
T T
1
fR C 75ns
=a´ ´ +
UCC25705-Q1, UCC25706-Q1
www.ti.com
SLUSAI1 MAY 2011
Oscillator Without Duty Cyle Clamp (MODE = 0)
In this mode, the timing capacitor is discharged through a low impedance directly to ground. The DISCH pin is
externally grounded. A comparator connected to DISCH senses the ground connection and disables both the
discharge current source and VFF current source. A resistor divider is now required to set VFF.
Figure 4. Ocsillator Without Clamp (MODE = 0)
In this mode, the on-time is approximately:
The off-time is: TOFF 75 ns
The frequency is:
Copyright ©2011, Texas Instruments Incorporated 9
FF(min)
18
V 1.2V
15
= =
IN(min)
FF(min) OSC
T
T
V 1 75ns
V F
RC
æ ö
´ -
ç ÷
è ø
=
UCC25705-Q1, UCC25706-Q1
SLUSAI1 MAY 2011
www.ti.com
Component Selection for Oscillator Without Duty Cycle Clamp (MODE = 0)
For a power converter with the following specifications:
VIN(min) = 18 V
VIN(max) = 75 V
VIN(shutdown) = 15 V
FOSC = 1 MHz
With these specifications,
1. Pick CT= 220 pF
2. Calculate RT.
10 Copyright ©2011, Texas Instruments Incorporated
-50 -25 0 25 50 75 100 125
Temperature
7
8
9
10
11
12
13
°C
UVLO -- Thresholds -- V
- 50 25 0 2 5 50 75 100 125
Temperature
8.0
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
°C
UVLO -- Thresholds -- V
-
- 50 -25 025 50 75 100 125
Temperature
3.8
4.0
4.2
4.3
4.5
4.7
4.8
3.9
4.1
4.4
4.6
°C
IDD -- mA
-50 -25 0 25 50 75 100 125
Temperature
0.65
0.97
0.99
1.00
1.02
1.04
1.05
0.96
0.98
1.01
1.03
°C
Low-Line Threshold -- V
UCC25705-Q1, UCC25706-Q1
www.ti.com
SLUSAI1 MAY 2011
TYPICAL CHARACTERISTICS
UCC25705-Q1 UVLO THRESHOLDS UCC25706-Q1 UVLO THRESHOLDS
vs vs
TEMPERATURE TEMPERATURE
Figure 5. Figure 6.
OPERATING CURRENT (AT 1MHz) LOW-LINE THRESHOLD
vs vs
TEMPERATURE TEMPERATURE
Figure 7. Figure 8.
Copyright ©2011, Texas Instruments Incorporated 11
-50 -25 25 50 75 100 125
Temperature
0.90
1.00
1.10
0.95
1.05
Oscillator Frequency -- MHz
°C
0
- 50 -25 0 25 50 75 100 125
Temperature
68
76
82
70
78
72
74
80
°C
Programmable Maximum Duty Cycle -- %
-50 -25 025 50 75 100 125
Temperature
180
200
220
185
205
190
195
210
215
°C
Current-Limit Threshold -- mV
- 50 -25 0 25 50 75 100 125
Temperature
15
25
35
17
29
19
23
31
33
21
27
°C
Current-Limit PropDelay -- ns
UCC25705-Q1, UCC25706-Q1
SLUSAI1 MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS
PROGRAMMABLE MAXIMUM
OSCILLATOR FREQUENCY DUTY CYCLE
vs vs
TEMPERATURE TEMPERATURE
Figure 9. Figure 10.
CURRENT-LIMIT THRESHOLD CURRENT-LIMIT PROP DELAY
vs vs
TEMPERATURE TEMPERATURE
Figure 11. Figure 12.
12 Copyright ©2011, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com 7-Apr-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
UCC25706QDRQ1 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UCC25706-Q1 :
Catalog: UCC25706
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UCC25706QDRQ1 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UCC25706QDRQ1 SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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