BD63876EFV-E2 - Rohm Semiconductor

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www.rohm.com 2012.02 - Rev.

Stepping Motor Driver series

High Performance, High Reliability

36V Series Stepping Motor Drivers

BD6387xEFV Series

●Description

BD6387xEFV series are the high-grade type that provides the highest function and highest reliance in the ROHM stepping

motor driver series.

As for its basic function, it is a low power consumption bipolar PWM constant current-drive driver with power

BD63877/BD63875/BD63873EFV are CLK-IN type drivers and BD63876/BD63874/BD63872EFV are PARALLEL-IN type

drivers. There are excitation modes of FULL STEP & HALF STEP (2 kinds), QUARTER STEP mode, and for current decay

mode, the ratio of FAST DECAY & SLOW DECAY can be freely set, so the optimum control conditions for every motor can

be realized. In addition, being able to drive with one system of power supply makes contribution to the set design’s getting

easy.

●Feature

1) Single power supply input (rated voltage of 36V)

2) Rated output current:(DC) 1.0A, 1.5A, 2.0A

3) Low ON resistance DMOS output

4) CLK-IN drive mode (BD63877/63875/63873EFV)

5) PARALLEL-IN drive mode (BD63876/63874/63872EFV)

6) PWM constant current control (other oscillation)

7) Built-in spike noise cancel function (external noise filter is unnecessary)

8) Full-, half (two kinds)-, quarter-step functionality

9) Current decay mode switching function (linearly variable FAST/SLOW DECAY ratio)

10) Normal rotation & reverse rotation switching function (BD63877/63875/63873EFV)

11) Power save function

12) Built-in logic input pull-down resistor

13) Power-on reset function (BD63877/63875/63873EFV)

14) Thermal shutdown circuit (TSD)

15) Over current protection circuit (OCP)

16) Under voltage lock out circuit (UVLO)

17) Over voltage lock out circuit (OVLO)

18) Ghost Supply Prevention (protects against malfunction when power supply is disconnected)

19) Electrostatic discharge: 8kV (HBM specification)

20) Adjacent pins short protection

21) Inverted mounting protection

22) Microminiature, ultra-thin and high heat-radiation (exposed metal type) HTSSOP-B28 package

23) Pin-compatible line-up (BD63877/63875/63873EFV, BD63876/63874/63872EFV)

●Application

PPC, multi-function printer, laser beam printer, ink jet printer, monitoring camera, WEB camera, sewing machine, photo

printer, FAX, scanner, mini printer, toy, and robot etc.

No.12009EAT10

Technical Note

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BD6387xEFV Series

www.rohm.com 2012.02 - Rev.

●Absolute maximum ratings(Ta=25℃)

Item Symbol BD63877/63876EFV BD63875/63874EFV BD63873/63872EFV Unit

Supply voltage VCC1,2 -0.2～+36.0 V

Power dissipation Pd 1.45※1 W

4.70※2 W

Input voltage for control pin VIN -0.2～+5.5 V

RNF maximum voltage VRNF 0.7 V

Maximum output current IOUT 2.0※3 1.5※3 1.0※3 A/phase

Maximum output current (PEAK)※4 IOUTPEAK 2.5※3 2.0※3 1.5※3 A/phase

Operating temperature range Topr -25～+85 ℃

Storage temperature range Tstg -55～+150 ℃

Junction temperature Tjmax +150 ℃

※1 70mm×70mm×1.6mm glass epoxy board. Derating in done at 11.6mW/℃ for operating above Ta=25℃.

※2 4-layer recommended board. Derating in done at 37.6mW/℃ for operating above Ta=25℃.

※3 Do not, however exceed Pd, ASO and Tjmax=150℃.

※4 Pulse width tw≦1ms, duty 20%.

●Operating conditions(Ta= -25～+85℃)

Item Symbol BD63877/63876EFV BD63875/63874EFV BD63873/63872EFV Unit

Supply voltage VCC1,2 19~28 V

MaximumOutput current (DC) IOUT 1.7※5 1.2※5 0.7※5 A/phase

※5 Do not, however exceed Pd, ASO and .

●Electrical characteristics (Unless otherwise specified Ta=25℃, VCC1,2=24V)

Item Symbol Limit Unit Conditions

Min. Typ. Max.

Whole

Circuit current at standby ICCST - 1.0 2.5 mA PS=L

Circuit current ICC - 2.5 5.0 mA PS=H, VREF=3V

Control input

H level input voltage VINH 2.0 - - V

L level input voltage VINL - - 0.8 V

H level input current IINH 35 50 100 μA VIN=5V

L level input current IINL -10 0 - μA VIN=0V

Output (OUT1A, OUT1B, OUT2A, OUT2B)

Output ON resistance (BD63877/63876EFV) RON - 0.65 0.85 Ω IOUT=1.5A,

Sum of upper and lower

Output ON resistance (BD63875/63874EFV) RON - 1.00 1.30 Ω IOUT=1.0A,

Sum of upper and lower

Output ON resistance (BD63873/63872EFV) RON - 1.90 2.47 Ω IOUT=0.5A,

Sum of upper and lower

Output leak current ILEAK - - 10 μA

Current control

RNFXS input current IRNFS -2.0 -0.1 - μA RNFXS=0V

RNFX input current IRNF -40 -20 - μA RNFX=0V

VREF input current IVREF -2.0 -0.1 - μA VREF=0V

VREF input voltage range VREF 0 - 3.0 V

MTH input current IMTH -2.0 -0.1 - μA MTH=0V

MTH input voltage range VMTH 0 - 3.5 V

Minimum on time (Blank time) tONMIN 0.3 0.8 1.5 μs C=1000pF, R=39kΩ

BD63877EFV/63875EFV/63873EFV

Comparator threshold VCTH 0.57 0.60 0.63 V VREF=3V

BD63876EFV/63874EFV/63872EFV

Comparator threshold 100% VCTH10

0 0.57 0.60 0.63 V VREF=3V, (I0X,I1X)=(L,L)

Comparator threshold 67% VCTH67 0.38 0.40 0.42 V VREF=3V,

(I0X,I1X)=(H,L)

Comparator threshold 33% VCTH33 0.18 0.20 0.22 V VREF=3V,

(I0X,I1X)=(L,H)

Technical Note

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BD6387xEFV Series

www.rohm.com 2012.02 - Rev.

●Terminal function and Application circuit diagram

CLK-IN type (BD63877/63875/63873EFV)

No. Pin name Function Pin

No. Pin name Function

1 GND Ground terminal 15 CLK

Clock input terminal for advancing the

electrical angle.

2 OUT1B H bridge output terminal 16 CW_CCW Motor rotating direction setting terminal

3 RNF1

Connection terminal of resistor for output

current detection 17 TEST

Terminal for testing

(used by connecting with GND)

4 RNF1S Input terminal of current limit comparator 18 MODE0 Motor excitation mode setting terminal

5 OUT1A H bridge output terminal 19 MODE1 Motor excitation mode setting terminal

6 NC Non connection 20 ENABLE Power supply terminal

7 VCC1 Power supply terminal 21 NC Non connection

8 NC Non connection 22 VCC2 Power supply terminal

9 GND Ground terminal 23 NC Non connection

10 CR

Connection terminal of CR for setting

chopping frequency 24 OUT2A

H bridge output terminal

11 NC Non connection 25 RNF2S Input terminal of current limit comparator

12 MTH Current decay mode setting terminal 26 RNF2

Connection terminal of resistor for output

current detection

13 VREF Output current value setting terminal 27 OUT2B H bridge output terminal

14 PS Power save terminal 28 NC Non connection

Fig.1Block diagram & Application circuit diagram of BD63877EFV/BD63875EFV/BD63873EFV

0.2Ω

Terminal for testing.

Connect to GND.

Resistor for current. detecting.

Setting range is

0.1Ω～0.3Ω.

Refer to P.7 for detail.

39kΩ 1000pF

Set the chopping

frequency.

Setting range is

C:470pF～1500pF

R:10kΩ～200kΩ

Refer to P.8, 9 for detail.

Bypass capacitor.

Setting range is

100uF～470uF(electrolytic)

0.01uF～0.1uF(multilayer ceramic etc.)

Refer to P.7 for detail.

Be sure to short VCC1 & VCC2.

Resistor for current. detecting.

Setting range is

0.1Ω～0.3Ω.

Refer to P.7 for detail.

Predriver

7VCC1

Blank time

PWM control

Translator

2bit DAC

TSD

UVLO

Regulator

RESET

9GND

12 MTH

14 PS

MODE0

MODE1

CW_CCW

ENABLE

VREF 13

2OUT1B

5OUT1A

3RNF1

22 VCC2

24 OUT2A

1GND

27 OUT2B

26 RNF2

TEST

Control logic

Mix decay

control

＋

－

＋

－

＋

－

OCP

OSC

RNF1S

RNF2S

OVLO

RNF1S

RNF2S 100uF 0.1uF

Set the output currenet.

Input by resistor divison.

Refer to P.8 for detail.

Set the current decay mode.

①SLOW DECAY

⇒Connect to GND.

②MIX DECAY

⇒Input by resistor divison.

Refer to P.8, 10 for detail.

Logic input terminal.

Refer to P.6 for detail. Power save terminal

Refer to P.6 for detail.

Technical Note

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BD6387xEFV Series

www.rohm.com 2012.02 - Rev.

PARALLEL-IN type (BD63876/63874/63872EFV)

No. Pin name Function Pin

No. Pin name Function

1 GND Ground terminal 15 PHASE1

Phase selection terminal

2 OUT1B H bridge output terminal 16 I01 VREF division ratio setting terminal

3 RNF1

Connection terminal of resistor for output

current detection 17 I11

VREF division ratio setting terminal

4 RNF1S Input terminal of current limit comparator 18 PHASE2 Phase selection pin

5 OUT1A H bridge output terminal 19 I02

VREF division ratio setting terminal

6 NC Non connection 20 I12

VREF division ratio setting terminal

7 VCC1 Power supply terminal 21 NC Non connection

8 NC Non connection 22 VCC2 Power supply terminal

9 GND Ground terminal 23 NC Non connection

10 CR

Connection terminal of CR for setting

chopping frequency 24 OUT2A H bridge output terminal

11 NC Non connection 25 RNF2S Input terminal of current limit comparator

12 MTH Current decay mode setting terminal 26 RNF2

Connection terminal of resistor for output

current detection

13 VREF Output current value setting terminal 27 OUT2B H bridge output terminal

14 PS Power save terminal 28 NC Non connection

Fig.2Block diagram & Application circuit diagram of BD63876FV/BD63874FV/BD63872FV

0.2Ω

39kΩ 1000pF

Predriver

Blank time

PWM control

2bit DAC

TSD

UVLO

Regulator

14 PS

PHASE1

PHASE2

2OUT1B

5OUT1A

3RNF1

22 VCC2

24 OUT2A

1GND

27 OUT2B

26 RNF2

Control logic

Mix decay

control

＋

－

＋

－

＋

－

OCP

OSC

RNF1S

RNF2S

OVLO

RNF1S

RNF2S 100uF 0.1uF

Resistor for current. detecting.

Setting range is

0.1Ω～0.3Ω.

Refer to P.7 for detail.

Set the chopping

frequency.

Setting range is

C:470pF～1500pF

R:10kΩ～200kΩ

です。

Rf t

P8 9

fdtil

Bypass capacitor.

Setting range is

100uF～470uF(electrolytic)

0.01uF～0.1uF(multilayer ceramic etc.)

Refer to P.7 for detail.

Be sure to short VCC1 & VCC2.

Resistor for current. detecting.

Setting range is

0.1Ω～0.3Ω.

Refer to P.7 for detail.

Set the output currenet.

Input by resistor divison.

Refer to P.8 for detail.

Set the current decay mode.

①SLOW DECAY

⇒Connect to GND.

②MIX DECAY

⇒Input by resistor divison.

Refer to P.8, 10 for detail.

Logic input terminal.

Refer to P.7 for detail. Power save terminal

Refer to P.7 for detail.

I01

I11

I02

VREF 13

12 MTH

9GND

7VCC1

20 I12

Technical Note

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BD6387xEFV Series

www.rohm.com 2012.02 - Rev.

●Points to notice for terminal description

○CLK／Clock input terminal for advancing the electrical angle(BD63877/BD63875/BD63873EFV)

CLK is reflected at rising edge. The Electrical angle advances by one for each CLK input.

Motor’s misstep will occur if noise is picked up at the CLK terminal, so please design the pattern in such a way that

there is no noise plunging.

○MODE0,MODE1／Motor excitation mode setting terminal (BD63877/BD63875/BD63873EFV)

Set the motor excitation mode.

MODE0 MODE1 Excitation mode

L L FULL STEP

H L HALF STEP A

L H HALF STEP B

H H QUARTER STEP

○CW_CCW Terminal／Motor rotating direction setting terminal (BD63877/BD63875/BD63873EFV)

Set the motor’s rotating direction. Change in setting is reflected at the CLK rising edge immediately after the change in

setting

CW_CCW Rotating direction

L Clockwise (CH2’s current is outputted with a phase lag of 90°in regard to CH1’s current)

H Counter Clockwise(CH2’s current is outputted with a phase lead of 90°in regard to CH1’s

current)

○ENABLE Terminal／Output enable terminal (BD63877/BD63875/BD63873EFV)

Turn off forcibly all the output transistors (motor output is open).

At the time of ENABLE=L, electrical angle or operating mode is maintained even if CLK is inputted.

Please be careful because the electrical angle at the time of ENABLE being released (ENABLE=L→H) is different from

the released occasion at the section of CLK=H and from the released occasion at the section of CLK＝L

ENABLE Motor output

L OPEN (electrical angle maintained)

H ACTIVE

○PS／Power save terminal (BD63877/BD63875/BD63873EFV)

PS can make circuit standby state and make motor output OPEN. In standby state, translator circuit is reset (initialized)

and electrical angle is initialized.

Please be careful because there is a delay of 40μs(max.) before it is returned from standby state to normal state and

the motor output becomes ACTIVE

PS State

L Standby state (RESET)

H ACTIVE

The electrical angle (initial electrical angle) of each excitation mode immediately after RESET is as follows Please be

careful because the initial state at the time of FULL STEP is different from those of other excitation modes.

Excitation mode Initial electrical angle

FULL STEP 45°

HALFSTEP A 0°

HALFSTEP B 0°

QUARTER

STEP 0°

●Protection Circuits

○Thermal Shutdown (TSD)

This IC has a built-in thermal shutdown circuit for thermal protection. When the IC’s chip temperature rises above

175℃ (Typ.), the motor output becomes OPEN. Also, when the temperature returns to under 150℃ (Typ.), it

automatically returns to normal operation. However, even when TSD is in operation, if heat is continued to be added

externally, heat overdrive can lead to destruction.

Technical Note

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BD6387xEFV Series

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○Over Current Protection (OCP)

This IC has a built in over current protection circuit as a provision against destruction when the motor outputs are

shorted each other or VCC-motor output or motor output-GND is shorted. This circuit latches the motor output to OPEN

condition when the regulated threshold current flows for 4μs (Typ.). It returns with power reactivation or a reset of the

PS terminal. The over current protection circuit’s only aim is to prevent the destruction of the IC from irregular situations

such as motor output shorts, and is not meant to be used as protection or security for the set. Therefore, sets should

not be designed to take into account this circuit’s functions. After OCP operating, if irregular situations continues and

the return by power reactivation or a reset of the PS terminal is carried out repeatly, then OCP operates repeatly and

the IC may generate heat or otherwise deteriorate. When the L value of the wiring is great due to the wiring being long,

after the over current has flowed and the output terminal voltage jumps up and the absolute maximum values may be

exceeded and as a result, there is a possibility of destruction. Also, when current which is over the output current rating

and under the OCP detection current flows, the IC can heat up to over Tjmax=150℃ and can deteriorate, so current

which exceeds the output rating should not be applied.

○Under Voltage Lock Out (UVLO)

This IC has a built-in under voltage lock out function to prevent false operation such as IC output during power supply

under voltage. When the applied voltage to the VCC terminal goes under 15V (Typ.), the motor output is set to OPEN.

This switching voltage has a 1V (Typ.) hysteresis to prevent false operation by noise etc. Please be aware that this

circuit does not operate during power save mode. Also, the electrical angle is reset when the UVLO circuit operates

during CLK-IN drive mode.

○Over Voltage Lock Out (OVLO)

This IC has a built-in over voltage lock out function to protect the IC output and the motor during power supply over

voltage. When the applied voltage to the VCC terminal goes over 32V (Typ.), the motor output is set to OPEN. This

switching voltage has a 1V (Typ.) hysteresis and a 4μs (Typ.) mask time to prevent false operation by noise etc.

Although this over voltage locked out circuit is built-in, there is a possibility of destruction if the absolute maximum

value for power supply voltage is exceeded, therefore the absolute maximum value should not be exceeded. Please be

aware that this circuit does not operate during power save mode.

○Ghost Supply Prevention (protects against malfunction when power supply is disconnected)

If a signal (logic input, VREF, MTH) is input when there is no power supplied to this IC, there is a function which

prevents the false operation by voltage supplied via the electrostatic destruction prevention diode from these input

terminals to the VCC to this IC or to another IC’s power supply. Therefore, there is no malfunction of the circuit even

when voltage is supplied to these input terminals while there is no power supply.

●Usage Notes

(1) Absolute maximum ratings

An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can

break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If

any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices,

such as fuses.

(2) Connecting the power supply connector backward

Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply

lines. An external direction diode can be added.

(3) Power supply Lines

Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,

separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals

to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the

circuit, not that capacitance characteristic values are reduced at low temperatures.

(4) GND Potential

The potential of GND pin must be minimum potential in all operating conditions.

(5) Metal on the backside (Define the side where product markings are printed as front)

The metal on the backside is shorted with the backside of IC chip therefore it should be connected to GND. Be aware that

there is a possibility of malfunction or destruction if it is shorted with any potential other than GND.

(6) Thermal design

Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.

Users should be aware that these products have been designed to expose their frames at the back of the package, and

should be used with suitable heat dissipation treatment in this area to improve dissipation. As large a dissipation pattern

should be taken as possible, not only on the front of the baseboard but also on the back surface. It is important to

consider actual usage conditions and to take as large a dissipation pattern as possible.

Technical Note

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BD6387xEFV Series

www.rohm.com 2012.02 - Rev.

(7) Inter-pin shorts and mounting errors

When attaching to a printed circuit board, pay close attention to the direction of the IC and displacement. Improper

attachment may lead to destruction of the IC. There is also possibility of destruction from short circuits which can be

caused by foreign matter entering between outputs or an output and the power supply or GND.

(8) Operation in a strong electric field

Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to

malfunction.

(9) ASO

When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.

(10) Thermal shutdown circuit

The IC has a built-in thermal shutdown circuit (TSD circuit). If the chip temperature becomes Tjmax=150℃, and higher,

coil output to the motor will be open. The TSD circuit is designed only to shut the IC off to prevent runaway thermal

operation. It is not designed to protect or indemnify peripheral equipment. Do not use the TSD function to protect

peripheral equipment.

TSD on temperature [℃] (Typ.) Hysteresis Temperature [℃] (Typ.)

175 25

(11) Inspection of the application board

During inspection of the application board, if a capacitor is connected to a pin with low impedance there is a possibility

that it could cause stress to the IC, therefore an electrical discharge should be performed after each process. Also, as a

measure again electrostatic discharge, it should be earthed during the assembly process and special care should be

taken during transport or storage. Furthermore, when connecting to the jig during the inspection process, the power

supply should first be turned off and then removed before the inspection.

(12) Input terminal of IC

This IC is a monolithic IC, and between each element there is a P+ isolation for element partition and a P substrate.

This P layer and each element’s N layer make up the P-N junction, and various parasitic elements are made up.

For example, when the resistance and transistor are connected to the terminal as shown in figure 3,

○When GND＞(Terminal A) at the resistance and GND＞(Terminal B) at the transistor (NPN),

the P-N junction operates as a parasitic diode.

○Also, when GND＞(Terminal B) at the transistor (NPN)

The parasitic NPN transistor operates with the N layers of other elements close to the aforementioned

parasitic diode.

Because of the IC’s structure, the creation of parasitic elements is inevitable from the electrical potential relationship. The

operation of parasitic elements causes interference in circuit operation, and can lead to malfunction and destruction.

Therefore, be careful not to use it in a way which causes the parasitic elements to operate, such as by applying voltage

that is lower than the GND (P substrate) to the input terminal.

Fig. 3 Pattern Diagram of Parasitic Element

(13) Ground Wiring Patterns

When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,

placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage

variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change

the GND wiring pattern potential of any external components, either.

(14) TEST Terminal (BD63877/BD63875/BD63873EFV)

Be sure to connect TEST pin to GND.

Resistor Transistor (NPN)

N N N P+ P

P substrate

GND

Parasitic element

Pin A

N P+ P

P substrate

GND

Parasitic element

Pin B

C B

GND

Pin A

aras

iti

element

Pin B

Other adjacent elements

GND

aras

iti

element

Technical Note

8/8

BD6387xEFV Series

www.rohm.com 2012.02 - Rev.

●Ordering part number

B D 6 3 8 7 2 EF V -E 2

形名パッケージ

EFV=HTSSOP-B28

包装、フォーミング仕様

E2: リール状エンボステーピング

∗

Order quantity needs to be multiple of the minimum quantity.

Embossed carrier tape (with dry pack)Tape

Quantity

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

2500pcs

()

Direction of feed

Reel 1pin

(Unit : mm)

HTSSOP-B28

0.08

0.08 S

1.0±0.2

0.5±0.15

−

0.17+0.05

0.03

1528

141

(2.9)

4.4±0.1

(5.5)

(MAX 10.05 include BURR)

0.625

6.4±0.2

9.7±0.1

1PIN MARK

1.0MAX

0.65

0.85±0.05

0.08±0.05

0.24 +0.05

0.04

R1120

www.rohm.com

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