VNI4140KTR - STMicroelectronics - Datasheet.Directory

This is information on a product in full production.

March 2012 Doc ID 14174 Rev 10 1/25

VNI4140K

Quad high-side smart power solid-state relay

Datasheet − production data

Features

■Output current: 0.7 A per channel

■Shorted load protections

■Junction overtemperature protection

■Case overtemperature protection for thermal

independence of the channels

■Thermal case shutdown restart not

simultaneous for the various channels

■Protection against loss of ground

■Current limitation

■Undervoltage shutdown

■Open drain diagnostic outputs

■3.3 V CMOS/TTL compatible inputs

■Fast demagnetization of inductive loads

■Conforms to IEC 61131-2

■ESD according to IEC 61000-4-2 up to +/-

25 kV

Figure 1. Block diagram

Description

The VNI4140K is a monolithic device made using

STMicroelectronics VIPower technology, intended

for driving four independent resistive or inductive

loads with one side connected to ground. Active

current limitation avoids dropping the system

power supply in case of shorted load. Built-in

thermal shutdown protects the chip from

overtemperature and short-circuit. In overload

condition, channel turns OFF and back ON

automatically so as to maintain junction

temperature between TTSD and TR. If this

condition makes case temperature reach TCSD,

overloaded channel is turned OFF and will

restartonly when case temperature has

decreased down to TCR. In case of more than one

channel in overload, re-start of the overloaded

channels will not be simultaneous, in order to

avoid high peak current from the supply. Non

overloaded channels continue to operate

normally. The open drain diagnostics outputs

indicates overtemperature conditions.

Type Vdemag(1)

1. Per channel.

RDS(on)(1) Iout(1) VCC

VNI4140K VCC-41 V 0.08 Ω0.7 A 41 V

PowerSSO-24

www.st.com

Contents VNI1440K

2/25 Doc ID 14174 Rev 10

Contents

1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6 Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

7 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

8 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

8.1 VNI4140K thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

9 Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

11 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

VNI1440K Pin connection

Doc ID 14174 Rev 10 3/25

1 Pin connection

Figure 2. Pin connection (top view)

Table 1. Pin description

Pin Name Description

Tab TAB Exposed tab internally connected to Vcc

1 Vcc Supply voltage

2 IN1 Channel 1 input 3.3 V CMOS/TTL compatible

3 STAT1 Channel 1 status in open drain configuration

4 IN2 Channel 2 input 3.3 V CMOS/TTL compatible

5 STA2 Channel 2 status in open drain configuration

6 GND Device ground connection

7 STAT3 Channel 3 status in open drain configuration

8 IN3 Channel 3 input 3.3 V CMOS/TTL compatible

9 STAT4 Channel 4 status in open drain configuration

10 IN4 Channel 4 input 3.3 V CMOS/TTL compatible

11 NC

12 NC

13 OUT4 Channel 4 power stage output, internally protected

14 OUT4 Channel 4 power stage output, internally protected

15 OUT4 Channel 4 power stage output, internally protected

16 OUT3 Channel 3 power stage output, internally protected

17 OUT3 Channel 3 power stage output, internally protected

OUT1

OUT2

VCC

IN1

STAT1

IN2

STAT2

GND

OUT3

OUT4

STAT3

IN3

STAT4

IN4

Pin connection VNI1440K

4/25 Doc ID 14174 Rev 10

Pin Name Description

18 OUT3 Channel 3 power stage output, internally protected

19 OUT2 Channel 2 power stage output, internally protected

20 OUT2 Channel 2 power stage output, internally protected

21 OUT2 Channel 2 power stage output, internally protected

22 OUT1 Channel 1 power stage output, internally protected

23 OUT1 Channel 1 power stage output, internally protected

24 OUT1 Channel 1 power stage output, internally protected

Table 1. Pin description (continued)

VNI1440K Maximum ratings

Doc ID 14174 Rev 10 5/25

2 Maximum ratings

2.1 Thermal data

Table 2. Absolute maximum rating

Symbol Parameter Value Unit

VCC Power supply voltage 41 V

-VCC Reverse supply voltage -0.3 V

IGND DC ground reverse current -250 mA

IOUT Output current (continuos) Internally limited A

IRReverse output current (per channel) -5 A

IIN Input current (per channel) ± 10 mA

VIN Input voltage +VCC V

VSTAT Status pin voltage +VCC V

ISTAT Status pin current ± 10 mA

VESD Electrostatic discharge (R = 1.5 kΩ; C = 100 pF) 2000 V

EAS

Single pulse avalanche energy per channel not

simultaneously 300 mJ

PTOT Power dissipation at Tc = 25 °C Internally limited W

TJJunction operating temperature Internally limited °C

TSTG Storage temperature -55 to 150 °C

Table 3. Thermal data

Symbol Parameter Value Unit

Rth(JC) Thermal resistance junction-case (1)

1. Per channel

Max 2 °C/W

Rth(JA) Thermal resistance junction-ambient Max see Figure 11 °C/W

Electrical characteristics VNI1440K

6/25 Doc ID 14174 Rev 10

3 Electrical characteristics

10.5 V < VCC < 36 V; -25 °C < TJ < 125 °C; unless otherwise specified

VCC = 24 V; -25 °C < TJ < 125 °C, RL = 48 Ω, input rise time < 0.1 µs

Table 4. Power section

Symbol Parameter Test condition Min Typ Max Unit

Vcc Supply voltage 10.5 36 V

RDS(on) On-state resistance IOUT = 0.5 A at TJ = 25 °C

IOUT = 0.5 A

0.080

0.140

Ω

Vclamp Is = 20 mA 41 45 52 V

ISSupply current

All channel in OFF state

ON state with VIN = 5 V

(TJ = 125 °C)

250

2.4 4

µA

ILGND

Output current at turn-

off

VCC = VSTAT = VIN =

VGND = 24 V, VOUT = 0 V 1mA

VOUT(OFF)

Off state output

voltage VIN = 0 V and IOUT = 0 A 1 V

IOUT(OFF)

Off state output

current VIN = VOUT = 0 V 0 5 µA

FCP

Charge pump

frequency Channel in ON state (1)

1. To cover EN55022 class A and class B normative.

1450 kHz

Table 5. Switching

Symbol Parameter Min Typ Max Unit

td(ON) Turn on delay - 20 - µs

trRise time - 10 - µs

td(OFF) Turn off - 30 - µs

tfFall time - 8 - µs

dV/dt(ON) Turn on voltage slope - 3 - V/µs

dV/dt(off) Turn off voltage slope - 4 - V/µs

VNI1440K Electrical characteristics

Doc ID 14174 Rev 10 7/25

Table 6. Logical input

Symbol Parameter Test condition Min Typ Max Unit

VIL Input low level voltage 0.8 V

VIH Input high level voltage 2.20 V

VI(HYST)

Input hysteresis

voltage 0.15 V

IIN Input current VIN = 15 V 10

µΑ

VIN = 36 V 210

Table 7. Protection and diagnostic

Symbol Parameter Test condition Min Typ Max Unit

vSTAT

Status voltage

output low ISTAT = 1.6 mA 0.6 V

VUSD

Undervoltage

protection 710.5V

VUSDHYS

Undervoltage

hysteresis 0.4 0.5 V

ILIM

DC short-circuit

current VCC = 24 V; RLOAD < 10 mΩ0.7 1 1.7 A

IPEAK

Maximum DC output

current Dynamic load 1.3 A

Hyst Tracking limits 0.2 A

ILSTAT Status leakage current VCC = VSTAT = 36 V 30 µΑ

TTSD

Junction shutdown

temperature 150 170 190 °C

Junction reset

temperature 135 °C

THIST

Junction thermal

hysteresis 715 °C

TCSD

Case shutdown

temperature 125 130 135 °C

TCR

Case reset

temperature

110 °C

TCHYST

Case thermal

hysteresis 715 °C

Vdemag

Output voltage at

turn-OFF IOUT = 0.5 A; LLOAD >= 1 mH VCC-

VCC-

52 V

Electrical characteristics VNI1440K

8/25 Doc ID 14174 Rev 10

Figure 3. Current and voltage conventions

VNI1440K Truth table

Doc ID 14174 Rev 10 9/25

4 Truth table

5 Typical application circuit

Figure 4. Typical application circuit

Table 8. Truth table

Condition INPUTn OUTPUTn STATUSn

Normal operation L

Overtemperature L

Undervoltage L

Shorted load

(Current limitation)

Typical application circuit VNI1440K

10/25 Doc ID 14174 Rev 10

Figure 5. Thermal behavior

Tj ( i ) > Tt s d

Vi n ( i ) = H

OUT(i) Off

STAT(i) On (L)

Tc > Tc s d

YES

NOYES

Tc > Tc r

YES

Tj(i) > Tjr

YES

STAT(i) Off (H)

OUT(i) On

VNI1440K Switching waveforms

Doc ID 14174 Rev 10 11/25

6 Switching waveforms

Figure 6. Switching waveforms

Pin functions VNI1440K

12/25 Doc ID 14174 Rev 10

7 Pin functions

Figure 7. Input circuit

Figure 8. Status circuit

VNI1440K Pin functions

Doc ID 14174 Rev 10 13/25

Figure 9. Charge pump switching frequency (typical) vs temperature

Freq_CP

800

1000

1200

1400

1600

1800

2000

-50 0 50 100 150 200

temperature("C)

CP_frequency (KHz)

Freq_CP

Package and PC board thermal data VNI1440K

14/25 Doc ID 14174 Rev 10

8 Package and PC board thermal data

8.1 VNI4140K thermal data

Figure 10. VNI4140K PC board

Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias,

FR4 area = 77 mm x 86 mm, PCB thickness=1.6 mm, Cu thickness = 70 mm (front and back

side), Copper areas: from minimum pad lay-out to 8 cm2).

Figure 11. RthJA vs PCB copper area in open box free air condition (one channel ON)

VNI1440K Package and PC board thermal data

Doc ID 14174 Rev 10 15/25

Figure 12. VNI4140K thermal impedance junction ambient single pulse

(one channel on)

Reverse polarity protection VNI1440K

16/25 Doc ID 14174 Rev 10

9 Reverse polarity protection

This schematic can be used with any type of load.

The following is an indication on how to dimension the RGND resistor.

RGND = (-VCC) / (-IGND)

where -IGND is the DC reverse ground pin current and can be found in the absolute

maximum rating section of the device datasheet.

Power dissipation in RGND (when VCC < 0: during reverse polarity situations) is:

PD = (-VCC)2/RGND

Note: In normal condition (no reverse polarity) due to the diode there will be a voltage drop

between GND of the device and GND of the system.

Figure 13. Reverse polarity protection

Statusi

Inputi

GND

Outputi

+ Vcc

RGND

Load

Diode

Statusi

Inputi

GND

Outputi

+ Vcc

RGND

Load

Diode

VNI1440K Package mechanical data

Doc ID 14174 Rev 10 17/25

10 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

Package mechanical data VNI1440K

18/25 Doc ID 14174 Rev 10

Figure 14. PowerSSO-24 package dimensions

Table 9. PowerSSO-24 mechanical data

Symbol

Min. Typ. Max.

A 2.15 2.47

A2 2.15 2.40

a1 0 0.075

b 0.33 0.51

c 0.23 0.32

D 10.10 10.50

E 7.4 7.6

e 0.8

e3 8.8

G 0.1

G1 0.06

H 10.1 10.5

h 0.4

L 0.55 0.85

N 10deg

X 4.1 4.7

Y 6.5 7.1

VNI1440K Package mechanical data

Doc ID 14174 Rev 10 19/25

Figure 15. PowerSSO-24 tube shipment (no suffix)

Note: All dimensions are in mm.

Table 10. PowerSSO-24 tube shipment

Base quantity 49

Bulk quantity 1225

Tube length (± 0.5) 532

A 3.5

B 13.8

C (± 0.1) 0.6

Package mechanical data VNI1440K

20/25 Doc ID 14174 Rev 10

Figure 16. PowerSSO-24 reel shipment (suffix “TR”)

Table 11. PowerSSO-24 reel dimensions

Base quantity 1000

Bulk quantity 1000

A (max) 330

B (min) 1.5

C (± 0.2) 13

F 20.2

G (2 ± 0) 24.4

N (min) 100

T (max) 30.4

VNI1440K Package mechanical data

Doc ID 14174 Rev 10 21/25

Figure 17. PowerSSO-24™ tape dimensions

Note: According to electronic industries association (EIA) Standard 481 rev. A, Feb 1986

Table 12. PowerSSO-24™ tape dimensions

Tape width W 24

Tape hole spacing P0 (± 0.1) 4

Component spacing P 12

Hole diameter D (± 0.05) 1.55

Hole diameter D1 (min) 1.5

Hole position F (± 0.1) 11.5

Compartment depth K (max) 2.85

Hole spacing P1 (± 0.1) 2

Package mechanical data VNI1440K

22/25 Doc ID 14174 Rev 10

Figure 18. VN14140k suggested footprint

Note: STMicroelectronics is not responsible for any PCB related issues. The footprint shown in the

above figure is a suggestion which might not be in line to the customer PCB supplier design

rules.

All dimensions are in mm.

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VNI1440K Order codes

Doc ID 14174 Rev 10 23/25

11 Order codes

Table 13. Order codes

Order codes Package Packaging

VNI4140K PowerSSO-24 Tube

VNI4140KTR PowerSSO-24 Tape and reel

Revision history VNI1440K

24/25 Doc ID 14174 Rev 10

12 Revision history

Table 14. Document revision history

Date Revision Changes

16-Nov-2007 1 Initial release

26-Nov-2007 2 Updated electrical parameters values

08-Jul-2008 3 Inserted: Figure 4 on page 9 and Section 9: Reverse

polarity protection on page 16

08-Apr-2008 4 Added ILGND parameter in Table 4 on page 6

27-Aug-2009 5 Updated Section 9: Reverse polarity protection

09-Dec-2009 6 Added Section 10: Conformity to IEC 61000-4-2 ESD

immunity test

15-Apr-2010 7 Updated Table 5 on page 6

06-Feb-2012 8

Inserted feature: Conformity to IEC 61000-4-2 ESD

immunity test in cover page.

Removed chapter: Conformity to IEC 61000-4-2 ESD

immunity test.

05-Mar-2012 9 Suggested footprint inserted.

In Table 4. parameter ILGND has been added.

19-Mar-2012 10 Minor text changes.

VNI1440K

Doc ID 14174 Rev 10 25/25

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