54F02DM/NOPB - NATIONAL SEMICONDUCTOR

April 1988

Revised August 2000

74F32 Quad 2-Input OR Gate

74F32

Quad 2-Input OR Gate

General Description

This device contains four independent gates, each of which

performs the logic OR functio n.

Ordering Code:

Devices also available in Tape and R eel. Speci fy by appending the s uffix let t er “X” to the o rdering code.

Logic Symbol

IEEE/IEC

Connection Diagram

Unit Loading/F an Out

Order Number Package Number Package Description

74F32SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

74F32SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74F32MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74F32PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Pin Names Description U.L. Input IIH/IIL

HIGH/LOW Output IOH/IOL

An, BnInputs 1.0/1.0 20 µA/−0.6 mA

OnOutputs 50/33.3 −1 mA/20 mA

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74F32

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: Absolute maximum ratings are values beyond which the device

may be damaged or have its useful life impaired. Functional operation

under th es e conditi ons is not im plied.

Note 2: Eith er v oltage lim it or c urrent limit is sufficien t to prot ect inputs .

DC Electrical Characteristics

AC Electrical Characteristics

Stora ge Temperature −65°C to +150°C

Ambient Temperature under Bias −55°C to +125°C

Junct ion Tem per atu re und er Bias −55°C to +150°C

VCC Pin Potential to Ground Pin −0.5V to +7.0V

Input Voltage (Note 2) −0.5V to +7.0V

Input Current (Note 2) −30 mA to +5.0 mA

Voltage Applied to Output

in HIGH State (with VCC = 0V)

Standard Output −0.5V to VCC

3-STATE Output −0.5V to +5.5V

Current Applied to Output

in LOW State (Max) twice the rated IOL (mA)

ESD Last Passing Voltage (Min) 4000V

Free Air Ambient Temperature 0°C to +70°C

Supply Voltage +4.5V to +5.5V

Symbol Parameter Min Typ Max Units VCC Conditions

VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal

VCD Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA

VOH Output HIGH 10% VCC 2.5 V Min IOH = −1 mA

Voltage 5% VCC 2.7 IOH = −1 mA

VOL Output LOW 10% VCC 0.5 V Min IOL = 20 mA

Voltage

IIH Input HIGH 5.0 µAMaxV

IN = 2.7V

Current

IBVI Input HIGH Current 7.0 µAMaxV

IN = 7.0V

Breakdown Test

ICEX Output HIGH 50 µAMaxV

OUT = VCC

Leakage Current

VID Input Leakage 4.75 V 0.0 IID = 1.9 µA

Test All Other Pins Grounded

IOD Output Leakage 3.75 µA0.0

VIOD = 150 mV

Circuit Current All Other Pins Grounded

IIL Input LOW Current −0.6 mA Max VIN = 0.5V

IOS Output Short-Circuit Current −60 −150 mA Max VOUT = 0V

ICCH Power Supply Current 6.1 9.2 mA Max VO = HI G H

ICCL Power Supply Current 10.3 15.5 mA Max VO = LOW

Symbol Parameter

TA = +25°CT

A = −55°C to +125°CT

A = 0°C to +70°C

Units

VCC = +5.0V VCC = +5.0V VCC = +5.0V

CL = 50 pF CL = 50 pF CL = 50 pF

Min Typ Max Min Max Min Max

tPLH Propagation Delay 3.0 4.2 5.6 3.0 7.5 3.0 6.6 ns

tPHL An, Bn to On3.04.05.32.57.53.06.3

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74F32

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

Package Number M14A

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74F32

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Sma ll Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M14D

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74F32

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lea d Th in S hri n k Small Ou tlin e Pack age (TSSOP ), JED EC MO-1 53, 4.4mm Wide

Package Number MTC14

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74F32 Quad 2-Input OR Gate

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N14A

Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r syste ms are devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a lif e supp ort

device or system whose failure to perform can be rea-

sonabl y ex pect ed to ca use the fa ilu re of the li fe su pp ort

device or system, or to affect its safety or effectiveness.