SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412I - APRIL 1998 - REVISED APRIL 2005 2 19 3 18 17 4 16 5 15 6 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK 1D 2D 3D 4D 5D 6D 7D 8D 1 20 19 1Q 18 2Q 2 3 17 3Q 16 4Q 4 5 15 5Q 14 6Q 6 7 SN54LV574A . . . FK PACKAGE (TOP VIEW) 2D 1D OE VCC VCC 20 1 SN74LV574A . . . RGY PACKAGE (TOP VIEW) 3D 4D 5D 6D 7D 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 13 7Q 12 8Q 8 9 10 11 CLK OE 1D 2D 3D 4D 5D 6D 7D 8D GND Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) 1Q SN54LV574A . . . J OR W PACKAGE SN74LV574A . . . DB, DGV, DW, NS, OR PW PACKAGE (TOP VIEW) D OE D D <0.8 V at VCC = 3.3 V, TA = 25C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25C Support Mixed-Mode Voltage Operation on All Ports GND D D Ioff Supports Partial-Power-Down Mode 2Q 3Q 4Q 5Q 6Q 8D GND CLK 8Q 7Q D 2-V to 5.5-V VCC Operation D Max tpd of 10 ns at 5 V D Typical VOLP (Output Ground Bounce) description/ordering information ORDERING INFORMATION QFN - RGY SN74LV574ARGYR Tube of 25 SN74LV574ADW Reel of 2000 SN74LV574ADWR SOP - NS Reel of 2000 SN74LV574ANSR 74LV574A SSOP - DB Reel of 2000 SN74LV574ADBR LV574A Tube of 70 SN74LV574APW Reel of 2000 SN74LV574APWR Reel of 250 SN74LV574APWT Reel of 2000 SN74LV574ADGVR LV574A -40C 40C to 85C TSSOP - PW TVSOP - DGV TOP-SIDE MARKING Reel of 1000 SOIC - DW -55C to 125C ORDERABLE PART NUMBER PACKAGE TA LV574A LV574A LV574A VFBGA - GQN Reel of 1000 SN74LV574AGQNR LV574A CDIP - J Tube of 20 SNJ54LV574AJ SNJ54LV574AJ CFP - W Tube of 85 SNJ54LV574AW SNJ54LV574AW LCCC - FK Tube of 55 SNJ54LV574AFK SNJ54LV574AFK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright (c) 2005, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412I - APRIL 1998 - REVISED APRIL 2005 description/ordering information (continued) The 'LV574A devices are octal edge-triggered D-type flip-flops designed for 2-V to 5.5-V VCC operation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. GQN PACKAGE (TOP VIEW) 1 2 3 terminal assignments 4 1 2 3 4 A A 1D OE VCC 1Q B B 3D 3Q 2D 2Q C C 5D 4D 5Q 4Q D D 7D 7Q 6D 6Q E E GND 8D CLK 8Q FUNCTION TABLE (each flip-flop) INPUTS 2 OE CLK D OUTPUT Q L H H L L L L H or L X Q0 H X X Z POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412I - APRIL 1998 - REVISED APRIL 2005 logic diagram (positive logic) OE CLK 1 11 C1 1D 2 19 1Q 1D To Seven Other Channels Pin numbers shown are for the DB, DGV, DW, FK, J, NS, PW, RGY, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Output voltage range applied in the high or low state, VO (see Notes 1 and 2) . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA Package thermal impedance, JA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92C/W (see Note 3): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W (see Note 3): GQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412I - APRIL 1998 - REVISED APRIL 2005 recommended operating conditions (see Note 5) VCC SN54LV574A SN74LV574A MIN MAX MIN MAX 2 5.5 2 5.5 Supply voltage VCC = 2 V VIH High level input voltage High-level 1.5 Low level input voltage Low-level VI Input voltage VO Output voltage VCC = 2.3 V to 2.7 V VCC x 0.7 VCC x 0.7 VCC = 3 V to 3.6 V VCC x 0.7 VCC x 0.7 VCC = 4.5 V to 5.5 V VCC x 0.7 VCC x 0.7 0.5 VCC x 0.3 VCC = 3 V to 3.6 V VCC x 0.3 VCC x 0.3 VCC x 0.3 5.5 0 5.5 High or low state 0 VCC 0 VCC 3-state 0 5.5 0 5.5 -50 -50 VCC = 2.3 V to 2.7 V -2 -2 VCC = 3 V to 3.6 V -8 -8 -16 -16 VCC = 2 V Low level output current Low-level t/v Input transition rise or fall rate 50 50 VCC = 2.3 V to 2.7 V 2 2 VCC = 3 V to 3.6 V 8 8 VCC = 4.5 V to 5.5 V 16 16 VCC = 2.3 V to 2.7 V 200 200 VCC = 3 V to 3.6 V 100 100 20 20 VCC = 4.5 V to 5.5 V TA Operating free-air temperature -55 125 V VCC x 0.3 0 VCC = 4.5 V to 5.5 V IOL 0.5 VCC x 0.3 VCC = 2 V High level output current High-level V VCC = 2.3 V to 2.7 V VCC = 4.5 V to 5.5 V IOH V 1.5 VCC = 2 V VIL UNIT -40 V V A mA A mA ns/V C 85 NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LV574A PARAMETER VOH TEST CONDITIONS MIN TYP MAX MIN 2 V to 5.5 V IOH = -2 mA 2.3 V 2 2 IOH = -8 mA 3V 2.48 2.48 4.5 V 3.8 VCC-0.1 TYP MAX UNIT VCC-0.1 V 3.8 IOL = 50 A 2 V to 5.5 V IOL = 2 mA 2.3 V 0.4 0.4 IOL = 8 mA 3V 0.44 0.44 4.5 V 0.55 0.55 IOL = 16 mA 0.1 0.1 V II VI = 5.5 V or GND 0 to 5.5 V 1 1 A IOZ VO = VCC or GND 5.5 V 5 5 A ICC VI = VCC or GND, 5.5 V 20 20 A Ioff VI or VO = 0 to 5.5 V 0 5 5 A Ci VI = VCC or GND IO = 0 3.3 V 1.8 PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 SN74LV574A IOH = -50 A IOH = -16 mA VOL VCC POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1.8 pF SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412I - APRIL 1998 - REVISED APRIL 2005 timing requirements over recommended operating free-air temperature range, VCC = 2.5 V 0.2 V (unless otherwise noted) (see Figure 1) TA = 25C PARAMETER MIN tw Pulse duration CLK high or low tsu Setup time High or low before CLK th Hold time Data after CLK SN54LV574A MAX MIN MAX SN74LV574A MIN MAX UNIT 7 7 7 ns 5.5 5.5 5.5 ns 2 2 2 ns timing requirements over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) TA = 25C PARAMETER MIN SN54LV574A MAX MIN MAX SN74LV574A MIN MAX UNIT tw Pulse duration CLK high or low 5 5 5 ns tsu Setup time High or low before CLK 3.5 3.5 3.5 ns th Hold time Data after CLK 1.5 1.5 1.5 ns timing requirements over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) TA = 25C PARAMETER MIN tw Pulse duration CLK high or low tsu Setup time th Hold time SN54LV574A MAX MIN MAX SN74LV574A MIN MAX UNIT 5 5 5 ns High or low before CLK 3.5 3.5 3.5 ns Data after CLK 1.5 1.5 1.5 ns switching characteristics over recommended operating free-air temperature range, VCC = 2.5 V 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax TA = 25C SN54LV574A SN74LV574A LOAD CAPACITANCE MIN TYP CL = 15 pF 60* 100* 50* 50 CL = 50 pF 50 85 40 40 MAX MIN MAX MIN MAX MHz tpd CLK Q 9.6* 16.6* 1* 20* 1 20 ten OE Q 9.2* 16.1* 1* 19* 1 19 tdis OE Q 6.5* 12.8* 1* 15* 1 15 tpd CLK Q 11.6 19.6 1 23 1 23 ten OE Q 10.9 19 1 22 1 22 tdis OE 8.4 17.5 1 20 1 20 Q CL = 15 pF CL = 50 pF tsk(o) 2 UNIT ns ns 2 * On products compliant to MIL-PRF-38535, this parameter is not production tested. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412I - APRIL 1998 - REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax tpd CLK Q ten OE Q tdis OE Q tpd CLK ten OE tdis OE Q TA = 25C SN54LV574A SN74LV574A LOAD CAPACITANCE MIN TYP CL = 15 pF 80* 145* 65* 65 CL = 50 pF 50 120 45 45 MAX MIN MAX MIN MAX MHz 6.8* 13.2* 1* 15.5* 1 15.5 6.4* 12.8* 1* 15* 1 15 4.8* 13* 1* 15* 1 15 Q 8.1 16.7 1 19 1 19 Q 7.7 16.3 1 18.5 1 18.5 6.1 15 1 17 1 17 CL = 15 pF CL = 50 pF tsk(o) UNIT 1.5 ns ns 1.5 * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax tpd CLK Q ten OE Q tdis OE Q tpd CLK Q ten OE Q tdis OE Q TA = 25C SN54LV574A SN74LV574A LOAD CAPACITANCE MIN TYP CL = 15 pF 130* 205* 110* 110 CL = 50 pF 85 175 75 75 CL = 15 pF CL = 50 pF MAX MIN MAX MIN MAX MHz 4.8* 8.6* 1* 10* 1 10 4.6* 9* 1* 10.5* 1 10.5 3.5* 9* 1* 10.5* 1 10.5 5.7 10.6 1 12 1 12 5.5 11 1 12.5 1 12.5 4.1 10.1 1 11.5 1 11.5 tsk(o) UNIT 1 ns ns 1 * On products compliant to MIL-PRF-38535, this parameter is not production tested. noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25C (see Note 6) SN74LV574A PARAMETER MIN TYP MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.7 0.8 V VOL(V) Quiet output, minimum dynamic VOL -0.6 -0.8 V VOH(V) Quiet output, minimum dynamic VOH 2.8 VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage V 2.31 V 0.99 V UNIT NOTE 6: Characteristics are for surface-mount packages only. operating characteristics, TA = 25C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS Outputs enabled CL = 50 pF, pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 f = 10 MHz VCC TYP 3.3 V 20.4 5V 23.8 pF SN54LV574A, SN74LV574A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS412I - APRIL 1998 - REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC From Output Under Test Test Point RL = 1 k From Output Under Test CL (see Note A) S1 Open TEST GND S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain CL (see Note A) Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input 0V tw tsu VCC 50% VCC 50% VCC Input th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC 50% VCC Input 50% VCC tPLH In-Phase Output 50% VCC VOH 50% VCC VOL VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 50% VCC 0V Output Waveform 1 S1 at VCC (see Note B) tPLZ VCC 50% VCC tPZH tPLH 50% VCC 50% VCC tPZL tPHL tPHL Out-of-Phase Output 0V VCC Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 50% VCC VOH - 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 1-Aug-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADGVRE4 ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADGVRG4 ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ADWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574AGQNR OBSOLETE BGA MICROSTAR JUNIOR GQN 20 SN74LV574ANSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ANSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ANSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Call TI Samples (Requires Login) SN74LV574ADBR TBD (3) Call TI PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 1-Aug-2011 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) SN74LV574APW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574APWE4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574APWG4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574APWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574APWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574APWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574APWT ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574APWTE4 ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574APWTG4 ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV574ARGYR ACTIVE VQFN RGY 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74LV574ARGYRG4 ACTIVE VQFN RGY 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74LV574AZQNR ACTIVE BGA MICROSTAR JUNIOR ZQN 20 1000 Green (RoHS & no Sb/Br) SNAGCU Samples (Requires Login) Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 1-Aug-2011 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 7.5 2.5 12.0 16.0 Q1 SN74LV574ADBR SSOP DB 20 2000 330.0 16.4 SN74LV574ADGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LV574ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74LV574ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74LV574APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LV574APWT TSSOP PW 20 250 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LV574ARGYR VQFN RGY 20 3000 330.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1 ZQN 20 1000 330.0 12.4 3.3 4.3 1.5 8.0 12.0 Q1 SN74LV574AZQNR BGA MI CROSTA R JUNI OR Pack Materials-Page 1 8.2 B0 (mm) PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LV574ADBR SSOP DB 20 2000 346.0 346.0 33.0 SN74LV574ADGVR TVSOP DGV 20 2000 346.0 346.0 29.0 SN74LV574ADWR SOIC DW 20 2000 346.0 346.0 41.0 SN74LV574ANSR SO NS 20 2000 346.0 346.0 41.0 SN74LV574APWR TSSOP PW 20 2000 346.0 346.0 33.0 SN74LV574APWT TSSOP PW 20 250 346.0 346.0 33.0 SN74LV574ARGYR VQFN RGY 20 3000 346.0 346.0 29.0 SN74LV574AZQNR BGA MICROSTAR JUNIOR ZQN 20 1000 340.5 338.1 20.6 Pack Materials-Page 2 MECHANICAL DATA MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0-8 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Audio www.ti.com/audio Communications and Telecom www.ti.com/communications Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps DLP(R) Products www.dlp.com Energy and Lighting www.ti.com/energy DSP dsp.ti.com Industrial www.ti.com/industrial Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical Interface interface.ti.com Security www.ti.com/security Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com Wireless www.ti.com/wireless-apps RF/IF and ZigBee(R) Solutions www.ti.com/lprf TI E2E Community Home Page e2e.ti.com Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2011, Texas Instruments Incorporated