MSC23836B-xxBS20/DS20 (97.10.11) OKI semiconductor MSC23836B-xxBS20/DS20 | 8,388,608 Word By 36 Bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE GENERAL DESCRIPTION The Oki MSC23836B-xxBS20/DS20 is a fully decoded, 8,388,608 word X 36 bit CMOS dynamic random access memory composed of sixteen 16Mb DRAMs(4Mx4) in SOQJ and four 8Mb DRAMs(4Mx2) in SOU. The mounting of twenty DRAMs together with decoupling capacitors on a 72-pin glass epoxy Single-in-Line Package supports any application where high density and large capacity of storage memory are required. FEATURES 8,388,608 word X 36 bit Parity organization * 72-pin socket insertable module . MSC23836B-xxBS20 : Gold tab MSC23836B-xxDS20 : Solder tab * Single +5 V supply +10 % tolerance * Input : FTL compatible Output TTL compatible, tristate, nonlatch Refresh : 2048 cycles/32 ms * TAS before RAS refresh, CAS before RAS hidden refresh, RAS only refresh capability FAMILY ORGANIZATION ACCESS TIME Cycle Power Dissipation FAMILY (MAX) . Time trac | taa | tcac | (MAX) OPMAX) Sata) MSC23836B-60BS20/DS26 60ns | 30ns | 15ns | 110ns | 5995mW 110mw Msc23836B-70RS20/DSs20 . | 7Ons | 35ns | 20ns | 130ns | 5445mW_ | (MOS level)-MSC23836B-xxBS20/DS20 107.95402 3.3840.2 | |_ 101.19TYP A th 93.18 Hi ao 95.440.2 TN * * * * * . A o oO TYP TYPTN o o 2 o y 10.169 635 1 Lon OO ADORED UOC 72 | ry 2,03TYP 6.35 LO4TYP 6.35TYP 95,25 ~ *} The common size difference of the board width 12.5mm of its height is specified as 40.2. The value above 12.5mm is specified as 40.5. 9.30MAX ins, 1 6.2Min iE 3.7MIN +0.1 127 9,08. ABLOCK DIAGRAM 'MSC23836B-xxBS20/D$20 A0-A10 o 9 RASO RAS2 CASO + + CAS2 We -~@ +? - A0-A10 DQE-DQO01 Da a0-a10 -* A0-A190 DQF- DQ18-) pa ap-ai0 ? RAS ODQEpqi 70a RAS RAS = DQE-DQIS{paQ = RAS CAS oa pa2z oe cas CAS ba. - Daze{0Q GAS e | WE a FH a$] e WE | Haat , OE | 993 Noe oe | PO?t I oe vec VSS | VSS VCC vec VSS | VSS vec | | | | Ad-A10 DGF- DG4Ipa ao-ato -F Ag-Ai0 DQf DG22I pa ao-Ato}] RAS. DQ-DQ5ID0 RAS RAS DOQ#DQ23JDQ RAS * + cas DQa} pas{Pa_ cas | + cas Datpa2z4joa cas 4 Le pots Wi e = DQ =sWE OE | PS? 1 ce | eT vec VSS VSS VC voc VSS | VSS ve oT ao-Ai) DOI DQ8 pat Ao-A10 4 A0-A10 DQ? - DQ26Anai ao-aio RAS DOQ2FDQ1i7 Dee RAS > RAS 0Q2-DQ35Da2 RAS CASI - CASI CASI CAST CAS. __ _. CAS2 CASD _. CAS2 WE OE OE WE - t WE OE OE WE oe vec VSS | vsS VCC vec vsst | vss vec Ao-A10 DQF DO9Ipq ao-a10 rt A0-A10 DQ/-DOQ27 pq ao-aio -? ! U? : RAS DO-FDGI0]DQ = RAS RAS DOI-DQ28-] DQ Ss RAS. | GAS DGTDait40e Gas | CAS BGT paze-4Ba_ CaS 4 WE e pe ray I 2 wi - paiz] 58 OE Daso_| 22 ? voc VSS VSS Vcc vec VSS vss vec | I t | | TAG-AIO DQE-~DQ1 DQ A0-A10 F AG-A10 OQF DQ31} pq Ac-Aio BRS DQ F- Da14 pa BAST | RAS ba +- DQ32 pa RAS|-# o_I CA: PQs CAS @__| CAS = .DQ33 CAS * We boL DQ WE WE bo _ al ee dE | _ DQ16 7] oe OE | 2994 oe vec vssi | vss vec vec VSS | vss vec RASi 7 RAS3 CASI + * CAS3 yec e - eee en vss - + o 4MSC23836B-xxBS20/DS20 (97.10.11) Pin No. Pin name Pin No Pin name Pin No. . Pin name Pin No. Pin name 1 Vss 19 A10 37 DQ17 55 paQi2 2 DQO 20 Da4 38 DQ3s 56 DQ30 3 DQis8 21 DQ22 39 Vss 57 DQ13 4 DQi 22 DQ5 40 CASO 58 DOQ31 5 DQi9 23 DQ23 41 TAS? 59 Voc DOe2 24 DQ6 42 TASS 60 DQ32 7 DQ20 25 DQ24 43 CAST 61 DQ14 8 DQ3 26 DQ? 44 RASO 62 DQ33 '9 DQ21 27 DQ25 45 BAST 63 DQi5 10 Vee 28 A7 46 Nc 64 DQ34 11 NC 29 NG 47 WE 65 DQI6 12 AO 30 Vcc 48 NC 66 NC 13 Ai 31 A8 49 DQ9 67 PD1 14 A2 32 AS 50 DQ27 68 PD2 15 A3 33 RASS 51 DQ10 69 PO3 16 A4 34 BASS 52 DQ28 70 PbD4 17 AS 35 DQ26 53 DOT1 71 NC 18 AG 36 Das 54 Daz9 72 Vss PRESENCE DETECT PINS Pin No. Pin name -60 -70 67 PD1 NC NC 88 PD2 Vss Vss 69 PD3 NC Vss 70 PD4 NC NCELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS MSC23836B-xxBS20/DS20 (97.10.11) Rating Symboi Value Unit Voltage on any pin relative to Vss Vin. Vout -1.0~+7.0 Vv Voltage Vec supply relative to Vss Veco -1.0~+7.0 Vv Short circuit output current los 50 mA Power dissipation Pp 20 W Operating temperature Topr --O~+70 C Storage temperature Tste -40 ~+ 125 C Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted within the limits as specified in this data sheet. Exposure to absolute maximum rating conditions for extended period may affect device reliabity. RECOMMENDED OPERATING CONDITIONS Parameter Symbol MIN TYPE MAX UNIT | Operating temperature Supply Voltage Voc 4.5 5.0 5.5 Vv Vss 0 0 0 v 0C ~+ 70C Input high voltage Vin 2.4 - Vec+0.5 Vv Input low voltage Vit -0.5 - 0.8 Vv CAPACITANCE Parameter A0-A10 vO Capacitance measured with Bconton Meter.DC CHARACTERISTICS (Vcc = 5V4 5%, Ta = 0 ~ +70 C) MSC23836B-xxBS20/DS20 (97.10.11) with the output open. 2. Address can be changed once or less while RAS = Vit 3. Address can be changed once or less while TAS = Vjy cys MSC23836B- MSC23836B- Parameter Symbol Condition sonszops20 | 7oBszq/Ds20 | Unit | Note Min Max Min Max Input Leakage Current OVSVins6.5V: . tu Allother pins not | -200 | 200 | -200 {| 200 | HA under test = OV Output Leakage Current Ilo "| Data outis disable | 5g 20 20 20 A : OVSVouts5.5V Ht Output High Voltage Vou low = -5.0mA 2.4 Vee 2.4 Veo Vv Output Low Voltage Vo. | lol = 42mA 0 04 | 0 4 | y Average power supply RAS cycling, : current (Operating) lect TAS cycling - 1090 - 1000 | mA | 1,2 tro=min . TTL - 40 - 40 | mA Power supply current lece RAS=VIH (Standby) TAS =Vin [MOS] 20 - 20 | mA Average power supply RAS cycling, current locs TAS =VIL - 1090 - 1000 | mA 1/1 (RAS only refresh) - tac=min Average power supply . current loce = | tao = min. - qoso | - 1000 | mA | 14 (CAS before RAS refresh) Average power supply RAS = Vit current loc? | TKS cycling - 970 - B80 | mA] 1.3 - (Fast page) tpo = min. NOTE: j. cc is dependent on output loading and cycles rates. Specified values are obtainedAC CHARACTERISTIC (Voc = 5V+ 10 %, Ta = 0 ~70 C) MSC23836B-xxBS20/DS20 (97.10.11) NOTE 1.2.3 Mscesecen- | Mscz23a36n- Parameter Symbol 60BS20/DS20 70BS20/D820 UNIT | NOTE MIN MAX MIN | MAX Random read or write cycle time tac 110 - 130 - ns Fast page mode cycle time tec 40 - 45 - ns Access time from RAS: tRac - 60 - 70 ns |4,5 Access time from TAS tcac - 15 - 20 ns 14,5 Access time from column address =| tAA - 30 - 35 ns 14,6 Access time from TAS precharge. | tcPA - 35 - 40 ns |4 CAS to output in Low-Z toLz 0 - 0 - ns 14 Output buffer turn-off delay lOFF 0 15 0 20 ns |7 Transition time tr 3 50 3 50 ns }3 Refresh period {REF - 32 - 32 ms RAS precharge time tAP 40 - 50 - ns RAS pulse width tRAS 60 10K 70 10K ns RAS pulse width (Fast page mode) |trase | 60 | 100K| 70 | 100K] ns RAS hold time tRSH 15 - 20 : ns TAS precharge time tcp id - 16 - ns TAS pulse width tcas 15 40K 20 i0K ns TAS hold time tesH 60 : 70 - ns TAS to RAS precharge time tcRP 10 - 10 - ns RAS to column address delay time | tRaD 15 30 15 35 ng |6 Row address set-up time taSR 0 - 0 . ns Row address hold time RAH 10 - 10 : ns Column address set-up ime tasc 0 - Q - ns Column address hold time tCAH 15 - 15 - ns Column address to RAS lead time | tRAL 30 - 35 : nsMSC23836B-xxBS20/DS20 (97.10.1f) AC CHARACTERISTICS (Continued) (Voc = 5V t 10 %, Ta = 0 ~70 C) Maro2neeR MSC:23R26R- Parameter Symbol 60BS20/DS20 | 7OBS20/DS20 UNIT | NOTE MIN | MAX | MIN. | MAX Read command set-up time tacs 0 - 0 - ns Read command held time tRCH 0 : 0 - ns |8 Read command hold time reference | ; . . to HAS RRH 0 0 ns |8 Write command set-up time twos 0 - Oo - ns Write command hold time twoH 10 - i3 - ns Write command pulse width twp 10 - 10 . ns Write command to RAS read time tRWL 15 - 20 - ns Write command to TAS read time towL 15 - 20 - ns ' Data-in set-up time tos 0 - 0 - ns Data-in hold time tbH 10 - 15 - ns TAS active delay time from FAS trpc 5 . 5 - |. ons precharge RAS to TAS set-up time Icen 40 . io . ns (CAS before FAS) a TAS hold time (CAS before RAS} tour 10 . 10 . ns WE to RAS precharge time iwRe 10 . 10 7 ns (CAS before RAS) WE hold time from RAS IWRH 10 |: - 10 . ns (CAS before RAS). FAS to WE set-up time(test mode) | aytg 10 . 10 . ns RAS to WE hold time(test mode) tWTH 10 . +0 . nsNOTES: 7. Ny 10, MSC23836B-xxBS20/DS20 (97.10.11) A start-up delay of 200 1s is required after power-up followed bya minimum of 3 initialisation cycles (RAS only refresh or CAS before RAS refresh) before nraAmme dawian ananratinn ia anhinuad Hive US vee VPI CARINE Wa Ghhe PINs Werk When using the internal refresh counter, a minimum of 8 TAS before RAS initialization cycles. is required. AG measurement assume tT = 5 ns. VIH (min.) and VIL (max.) are reference levels for measuring input signals. Transition times are measured beiween ViH and VIL. Measured with a load circuit eqivalent to 2 TTL loads and 100 pF. Operation within the tRCD (max} limit ensures that tRAC (max) can be met. tRop(max) is specified as a reference point only. If tRCD is greater than the specified thcD(max) limit, then access time is controlled by tcAc. Operation within the tRAD (max) limit ensures that tQAC (max) can be met. tRAD(max) is specified as a reference point only. If tRAD is greater than the Specified tRAD (max) limit, then access time is controlled by taa. tOFFdefines the time at which time the output achieves an open circuit condition and is not reforancad to output voltage lavele, tRCH or tRRH must be satisfied for a read cycle. The test mode is initiated by performing a WE and before RAS refresh cycle. This mode is latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheets is an 8-bit parallel test function. CAi0, CAi and CAO are noi used. in a read cycie, if all interal bits are equal, the DQ pin will indicate a high level. If any internal bits are not equal, the DQ pin will indicate alow level. The test mode is cleared and the memory device returned to its.normal operating state by performing a RAS only refresh cycle or a CAS before RAS refresh cycle. In a test mode read cycle, the access time parameters are delayed by 5 ns. The test mode parameters are obtained by adding 5 ns to the normal read cycle values.