© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7930B • Rev. 1.0.3 12
FAN7930B — Critical Conduction Mode PFC Controller
Since the two OVP conditions are quite different,
protection recovering mode is different. Once the first
OVP triggers, switching stops immediately and recovers
switching when the output voltage is decreased with a
hysteresis. When the second OVP triggers, switching
can be recovered only when the VCC supply voltage falls
below VSTOP and builds up higher than VSTART again and
VOVP should be lower than hysteresis. If the second
OVP is not used, the OVP pin must be connected to the
INV pin or to the ground.
VCC
VINV
VOVP
IMOSFET
t
INV OVP
Level hysteresis
Switching stop
only during
OVP
Error on INV
Resistors
Happens
OVP Level
VSTOP VSTART
Switching stop
until VCC drops
below VSTOP and
recovers to
VSTART
If error
still exist,
OVP
triggers
again
OVP Level
Though Output-
Voltage Reduced,
no Switching.
Figure 25. Comparison of First and Second
OVP Recovery Modes
4. Control Range Compensation: On time is controlled
by the output voltage compensator with FAN7930B. Due
to this when input voltage is high and load is light,
control range becomes narrow compared to when input
voltage is low. That control range decrease is inversely
proportional to the double square of the input voltage
(control range ∝1
input voltage 2). Thus at high line,
unwanted burst operation easily happens at light load
and audible noise may be generated from the boost
inductor or inductor at input filter. Different from the
other converters, burst operation in PFC block is not
needed because the PFC block itself is normally
disabled during standby mode. To reduce unwanted
burst operation at light load, an internal control range
compensation function is implemented and shows no
burst operation until 5% load at high line.
5. Zero-Current Detection: Zero-current detection
(ZCD) generates the turn-on signal of the MOSFET
when the boost inductor current reaches zero using an
auxiliary winding coupled with the inductor. When the
power switch turns on, negative voltage is induced at the
auxiliary winding due to the opposite winding direction
(see Equation 1). Positive voltage is induced (see
Equation 2) when the power switch turns off:
ACPFCOUT
IND
AUX
AUX VV
T
T
V
where VAUX is the auxiliary winding voltage; TIND and TAUX
are boost inductor turns and auxiliary winding turns,
respectively; VAC is input voltage for PFC converter; and
VOUT_PFC is output voltage from the PFC converter.
PFC Inductor
Aux. Winding
VINPFC VOUTPFC
ZCD
VTH(ZCD)
+
-
VCC
THD
Optimized
Sawtooth
Generator
Restart
Timer
Gate
Driver
RZCD
CZCD
Negative Clamp
Circuit
Positive Clamp
Circuit
5
S
Q
R
QfMAX
Limit
Optional
Figure 26. Circuit Near ZCD
Because auxiliary winding voltage can swing from
negative to positive voltage, the internal block in ZCD
pin has both positive and negative voltage clamping
circuits. When the auxiliary voltage is negative, an
internal circuit clamps the negative voltage at the ZCD
pin around 0.65 V by sourcing current to the serial
resistor between the ZCD pin and the auxiliary winding.
When the auxiliary voltage is higher than 6.5 V, current
is sinked through a resistor from the auxiliary winding to
the ZCD pin.
ISW
VAUX & VZCD
VACIN
IMOSFET IDIODE
VAUX
VZCD
t
6.2V 0.65V
Figure 27. Auxiliary Voltage Depends
on MOSFET Switching
The auxiliary winding voltage is used to check the boost
inductor current zero instance. When boost inductor
current becomes zero, there is a resonance between
boost inductor and all capacitors at the MOSFET drain
pin, including COSS of the MOSFET; an external
capacitor at the D-S pin to reduce the voltage rising and
falling slope of the MOSFET; a parasitic capacitor at
inductor; and so on to improve performance. Resonated
voltage is reflected to the auxiliary winding and can be
used for detecting zero current of boost inductor and
valley position of MOSFET voltage stress. For valley
detection, a minor delay by the resistor and capacitor is
needed. A capacitor increases the noise immunity at the
ZCD pin. If ZCD voltage is higher than 1.5 V, an internal
ZCD comparator output becomes HIGH and LOW when
the ZCD goes below 1.4 V. At the falling edge of
comparator output, internal logic turns on the MOSFET.