Technical Data {T-Si-1G-00 CD54/74HC4538 File Number 1671. . CD54/74HCT4538 | oe HARRIS SEMICOND SECTOR 2e?E D Ea 4302271 0017993 5 EBHAS High-Speed CMOS Logic fCx tRe nec Dual Retriggerable Precision {oo |. Monostable NMultivibrator ar MONO t Tres | Type Features: = Retriggerable/resettable capability = Trigger and Reset propagation delays independent of Ry, Cx = Triggering from the leading or trailing edge a Qand Q Buffered Outputs available = Separate Resets Yectts iF a Wide Range of Output-Pulse Widths GNDee 92es-30440RI a Schmitt Trigger input on A and B inputs FUNCTIONAL DIAGRAM = Retrigger Time is independent of Cx. The RCA-CD54/74HC4538 and CD54/74HCT4538 are dual Family Features: retriggerable/resettable monostable precision multivibrators a Fanout (Over Temperature Range): for fixed voltage timing applications. An external resistor Standard Outputs - 10 LSTTL Loads (Rx) and an external capacitor (C,) control the timing and Bus Driver Outputs - 15 LSTTL Loads the accuracy for the circuit. Adjustment of Rx and C, & Wide Operating Temperature Range: provides a wide range of output pulse widths from the Q and CD74HC/HCT: -40 to +85C terminals. The propagation delay from trigger input-to- = Balanced Propagation Delay and Transition Times output transition and the propagation delay from reset a Significant Power Reduction Compared to LSTTL input-to-output transition are Independent of Rx and C,. Logie ICs . a Alternate Source is Philips/Signetics Leading-edge triggering (A) and tralling edge triggering @ CD54HC/CD74HC Types: (5) inputs are provided for triggering from either edge of 2 to 6 V Operation the input pulse. An unused. A" input should be tied to Gnd High Noise Immunity: and an unused.B should be tied to Veg. On power up the JC Ni. = 30%, Nin = 30% of Vcc} @ Vee = 5 V Is reset. Unused resets and sections must be terminated. in CD54HCT/CD74HCT Types: normal operation the circuit retriggers on the application 4.5 to 5.5 V Operation of each new trigger pulse. To operate in the non-retrigger- Direct LSTTL input Logic Compatibility - able mode Q is connected to B when leading edge trigger- Vi. = 0.8 V Max., Vin = 2 V Min. ing (A) is used or Q is connected to A when trailing edge CMOS Input Compatibility triggering. (B) is used, The period (7) can be calculated from hs 1 pA @ Vou, Vou T = (0.7) Rx Cx; Ren is 5K Ohms. Cerin is O pF. The CD54HC/HCT4538 are supplied in 16-lead ceramic dual-in-line packages (F suffix). The CD74HC/HCT4538 are supplied in 16-lead dual-in-line plastic packages (E suffix), also In 16-lead dual-in-line surface mount plastic packages (M suffix). The CD54/74HC/HCT4538 are also avallable-In chip form (H suffix). 920$-38465 TERMINAL ASSIGNMENT 586T-51-19 HARRIS SEMICOND SECTOR Technical Data CD54/74HC4538 CD54/74HCT4538 e?vE D BM 4302271 00137994 7 BBHAS Vee Yee Yec i . We Ry L, | Vee coMP > Ir aa) Rt + 6110) c t------- Q T Ls) ~ --C-, { R2 2 ey F [ -- = vi vec ce 7h9) Saas Q HIGH Z at [ [ 7a . R2 | 3 92CM-38447R2 Fig. 1 - Logic diagram (1 mono). TRUTH TABLE INPUTS OUTPUTS 3B R A B Q Q L X xX L H X H x L H x x L L H H L . JL LS H /_ H JL LP H = High Level L = Low Level / = Transition from Low to High \_= Transition trom High to Low FF DETAIL S2CM-3a4a7R2 T= One High Level Pulse LU= One Low Level Pulse X = lerelevant HC/HCT4538 FUNCTIONAL TERMINAL CONNECTIONS Veco TO Gnd TO INPUT PULSE OTHER FUNCTION TERM. NO. TERM. NO. TO TERM. NO. CONNECTIONS MONO, MONO, MONO, MONO, MONO, MONO, MONO, MONO, Leading-Edge Trigger/ Retriggerable _ 3,5 11.43 4 12 Leading-Edge Trigger/ : Non-Retriggerable 3 3. 4 12 5-7 11-9 Traiting-Edge Trigger/ Retriggerable 3 13 4 12 5 " Trailing-Edge Trigger/ . Non-Retriggerable 3 13 5 11 4-6 12-10 NOTES; 1, ARETRIGGERABLE ONE-SHOT MULTIVIBRATOR HAS AN OUTPUT PULSE WIDTH WHICH IS EXTENDED ONE FULL TIME PERIOD (T) AFTER APPLICATION OF THE LAST TRIGGER PULSE, 2. A NON-RETRIGGERABLE ONE-SHOT MULTIVIBRATOR HAS A TIME PERIOD (T) REFERENCED FROM THE APPLI- CATION OF THE FIRST TRIGGER PULSE. INPUT PULSE TRAIN RETRIGGERABLE MODE PULSE WIDTH (A MODE) NON-RETRIGGERABLE MODE PULSE WIDTH (A MODE) 587ee ee ed HARRIS SEMICOND SECTOR 2e7E D mM 4302271 0017995 9 MMHAS Technical Data 51-19 CD54/74HC4538 1-8 CD54/74HCT 4538 MAXIMUM RATINGS, Absolute-Maximum Values: OC SUPPLY-VOLTAGE, (Vec): (Voltages referenced to QroUNd) 1.2... cece cece nec c ene cnn cence nee tenes teen Pe beens eeeenteesnneeteneaeeteneneens 0Sto+7V *DC INPUT DIODE CURRENT, Ik (FOR Vi <-0.5 V OR Vi> Veo + O.5V)..... ee 20MA DC OUTPUT DIODE CURRENT, lox (FOR Vo < -0.5 V OR Vo > Vec +0.5V) . oe. 20mMA DC DRAIN CURRENT, PER OUTPUT (I,) (FOR -0.5 V <Vo < Vee + 0.5V) .. ... 25mA DC Vee OR GROUND CURRENT (Icc) oie ccc c esc e cece nec e ener eee eee ee nee een EOE Ee EEE eee beret tree sneteeeeenetes +50mA POWER. DISSIPATION PER PACKAGE (Po): : For Ta = -40 to 60C (PACKAGE TYPE E) .......-- ces cence eee FOC e eke nen ene eee ent ane ee eee eset ne este et enon ene 500 mW For Ta = +60 to +85C (PACKAGE TYPE E) ...... Lace n eect eee e eee eeeeneteeenncenereenes Derate Linearly at 8 mW/C to 300 mW For Ta = -55 to +100C (PACKAGE TYPE FH) ..... cece eee erence er teen tee en eer e eee e een ee eee bebaeetnenes 500 mW For T, = +100 to +125C (PACKAGE TYPE F, H) .. Derate Linearly at 8 mW/C to 300 mW For Ta = -40 to +70C (PACKAGE TYPE M) coc. cece cece cence etree en ete e eee eee ene erence eee eee ened eee se sn ae eens senneet 400 mw For Ta = +70 to +125C (PACKAGE TYPE M) 2... cece cece cette ence renee reer eceneeenceteee Derate Linearly at 6 mW/C to 70 mW. OPERATING-TEMPERATURE RANGE (Ta): PACKAGE TYPE FiH.......cccceeet ener se eee ees Beene eee ne E EE REO ERE SHEE ORE EEE ES EEE EERE EaEE -55 to +125C PACKAGE TYPE E, Mo... c ccc cce nec ce ee tee eee een en ee nnn ee ree ene tone Ee eRe Rete nee EEO D EEE E GREE tes eR EEE Eo eEE EES -40 to +85C STORAGE TEMPERATURE (Tatg) cise cece csc c sees e een n cena eer e nee e ener nent eee Renee tne ee ee eee E EP eres een EEE EEE eD -65 to +150C LEAD TEMPERATURE (DURING SOLDERING): At distance 1/16 + 1/32 In. (1.59 + 0.79 mm) from case for 10s max. ........+ een ene nent eee seen remnant ee ee enna rerees +265C Unit inserted into a PC Board (min. thicknss 1/16 in., 1.59 mm) with solder contacting lead tips only ........... ener cent ence tena eee naan eeepc ented ee teeeeneeseteeseeeeererees POOOIC *DC INPUT CURRENT FOR Cx Rx PIN = 30 mA RECOMMENDED OPERATING CONDITIONS: For maximum reliability, nominal operating conditions should be selected so that operation is always within the following ranges: : LIMITS CHARACTERISTIC MIN. MAX. UNITS Supply-Voltage Range (For Ta = Full Package-Temperature Range) Voc:* CD54/74HG Types 2 6 Vv CD54/74HCT Types 4.6 5.5 DC Input or Output Voltage V,, Vo 0 Veo Operating Temperature Ta: , CD74 Types -40 #85 6 CD54 Types -55 +425 input Rise and Fali Times t,, tr Reset Input at2V 0 1000 at4.6V 0 500 ns at6V 0 400 Trigger Inputs Aor B- at2V 0 Unlimited at4.5V 0 Unlimited ns at6V 0 Unlimited External Timing Resistor, Rx kQ # External Timing Capacitor, Cx 0 # *Unless otherwise specified, all voltages are referenced to Ground. #The maximum allowable.values of Rx and Cx are a function of leakage of capacitor Cx, the leakage of the HC4538, and leakage due to board layout and surface resistance. Values of Rx and C, should be chosen so that the maximum current into pin 2 or pin 14 is 30 mA. Susceptibility to externally induced noise signals may occur for Rx > 1 MQ. 588T-51-19 Technical Data 5 =< CD54/74HC4538 o STATIC ELECTRICAL CHARACTERISTICS - i x CO74HC4538/CO54HC4538 CD74HCT4538/COS4HCT4538 or ~ TEST TaHC/S4HC 74HC S4HC TEST T4HCT/S4HCT | T4HCT | S4HCT a _CONDITIONS TYPE TYPE TYPE | CONDITIONS TYPE TYPE TYPE 2 CHARACTERISTIC . UNITS -40/ -55/ -40/ -$5/ +25C +#25 nt , lo | Vee were F+sc | oy, lye asec | +125C ru Vv. mA v v v ru Min | Typ |Max | Min [Max | Min [Max Min | Typ |Max | Min |Max | Min [Max Oo m High-Level 2)15]/] f1sf fis] 45 rT Input Voltage Vn 45 13.15] | ]3.15] [3.15] - to} 2;/;];];,2,f,-]2]4 Vv a 6 jaz} } |42] ]a2] 58 Low-Level 2)];-}o5|jo5| | os 45 A Input Voltage = Vy 45] | [135] |1.35f j1asp to}j/]-|/o8| joa| jose] v Liu 6 || 418] | 18} [18 55 ~ . - mu High-Level Vu 2;19)/-]/]igs}] F194} Va Output Voltage Vou or +0.02 45}44] |- 144] [44] or 45)44] |] }44] |44} v CMOS Loads View 6 |59) [/ 159] [597 Vow Va Va . & TTL Loads or 4 4.5 j3.98) ~ | [3.84] [3.7 |] or 45 |3.98| | ~ 43.84] 137 7 Vv oO Ves 2 | 6 |s48] | |sa4]]52]/] vn i Low-Level Va 2|/|for} for] jor Va Oulput Voltage Vo. or 0.02 45[ |] - }o1} 101] [01 or 45 ,- [= [01] - JOT} ~ 101 Vv a CMOS Loads Vox 6] {| foi, o1])]01 Vow So Vi Ve ans TTL Loads or 4 45} | 10.26] 0.33] | 0.4 or 453 | 10.26] ]0.33] -- Jo4 v tid Standard Output Vin 5.2 6 | | |0.26| jo3a3] jo4 Vin Wi Input Leakage Vee Any 1 Current A, BR h 6 | ] [1017 | 21 | | 41 fF Voltage [55 | | Js01] [ot J [at HA eI e@ Input Leakage or . Current h 6 | | 0.05] 7205) [205] Voc 5.5 ]+00s] |#05] [sos] yA & Rx Cx Gnd : & Gnd = Quiescent Vee ; Vee Device or 0 6|{]]s8 | | 80] | 160 or 55|]|8j]}8so0] ;160] 4A Current lee | Gnd , Gnd Active Device Vee Vee Current Q = High &Pins 2814 or 0 6}]]06];/o8e}]1 or 565}/- ]|06] j}oa}]]1 mA @ Veo/4 log | Gna Gnd Additional 45 Quiescent - Davice Current Vee-2.1 | to | | 100/360] 1450] [490] pA per input pin: 1 unit load Alcc* 55 * For dual-supply systams theoretical worst case (Vi = 2.4 V, Vcc = 5.5 V) specification is 1.8 mA. When testing In the Q output must be high. If Q is low (device not triggered) the pull-up P device will be ON and the low resistance path from Voo to the teat pln wil} cause a current far exceeding the specification. HCT Input Loading Table Input Unit Loads* All 0.5 *Unit Load is Alcc limit specified in Static Characteristic Chart, 6.9., 360 uA max, @ 25C. 589e7vE D WM 4302271 0017997 2 MBHAS HARRIS SEMICOND SECTOR Technical Data T-51-19 CD54/74HC4538 CD54/74HCT4538 SWITCHING CHARACTERISTICS (Vcc = 5 V, Ta = 25C, Input t, t= 6 ns) CHARACTERISTIC (oF) : sarang | sarTanGT UNITS Propagation Delay A,BtoQ ten | 15 21 23 . ns A, BtoG ten | 15 21 23 ns Rtoa@ teu | 15 21 17 ns Rtod teu | 15 21 21 ns Power Dissipation Capacitance Cpp*| 136 134 pF Ceo Is used to determine the dynamic power consumption, per one shot. Po = (Ceo + Cx) Veo? fi + E (Ci Vee fo} where: {, = input frequency. fo = output frequency. Cy = output load capacitance. Vcc = supply voltage. assuming fi < r PREREQUISITE FOR SWITCHING FUNCTION LIMITS . . 25 C -40 C to +85 C -55 C to +125 C CHARACTERISTIC | SYMBOL | Vec HC HCT 74HC 74HCT S4HC 54HCT | UNITS Min. |Max. | Min. |Max.| Min. |Max.} Min. |Max. | Min. |Max. | Min. |Max.. Input Pulse Widths | 2 so} }] |100/ ! ] jr2z0f f ] A, B tw 45 16} }]16]-j)20 |] /}] 20 | | 24] |} 2 f ns two 6 14}-|{|j17|/-|]-]-]f2]/]-|- 2 80 |} |] | {100} | |] |120; |] ~]} R two 45 | 16} | 20} | 20] | 26 | | 24 | | 30] ns : 6 14|-|{}]17}|-|]~|-|]20}/-|-|-=+ Reset Recovery : 2 6/;/}};5};-//;]s5s ]/-,-f- Time treo 45 5 - 5 5 ;]5 - 5 _ - ns . 6 5 ||[}]- 5 --j-ji]|5 -~{|-|] Retrigger Time ___ Typical (See Fig. 5) te 5 175 ns 590eve D HARRIS SEMICOND SECTOR T-51-19 . Technical Data 4302271 0017998 4 MBHAS CD54/74HC4538 CD54/74HCT4538 SWITCHING CHARACTERISTICS (C, = 50 pF, Input t, t:= 6 ns) : 25C -40C to +85C -55C to +125C CHARACTERISTIC | SYMBOL | Vec HC HCT 74HC | 74HCT 54HC 54HCT |UNITS Min. |Max.| Min. [Max. | Min. |Max.} Min. |Max.|Min. |Max.| Min. [Max. Propagation Delay, tety 2 |250/ |] | 7316) | | 13768; ] A,BtoQ@ 45 ||50}]]55|] 63] | 69] | 75] | 83] os 6 |4a/|{|]|s54/]}]] } ] { 2 [os0f | |] [315| | | |375) |] A, Btoa tor | 45 | | 50/ |] 55 | | 68 | | 69 | | 75 | | 83 | os 6 |43|/{j]|54/]};]] 64] | 2 {250} | | 1315} | | [376] | R toa. tre 45 ||s50] |40}|63 | |50j}]|75| |] 60] ns , 6 {|4a3}/},]|54]/]] 1,64 [-| ; 2 j250| | | | 315] | |] | 375] | RtoQ teuy 45 ||50}/]50]/|63] |]63||75|]75] ns 6 }4a}/[{[{]]54]/|]-]-]|6]-|- Output tru 2 {7mf}t|]]s]/}] |10;-j- Transition Time tra 45 ||18}]15 /]19] | 19 | | 22; | 22] ns 6 | {113} {]]}16 | | ]|] | 19 | | wen Pulse ; 3 |0641078| | losi2io812) | loeosloei9} | F100, Cx=0.1 pF 5 |0.63]0.77 10.63 | 0.77 |0.602]0.798 0.602 |0.798 [0.595 10.805|0.595 0.805] ms Output Pulse Width Match, Same Pkg. Typ + 1% Input Capacitance G !10}}10/|10] | io} | 10} | 10] pF HC4538 - TA11646C Ta= 25C 5 DC SUPPLY VOLTAGE (Voc) V nero Fig. 2 - K Factor Vs DC Supply Voltage (Vcc)-V. HC/HCT 4538 Vec=5 V, Ta=25'C TIMING CAPACITANCE (Cy) pF al Fig. 4 - K Factor Vs Cx. Mere TA13646C Ta=25 BC SUPPLY VOLTAGE (Vc) V secsscoue Fig. 3 - K Factor Vs DC Supply Voltage (Vec)-. 1 Ta=25C Ry = 10 ~ a i g -E Gi 3 = & Zz = 2 & 10 102 103 104 TIMING CAPACITANCE {Cy) pF teceaseee Fig. 5 - Minimum Retrigger Time Vs Timing Capacitance. 591Technical Data _ CD54/74HC 4538 CD54/74HCT4538 HARRIS SEMICOND SECTOR INPUT LEVEL 5 INPUT A INPUT GND ol T-51-19 27E D 430227) 0017999 & BRHAS Tun {=== 90% Vs - 10% I Vs frHe 92C$-36439R) | . - ' RESET Vs t= : 3 r0.7 Ry Cx Vee GND Yec mw Sf @ND Voc - | a fr SAI------- 80% Q Vs ty L) ~e}p<- trgg-mf (RETRIGGERED PULSE) 592 Fig. 6 Switching Waveforms GND Rese 4/74HC 4/74HCT ; Input Level. Vec 23V Switching Voltage, Vg 50% Vcc 1.3VT-51-19 Technical Data HARRIS CD54/74HC4538 CD54/74HCT4538 SEMICOND SECTOR 27 D M@ 4302271 0018000 7 BHHAS Power-Down Mode During a rapid power-down condition, as would occur with a power-supply short circuit or with a poorly filtered power supply, the energy stored in Cx could discharge into Pin 2 or 14. To avoid possible device damage in this mode, when Cx is = 0.5 microfarad, a protection diode with a 1-ampere or higher rating (1N5395 or equivalent) and a separate ground return for Cx should be provided as. shown in. Fig. 7. Yoo INS395 oR Rx EQUIVALENT 2(14) 16 cy + 20.5 pF 1(15) iy Fig. 7 Rapid power-down protection circuit. An alternate protection method is shown in Fig. 8, where a 51- ohm current-limiting resistor is. inserted in series with Cx Note that a small pulse width decrease will occur however, and Rx must be appropriately increased to obtain the originally desired pulse width. Rx 2(14) 16 51 OHMS Cx + 20.5 pF # 4(15) Fig, 8 Alternate rapid power-down protection circuit. 593