06/19/12
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HEXFET® Power MOSFET
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low on-
resistance per silicon area. Additional features of
this design are a 175°C junction operating temperature,
fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in a wide variety of applications.
S
D
G
Description
lAdvanced Process Technology
lUltra Low On-Resistance
l175°C Operating Temperature
lFast Switching
lRepetitive Avalanche Allowed up to Tjmax
lLead-Free
Features
IRF1404ZPbF
IRF1404ZSPbF
IRF1404ZLPbF
D2Pak
IRF1404ZSPbF
TO-220AB
IRF1404ZPbF
TO-262
IRF1404ZLPbF
Absolute Maximum Ratings
Parameter Units
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V
(S ilicon Limited)
I
D
@ T
C
= 100°C Continuous Drain Current, V
GS
@ 10V A
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V
(P ackage L imited)
I
DM
Pulsed Drain Current
c
P
D
@T
C
= 25°C Power Dissipation W
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
E
AS (Thermally limited)
Single Pulse Avalanche Energy
d
mJ
E
AS
(Tested )
Single Pulse Avalanche Energy Tested Value
h
I
AR
Avalanche Current
c
A
E
AR
Repetitive Avalanche Energy
g
mJ
T
J
Operating Junction and
T
STG
Storage Temperature Range °C
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
i
Thermal Resistance
Parameter Typ. Max. Units
R
θ
JC
Junction-to-Case ––– 0.75
k
R
θCS
Case-to-Sink, Flat Greased Surface
i
0.50 –––
R
θJA
Junction-to-Ambient
i
––– 62
R
θ
JA
Junction-to-Ambient (PCB Mount)
j
––– 40
300 (1.6mm from case )
10 lbf
y
in (1.1N
y
m)
°C/W
Max.
180
l
120
l
710
120
l
-55 to + 175
480
330
See Fig.12a, 12b, 15, 16
200
1.3
± 20
V
(BR)DSS
40V
R
DS(on)
typ. 2.7mΩ
max. 3.7mΩ
I
D (Silicon Limited)
180A
l
I
D (Package Limited)
120A
PD - 96040C
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Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage 40 ––– ––– V
ΔV
(BR)DSS
/ΔT
J
Breakdown Voltage Temp. Coefficient ––– 0.033 ––– V/°C
R
DS(on)
Static Drain-to-Source On-Resistance ––– 2.7 3.7
m
Ω
V
GS(th)
Gate Threshold Voltage 2.0 ––– 4.0 V
gfs Forward Transconductance 170 ––– ––– V
I
DSS
Drain-to-Source Leakage Current ––– ––– 20 μA
––– ––– 250
I
GS S
Gate-to-Source Forward Leakage ––– ––– 200 nA
Gate-to-Source Reverse Leakage ––– ––– -200
Q
g
Total Gate Charge ––– 100 150
Q
gs
Gate-to-Source Charge ––– 31 ––– nC
Q
gd
Gate-to-Drain ("Miller") Charge ––– 42 –––
t
d(on)
Turn-On Delay Time ––– 18 –––
t
r
Rise Time ––– 110 –––
t
d(off)
Turn-Off Delay Time ––– 36 ––– ns
t
f
Fall Time ––– 58 –––
L
D
Internal Drain Inductance ––– 4.5 ––– Between lead,
nH 6mm (0.25in.)
L
S
Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
C
iss
Input Capacitance ––– 4340 –––
C
oss
Output Capacitance ––– 1030 –––
C
rs s
Reverse Transfer Capacitance ––– 550 ––– pF
C
oss
Output Capacitance ––– 3300 –––
C
oss
Output Capacitance ––– 920 –––
C
oss
eff. Effective Output Capacitance ––– 1350 –––
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units
I
S
Continuous Source Current ––– –––
120
l
(Body Diode) A
I
SM
Pulsed Source Current ––– ––– 750
(Body Diode)
c
V
SD
Diode Forward Voltage ––– ––– 1.3 V
t
rr
Reverse Recovery Time ––– 28 42 ns
Q
rr
Reverse Recovery Charge ––– 34 51 nC
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
V
GS
= 20V
V
GS
= -20V
MOSFET symbol
showing the
integral reverse
p-n junction diode.
V
DS
= 25V, I
D
= 75A**
I
D
= 75A**
V
DS
= 32V
Conditions
V
GS
= 10V
e
V
GS
= 0V
T
J
= 25°C, I
S
= 75A**,V
GS
= 0V
e
T
J
= 25°C, I
F
= 75A**, V
DD
= 20V
di/dt = 100A/μs
e
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 75A
e
**
V
DS
= V
GS
, I
D
= 150μA
V
DS
= 40V, V
GS
= 0V
V
DS
= 40V, V
GS
= 0V, T
J
= 125°C
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 32V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 32V
f
V
GS
= 10V
e
V
DD
= 20V
I
D
= 75A**
R
G
= 3.0 Ω
V
DS
= 25V
ƒ = 1.0MHz
IRF1404Z/S/LPbF
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Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance
Vs. Drain Current
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
4.5V
20μs PULSE WIDTH
Tj = 25°C
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID, Drain-to-Source Current (A)
4.5V 20μs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0 40 80 120 160
ID, Drain-to-Source Current (A)
0
40
80
120
160
200
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 15V
20μs PULSE WIDTH
4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0
VGS, Gate-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (
A)
TJ = 25°C
TJ = 175°C
VDS = 15V
20μs PULSE WIDTH
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
0
2000
4000
6000
8000
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0 40 80 120 160
QG Total Gate Charge (nC)
0
4
8
12
16
20
VGS, Gate-to-Source Voltage (V)
VDS= 32V
VDS= 20V
ID= 75A
0.2 0.6 1.0 1.4 1.8
VSD, Source-toDrain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
0 1 10 100 1000
VDS , Drain-toSource Voltage (V)
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 75A
VGS = 10V
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
Thermal Response ( Z thJC )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
40
80
120
160
200
ID , Drain Current (A)
LIMITED BY PACKAGE
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Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3μF
50KΩ
.2μF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage Vs. Temperature
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
25 50 75 100 125 150 175
Starting TJ, Junction Temperature (°C)
0
100
200
300
400
500
600
EAS, Single Pulse Avalanche Energy (mJ)
ID
TOP 31A
53A
BOTTOM 75A
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
1.0
2.0
3.0
4.0
VGS(th) Gate threshold Voltage (V)
ID = 250μA
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Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
1
10
100
1000
10000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ΔTj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 10% Duty Cycle
ID = 75A
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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
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TO-220AB Part Marking Information
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
INTE RNATIONAL PART NUMBER
RECTIFIER
LOT CODE
AS S E MB L Y
LOGO
YEAR 0 = 2000
DAT E CODE
WE E K 19
LINE C
LOT CODE 1789
EXAMPLE: THIS IS AN IRF1010
Note: "P" in assembly line position
indicates "L ead - F ree"
IN THE ASSEMBLY LINE "C"
ASSEMBLED ON WW 19, 2000
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf1404z.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRF1404Z/S/LPbF
10 www.irf.com
D2Pak (TO-263AB) Part Marking Information
DAT E CODE
YE AR 0 = 2000
WEEK 02
A = ASSEMBLY SITE CODE
RECTIFIER
INT ERNAT IONAL PART NUMBER
P = DESIGNATES LEAD - FREE
PRODUCT (OPT IONAL)
F530S
IN THE ASSEMBLY LINE "L"
AS S E MB L E D ON WW 02 , 20 00
THIS IS AN IRF530S WITH
LOT CODE 8024 INT ERNAT IONAL
LOGO
RECTIFIER
LOT CODE
ASSEMBLY YEAR 0 = 2000
PART NUMBER
DAT E CODE
LINE L
WEEK 02
OR
F530S
LOGO
ASSEMBLY
LOT CODE
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf1404z.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRF1404Z/S/LPbF
www.irf.com 11
TO-262 Part Marking Information
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
LOGO
RECTIFIER
INT ERNAT IONAL
LOT CODE
ASSEMBLY
LOGO
RECTIFIER
INTERNATIONAL
DAT E CODE
WEEK 19
YEAR 7 = 1997
PART NUMBER
A = ASSEMBLY SITE CODE
OR
PRODUCT (OPTIONAL)
P = DE S I GNAT E S L E AD- F R E E
EXAMPLE: T HIS IS AN IR L3103L
LOT CODE 1789
ASSEMBLY
PART NUMB E R
DAT E CODE
WEEK 19
LINE C
LOT CODE
YE AR 7 = 1997
AS S E MBL ED ON WW 19, 1997
IN T HE ASSEMBLY LINE "C"
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf1404z.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRF1404Z/S/LPbF
12 www.irf.com
Data and specifications subject to change without notice.
This product has been designed and qualified for theIndustrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/2012
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.11mH
RG = 25Ω, IAS = 75A, VGS =10V. Part not
recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the
same charging time as Coss while VDS is rising
from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for
typical repetitive avalanche performance.
This value determined from sample failure
population. 100% tested to this value in production.
Notes:
This is only applied to TO-220AB pakcage.
This is applied to D2Pak, when mounted on 1" square PCB (FR-
4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994.
TO-220 device will have an Rth value of 0.65°C/W.
Calculated continuous current based on maximum allowable
junction temperature. Bond wire current limit is 120A. Note that
current limitations arising from heating of the device leads may
occur with some lead mounting arrangements.
** All AC and DC test condition based on former Package limited
current of 75A.
D2Pak Tape & Reel Information
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
