© 1998 Élantec, Inc.
EL5421C
General Description
The EL 5421C i s a q uad, lo w power, high voltag e rail-to-ra il inp ut-ou t-
put buffer. Operating on supplies ranging from 5V to 15V, while
consuming only 500µA per channel, the EL5421C has a bandwidth of
12MHz (-3dB). The EL5421C also provides rail-to-rail input and out-
put ability , giving the max imu m dy na m ic range a t any su pp ly vol ta ge.
The EL5421C also features fast slewing and settling times, as well as
a high output drive capability of 30mA (sink and source). These fea-
tures make the EL5421C idea l for use as voltage refe rence buffers in
Thin Film Transistor Liquid Crystal Displays (TFT-LCD). Other
applications include battery power, portable devices and anywhere
low power consumption is important.
The EL542 1C is availabl e in a space sa ving 10-Pin M SOP package
and operates over a temperature range of -40°C to +85°C.
Connection Diagram
1
2
3
4
65
10
9
8
7
EL 5421C (MSO P 10)
VS+V
S-
VINB
VOUTB
VOUTA
VINA VIND
VOUTD
VINC
VOUTC
Features
•12MHz -3dB Bandwidth
•Unity gain buffer
•Supply vol tage = 4.5V to 16 .5 V
•Low supply current (per buffer) =
500µA
•High slew rate = 10V/µs
•Rail to Rail operation
•Ultra-Small Package
Applications
•TFT-LCD Drive Circuits
•Electr onics Notebooks
•Electronics Games
•Personal Communicati on Devices
•Personal Digital Assistants (PDA)
•Portable Instrumentation
•Wireless LANs
•Office Automation
•Active Filters
•ADC/DAC Buffer
Ordering Information
Part No. Temp. Range Package Outline #
EL5421CY -40°C to +8 5 °C 10-Pin MSOP MDP0043
EL5421C
Qua d 12MH z Rail-to-Rail Input-Output Buffer
September 10, 1999
2
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
Absolute Maximum Ratings (TA = 25 °C)
Values beyond absolute maximum ratings can cause the device to be pre-
maturely damaged. Absolute maximum ratings are stress ratings only and
functional device operation is not implied
Supply Voltage between VS+ and VS- +18V
Input Voltage VS- - 0.5V, VS+ +0.5V
Maximum Continuous Output Current 30mA
Maximum Die Temperature +125°C
Storage Temperature -65°C to +150°C
Operating Temperature -40°C to +85°C
Lead Temperature 260°C
Power Dissipation See Curves
ESD Voltage 2kV
Important Note:
All parameters having Min/Max specif ications are guaranteed. Typ values are for informat ion purposes only. Unless otherwise noted, all tests are at the specified tempera ture and are
pulsed tests, therefore: TJ = TC = TA
Electrical Characteristics
VS+ = +5V, VS- = -5V, RL = 10kΩ and CL = 10pF to 0V, TA = 25°C unless otherwise specified.
Parameter Description Condition Min Typ Max Units
Input Characteristics
VOS Input Offset Voltage VCM= 0V 2 12 mV
TCVOS Average Offset Voltage Drift [1] 5µV/°C
IBInput Bias Current VCM= 0V 2 50 nA
RIN Input Impedance 1GΩ
CIN Input Capacitance 1.35 pF
AVVoltage Gain -4.5V <= VOUT <= 4.5V 0.995 1.005 V/V
Output Characteristics
VOL Output Swing Low IL=-5mA -4.92 -4.85 V
VOH Output Swing High IL=5mA 4.85 4.92 V
ISC Short Circuit Current Short to GND ±120 mA
Power Supply Performance
PSRR Power Supply Rejection Ratio VS is moved from ±2.25V to ±7.75V 60 80 dB
ISSupply Current (Per Buffer) No Load 500 750 µA
Dynamic Performance
SR Slew Rate [2] -4.0V ≤ VOUT ≤ 4.0V, 20% to 80% 7 10 V/µs
tSSettling to +0.1% VO=2V Step 500 ns
BW -3dB Bandwidth RL = 10kΩ, CL=10pF 12 MHz
CS Channel Separation f = 5 MHz 75 dB
1. Measured over the operating temperature range.
2. Slew rate is measured on rising and falling edges.
3
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
Electrical Characteristics
VS+ = +5V, VS- = 0V, RL = 10kΩ and CL = 10pF to 2.5V, TA = 25°C unless otherwise specified.
Parameter Description Condition Min Typ Max Units
Input Characteristics
VOS Input Offset Voltage VCM= 2.5V 2 10 mV
TCVOS Average Offset Voltage Drift [1] 5µV/°C
IBInput Bias Current VCM= 2.5V 2 50 nA
RIN Input Impedance 1GΩ
CIN Input Capacitance 1.35 pF
AVVoltage Gain 0.5 <= VOUT <= 4.5V 0.995 1.005 V/V
Output Characteristics
VOL Output Swing Low IL=-5mA 80 150 mV
VOH Output Swing High IL=5mA 4.85 4.92 V
ISC Short Circuit Current Short to GND ±120 mA
Power Supply Performance
PSRR Power Supply Rejection Ratio VS is moved from 4.5V to 15.5V 60 80 dB
ISSupply Current (Per Buffer) No Load 500 750 µA
Dynamic Performance
SR Slew Rate [2 ] 1V ≤ VOUT ≤4V, 20% to 80% 7 10 V/µs
tSSettling to +0.1% VO=2V Step 500 ns
BW -3dB Bandwidth RL = 10 kΩ, CL=10pF 12 MHz
CS Channel Separation f = 5 MHz 75 dB
1. Measured over the operating temperature range.
2. Slew rate is measured on rising and falling edges.
4
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
Electrical Characteristics
VS+ = +15V, VS- = 0V, RL = 10kΩ and CL = 10pF to 7.5V, TA = 25°C unless otherwise specified.
Parameter Description Condition Min Typ Max Units
Input Characteristics
VOS Input Offset Voltage VCM= 7.5V 2 14 mV
TCVOS Average Offset Voltage Drift [1] 5µV/°C
IBInput Bias Current VCM= 7.5V 2 50 nA
RIN Input Impedance 1GΩ
CIN Input Capacitance 1.35 pF
AVVoltage Gain 0.5 <= VOUT <= 14.5V 0.995 1.005 V/V
Output Characteristics
VOL Output Swing Low IL=-5mA 80 150 mV
VOH Output Swing High IL=5mA 14.85 14.92 V
ISC Short Circuit Current Short to GND ±120 mA
Power Supply Performance
PSRR Power Supply Rejection Ratio VS is moved from 4.5V to 15.5V 60 80 dB
ISSupply Current (Per Buffer) No Load 500 750 µA
Dynamic Performance
SR Slew Rate [2 ] 1V ≤ VOUT ≤14V, 20% to 80% 7 10 V/µs
tSSettling to +0.1% VO=2V Step 500 ns
BW -3dB Bandwidth RL = 10 kΩ, CL=10pF 12 MHz
CS Channel Separation f = 5 MHz 75 dB
1. Measured over the operating temperature range.
2. Slew rate is measured on rising and falling edges.
5
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
Typical Performance Curves
Input Offset Voltage Distribution
400
1200
Quantity (Buffer s)
Input Offset Voltage (mV)
0
-12
1800
1600
800
200
1400
1000
600
-10
-8
-6
-4
-2
-0
2
4
6
8
10
12
VS=±5V
TA=25°C
Typical
Production
Distribution
Input Offset Voltage Drift, TCVOS(µV/°C)
1
3
5
7
9
11
13
15
17
19
21
10
50
Quantity (Buffers)
0
70
30
60
40
20
Input Offse t V olta g e Drif t
VS=±5V
Input Bias Current vs Temperature
0.0
Input Bias Current (nA)
Temperature (°C)
-2.0
2.0
Output Low Voltage vs Temperature
-4.95
-4.93
Output Low Voltage (V)
-4.97
-4.91
0 15050-50 100
0 150
Temperature (°C)
50-50 100
-4.92
-4.94
-4.96
VS=±5V
IOUT=-5mA
VS=±5V
Output High Voltage vs Temperature
4.94
4.95
Output High Voltage (V)
4.93
4.97
0 150
Temperature (°C)
50-50 100
4.96 VS=±5V
IOUT=5mA
Input Offset Voltage vs Temperature
0 150
0
5
Input Offset Voltage (mV)
Temperature (°C)
-5
50-50 100
10 VS=±5V
Typical
Production
Distribution
6
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
Supply Current per Channel vs Supply Voltage
520
400
600
Supply Current (µA)
Supply Voltage (V)
300 100
700
500
15
TA=25°C
Slew Rate vs Temperature
0 150
10.30
10.35
Slew Rate (V/µS)
Temperature (°C)
10.25
50-50 100
10.40
Supply Current per Channel vs Tempe r atur e
0.5
0.55
Supply Current (mA)
0.45
0 150
Temperature (°C)
50-50 100
VS=±5V
Frequency Response for Various RL
1M 100M
-5
0
Magnitude (Normalized) (dB)
Frequency (Hz)
-15 10M
100k
5
-10
CL=10pF
VS=±5V
10kΩ
1kΩ
560Ω
150Ω
1M 100M
Frequency (Hz)
10M100k
0
10
Magnitude (Normalized) (dB)
-30
20
-20
-10
Frequency Response for Various CL
12pF
50pF
RL=10kΩ
VS=±5V
100pF
1000pF
Voltage Gain vs Temperature
Voltage Gain (V/V)
0.9995
0 150
Temperature (°C)
50-50 100
1.0005
1.0000
VS=±5V
VS=±5V
7
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
Maximum Outp ut Swing vs Fre que nc y
Maximum Output Swing (V
P-P
)
Frequency (Hz)
10k 100k
0
2
4
12
1M
6
10M
VS=±5V
TA=25°C
RL=10kΩ
CL=12pF
Distortion <1%
8
10
PSRR v s Fr equen cy
100
0
PSRR (dB)
Frequency (Hz)
80
60
40
20
1M 10M
10k 100k
VS=±5V
TA=25°C
1k
PSRR+
PSRR-
Input Voltage Noise Spectral Density vs Frequency
100 100k 100M
10
100
Voltage Noise
(
nV
√
Hz)
Frequency (Hz)
110M1k 10k 1M
600
1k 10k 100k
0.005
0.008
Total Harmonic Distortion + Noise vs Frequency
Frequency (Hz)
THD+ N (%)
Channel Separation vs Frequency Response
1k
-60
X-Talk (dB)
Frequency (Hz)
-140
-120
-100
-80
0.010
0.001
0.003
Dual measured Channel A to B
Quad measured Channel A to D or B to C
Other combinations yield improved rejection.
1M 6M10k 100k
VS=±5V
RL=10kΩ
VIN=220mVRMS
VS=±5V
RL=10kΩ
VIN=1VRMS
0.006
0.009
0.007
0.004
0.002
Output Impedance vs Frequency
Output Impedance (
Ω
)
Frequency (Hz)
10k 100k
0
40
80
120
200
1M
160
10M
VS=±5V
TA=25°C
8
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
50mV 200nS
VS=±5V
TA=25°C
RL=10kΩ
CL=12pF
Small Signal Transient Response
Settling Time vs Step Size
800
-2
2
Step Size (V)
Settling Time (nS)
6000
4
200 400
3
1
-3
0
-1
-4
0.1%
0.1%
VS=±5V
RL=10kΩ
CL=12pF
TA=25°C
1V 1µS
VS=±5V
TA=25°C
RL=10kΩ
CL=12pF
Large Signal Transient Response
10 100 1000
Small-Signal Overshoot vs Load Capacitance
Load Capacitance (pF)
Overshoot (%)
VS=±5V
RL=10kΩ
VIN=±50mV
TA=25°C
50
90
70
30
10
9
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
Pin Description
EL5421C Name Function Equivalent Circuit
1V
OUTA Buffer A Output
2V
INA Buffer A Input
3V
S+ Positive Power Supply
4V
INB Buffer B Input (Reference Circuit 1)
5V
OUTB Buffer B Output (Reference Circuit 2)
6V
OUTC Buffer C Output (Reference Circuit 2)
7V
INC Buffer C Input (Reference Circuit 1)
8V
S- Negative Power Supply
9V
IND Buffer D Input (Reference Circuit 2)
10 VOUTD Buffer D Output (Reference Circuit 1)
VS+
GND VS-
Circuit 1
VS+
VS-
Circuit 2
10
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
Applications Information
Product Description
The EL5421C unity gain buffer is fabricated using a
high voltage CMOS process. It exhibits Rail-to-Rail
input and output capability, and has low power con-
sumption (500µ A per buffer). These f eatures make the
EL5421C ideal for a wide range of general-purpose
applications. When driving a load of 10kΩ and 12pF, the
EL5421C has a -3d B b andwidth o f 12 MHz a n d e x hib its
10V/µS slew rate.
Operating Voltage, Input, and Output
The EL5421C is specified with a single nominal supply
volt age fro m 5V to 15V or a sp lit supp ly wi th its t otal
range from 5V to 15V. Correct operation is guaranteed
for a sup ply range of 4.5V to 16.5 V. Most EL5421C
specifications are stable over both the full supply range
and o perati n g te mper atur es of -40 °C to +85 °C. Param-
eter variations with operating voltage and/or
temperature are shown in the typical performance
curves.
The output swings of the EL5421C typi cally extend to
within 80mV of positive and negative supply rails with
load currents of 5mA. Decreasing load currents will
extend the output volta ge range eve n closer to the suppl y
rails. Figure 1 shows the input and output waveforms for
the de vice. Operati on is from +/-5 V supply with a 10kΩ
load connected to GND. The input is a 10Vp-p sinusoid.
The output voltage is approximately 9.985 VP-P.
Figure 1. Operation with Rail-to-Rail Input and
Output
Short Circuit Current Limit
The EL5421C will limit the shor t circuit current t o +/-
120mA if the ou tpu t is directl y sho rte d to th e positiv e or
the negative supply. If an output is shorted indefinitely,
the power dissipa t ion coul d easily incr ease such t hat the
device may be damaged. Maximum reliability is main-
tained if t he o utp ut co nt inu ous c urren t ne v er exc eed s +/-
30 mA. This limit is set by the design of the internal
metal interconnects.
Output Phase Reversal
The EL5421C is immune to phase reversal as long as the
input voltage is limited from VS- - 0.5V to VS+ +0.5V.
Figure 2 sho ws a photo of t he outp ut of th e devic e with
the input voltage driven beyond the supply rails.
Although the device's output will not change phase, the
input's overvoltage should be avoided. If an input volt-
age exceeds supply voltage by more than 0.6V,
electrostatic protection diodes placed in the input stage
of the device begin to conduct and overvoltage damage
could occur.
Figure 2. Operation with Beyond-the-Rails Input
Power Dissipat ion
With the high-output drive capability of the EL5421C
buffer, it is possi ble to ex ceed th e 125 °C 'absolute-m a x-
imum junction temperature' under certain load current
5V
5V
10µS
VS=±5V
TA=25°C
VIN=10VP-P
Output Input
1V
1V
10µS
VS=±2.5V
TA=25°C
VIN=6VP-P
11
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
conditions. Therefore, it is important to calculate the
maximum junction temperatur e for the application to
determine if load conditions need to be modified for the
buffer to remain in the safe operating area.
The maximum po wer dissipation allowed in a package is
determined according to:
where:
TJMAX = Ma ximum Junction Temperature
TAMAX= Maxi mum Ambient Temperature
ΘJA = Thermal Resist ance of the Package
PDMAX = Maximum Power Dissipation in the Package.
The maximum po wer dissipation actuall y produced by
an IC is the total quiescent supply current times the total
power supply voltage, pl us the power in th e IC due to the
loads, or:
PDMAX = ∑i [VS * ISMAX + (VS+ -VOUTi) * ILOADi]
when sourcing, and
PDMAX = ∑i [VS * ISMAX + (VOUTi-VS-) * ILOADi]
when sinking.
Where:
i = 1 to 4 for Quad
VS = Total Supply Voltage
ISMAX = Maximum Supply Current Per Channel
VOUTi = Maximum Output Voltage of the Application
ILOADi = Load current
If we set the two PDMAX equations equal to each other,
we can solve for RLOADi to avoid dev ice overhea t. Fig-
ure 3 and F igur e 4 pro v ide a conv enie nt wa y to s ee if th e
device will overheat. The maximum safe power dissipa-
tion can be found graphically, based on the package type
and the ambient temperature. By using the previous
equation, it is a simple matter to see if PDMAX ex ceeds
the device’s power derating curves. To ensure proper
operation, it is important to observe the recommended
derating curves shown in Figure 3 and Figure 4.
Figure 3. Package Power Dissipation vs Ambient
Temperature
PDMAX TJMAX TAMAX
–
ΘJA
----------------------------------------------=
JEDEC JESD 51-7 High Effective Thermal Conductivity Test
50 150
400
800
Power Dissipation (mW)
Ambient Temperature (°C)
01000 125
1200
MAX TJ=125°C
25 75
1000
600
200
MSOP10---- Θ
JA
=206°C/W
870mW
12
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
Figure 4. Package Power dissipation vs Ambient
Temperature
Unused Buffers
It is recommended that any unused buffer have the input
tied to the gro und pla n e.
Driving Capacitive Loads
The EL5421C can drive a wide range of capacitive
loads. As l oad capa citanc e increas es, however, t he -3dB
bandwidth of the device will decrease and the peaking
increase. The buffers drive 10pF loads in parallel with
10 kΩ with just 1.5dB of peaking, and 100pF with 6.4dB
of peaking. If less peaking is desired in these applica-
tions, a small series resistor (usually between 5 Ω and 50
Ω) can be placed in series with the outp ut. However , this
will ob viou sly r e duc e th e ga in sli ght ly. Anot he r met hod
of reducing peaking is to add a "snubber" circuit at the
output. A snub ber is a shunt load consist ing of a resistor
in series with a capacitor. Values of 150Ω and 10nF are
typical. The advantage of a snubber is that it does not
draw any DC load current or reduce the gain
Power Supply Bypassing and Print e d Circuit
Board Layout
The EL 5421C can provide ga in at high freque ncy. As
with any high-frequency device, good printed circuit
board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible and the power sup-
ply pins must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, where
the VS- pin is connected t o ground, a 0.1 µF ceramic
capacitor should be placed from VS+ to pin to VS- pin. A
4.7µF tantalum capacitor should then be connected in
parallel, placed in the region of the buffer. One 4.7µF
capacitor may be used for multiple devices. This same
capacitor combination should be placed at each supply
pin to ground if split supplies are to be used.
SEMI G42-88 Single Layer Test Board
50 150
400
800
Power Dissipation (mW)
Ambient Temperature (°C)
01000 125
1200
MAX TJ=125°C
25 75
1000
600
200
MSOP10---Θ
JA
=206°C/W
485mW
13
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL5421C
General Disclaimer
Specifications contained in this data sheet are i n effect as of the publ ication date shown. Elantec, Inc. reserves t he right to make changes in t he cir-
cuitry or specifica tions cont ained he rein a t any time without notice . Ela ntec, Inc . assume s no responsibili ty f or the use of any circui ts described
herein and makes no representations that they are free from patent infringement.
WARNING - Life Supp ort Policy
Elantec, Inc. products are not authorized for and should not be used
within Life Support Systems without the specific written consent of
Elantec, Inc. Life Suppo rt systems are equipme nt intended to sup -
port or sustain life and whose failure to perform when properly used
in accordance with instructions provided can be reasonably
expected to result in significant per sonal i njury or death. Us ers con-
templatin g applicatio n of Elantec, Inc. P roducts in Li fe Support
Systems are requested to contact Elantec, Inc. factory headquarters
to establish suitable terms & conditions for these applications. Elan-
tec, Inc.’s warranty is limited to replacement of defective
component s and does not cov er injury to per sons or prop erty or
other consequential damages.
Élantec, Inc.
675 Tr ade Zone Blvd.
Milpitas, CA 95035
Telephone: (408) 945-1323
(888) ÉLANTEC
Fax: (408) 945-9305
European Office: +44-1 18-977-6080
September 10, 1999
Printed in U.S.A.
