CM3131 Triple Linear Voltage Regulator for DDR-I/-II Memory Features Product Description * The CM3131 family of all-linear regulators provides an integrated power solution for DDR-I/-II memory systems in both run-time and standby modes of operation. The CM3131 is ideal for designs incorporating both a main 3.3V and a standby (3.3V or 5V) supply. The CM3131 features three independent linear regulators for VDDQ, VTT and VSTBY supply regulation and will maintain an accuracy of 1% across the operating temperature range. * * * * * * * * * * Integrated power solution for DDR-I and DDR-II memory systems with few external components Three all-linear regulators for VDDQ, VTT and VSTBY power supply applications Lowest system cost and smallest footprint for DDR power solutions VDDQ regulator/driver utilizes external N-FET to provide up to 15A current at 2.5V/1.8V VTT source/sink regulator provides up to 2A at 1.25V for DDR-I systems or 0.65A at 0.9V for the DDR-II memory controller (not DDR-II memory) LDO standby regulator provides up to 500mA at 2.5V for DDR-I and at 1.8V for DDR-II systems Can be ganged for higher current applications Over temperature and reverse current protection Over current protection for VSTBY and VTT regulator Available in 8 lead and 14 lead PSOP packages Lead-free versions available Applications * * * Desktop PCs, notebooks, and workstations Set top boxes, digital TVs, printers Embedded systems The CM3131 is offered in two configurations. The CM3131-01/11 drives a single external N-FET on a single VDDQ rail. The CM3131-02 drives two external unmatched N-FETs on two VDDQ rails. Each VDDQ rail incorporates an adjustment pin (SENSE) to enable setting VDDQ in the 2.2V to 2.8V range, supporting DIMMs with different supply requirements or DDR-II type devices. The CM3131-01/11 is available in 8-lead PSOP package and the CM3131-02 is available in 14-lead PSOP package. The CM3131 devices are also available with optional lead-free finishing. Electrical Schematic (c) 2004 California Micro Devices Corp. All rights reserved. 02/02/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com 1 CM3131 PACKAGE / PINOUT DIAGRAM TOP VIEW TOP VIEW NC DRIVE V DDQ VTT GND VDDQ1 SEL V TT VSTBY NC CM3131-01/11 GND VCC SEL/EN SENSE VDDQ2 CM3131-02 SENSE2 SENSE1 DRIVE2 VCC DRIVE1 EN VSTBY PSOP-8 PSOP-14 Note: These drawings are not to scale. PIN DESCRIPTIONS PART NUMBER -01 -11 -02 1 1 13 2 3 2 3 4 4 DESCRIPTION NAME VDDQ / VDDQ1 VDDQ input for VREF and VDDQ Output in Standby 14 VTT VTT Output for termination resistors 1 NC No connection 2 GND Ground 3 SEL Select Input, active low 4 NC No connection 7 EN Enable Input, active high 5 5 5 SENSE / SENSE1 6 6 6 VCC Sense Input, Adjusts VDDQ Rail 7 7 8 VSTBY 8 8 9 DRIVE / DRIVE1 Drive Output for VDDQ External n-FET 10 DRIVE2 Drive Output for VDDQ External n-FET 11 SENSE2 12 VDDQ 2 3.3V Main Input Supply 3.3V or 5V Standby Input Supply Sense Input, Adjusts VDDQ Rail VDDQ Input for VREF and VDDQ Output in Standby Ordering Information PART NUMBERING INFORMATION STANDARD FINISH PINS PACKAGE 8 8 14 PSOP-8 PSOP-8 PSOP-14 ORDERING PART NUMBER1 CM3131-01SB CM3131-11SB CM3131-02SB LEAD-FREE FINISH PART MARKETING CM3131-01SB CM3131-11SB CM3131-02SB ORDERING PART NUMBER1 CM3131-01SH CM3131-11SH CM3131-02SH PART MARKING CM3131-01SH CM3131-11SH CM3131-02SH Note 1: Parts are shipped in Tape & Reel form unless otherwise specified. (c) 2004 California Micro Devices Corp. All rights reserved. 02/02/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com 2 CM3131 Functional Description 1.25V to or from the DDR-I bus termination resistors. For DDR-II applications, the regulator sinks or sources 0.65A at 0.9V. The VTT output voltage accurately tracks VDDQ/2 to 1%. When there is no VCC provided, VTT is powered down and its output is 0V. This regulator has overload current limiting of 2.5A. The CM3131-01 / -11 and CM3131-02 provide power for DDR-I/DDR-II memories from three voltage regulators on-chip with either one or two external N-FETs respectively. There is an overtemperature thermal shutdown if any of the regulators overheat. Each regulator has reverse current protection in the event of any being shut down. The standby regulator is a LDO regulator that is powered from a standby voltage, VSTBY, of 3.3V or 5V, and supplies a regulated output of up to 500mA to the VDDQ of the DDR memory to enable it to retain its contents during the standby mode. It provides 2.5V for DDR-I and 1.8V for DDR-II. The linear regulator-driver/s with external N-FET/s can provide up to 15A at 2.5V/1.8V for the VDDQ of DDR-I/-II memory, from an input supply voltage of 2.8V-3.6V. An external feedback resistor divider, connected to the SENSE1 pin, enables selection of VDDQ output voltages from 2.2V to 2.8V for use with DDR-I memories requiring other than 2.5V for VDDQ. VDDQ = 1.25V x (R1+R2)/R2. When SENSE1 is connected to GND or left open, VDDQ is fixed at 2.50V (and VTT at 1.25V). For DDR-II operation, VDDQ can be set from 1.7V to 1.9V. The CM3131-01 and CM3131-11 differ with regards the selection of truth table for determining which S0S5 sequencing matrix the chip is set for. The CM3131-02 has both EN and SEL pins to more accurately define each Sx stage without monitoring the VCC or VSTBY voltages. The VTT regulator is a linear source-sink regulator powered from the VDDQ output that supplies the VTT supply required by DDR-I memory termination resistors. This regulator sinks or sources up to 2A at 2.8V / 3.0V / 3.3V for DDR-I, 2.2V /2.5V / 3.3V for DDR-II VCC PSOP-8 5VSTBY / 3.3VSTBY VDDQ LDO 2.8V / 3.0V / 3.3V for DDR-I, 2.2V /2.5V / 3.3V for DDR-II VCC CM3131-02 DRIVE1 VDDQ LDO Drives DRIVE2 Internal VSBY voltage doubler ensures VG > 5.3V Drives any N-FET with CGS <1200pF CM3131-01/11 VDDQ LDO Drive Two CM3131s can be ganged together to provide VDDQ power to dual channels of DDR memory, and the memory controller chip of any chip set. DRIVE FET VDDQ 5VSTBY / 3.3VSTBY VDDQ R1 SEL / EN VDDQ / VTT Control SENSE CCC Linear Source-Sink VTT Reg GND CDDQ R2 VDDQ CSBY SEL GND VTT VTT Only needed for DDR-I if VDDQ is not 2.5V, e.g. 2.6V or 2.7V. Set to 1.7V to 1.9V for DDR-II EN CCC CTT N-FET2 VDDQ1 VDDQ LDOs VDDQ1 VDDQ2 VDDQ2 R1 VDDQ / VTT Control SENSE1 Linear Source-Sink VTT Reg GND R3 CDDQ2 SENSE2 R2 VDDQ CSBY N-FET1 R4 CDDQ1 GND VTT VTT CTT Examples of Single and Dual N-FET Drive Configurations (c) 2004 California Micro Devices Corp. All rights reserved. 02/02/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com 3 CM3131 Functional Description (cont'd) VCC 3V/3.3V X