1
Features
•Fast Read Access Time – 55 ns
•Low-power CMOS Operation
– 100 µA Max. Standby
– 25 mA Max. Active at 5 MHz
•JEDEC Standard Packages
– 32-lead 600-mil PDIP
– 32-lead PLCC
– 32-lead TSOP
•5V ±=10% Supply
•High-reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latch-up Immunity
•Rapid™ Programming Algorithm – 100 µs/Byte (Typical)
•CMOS- and TTL-compatible Inputs and Outputs
•Integrated Product Identification Code
•Commercial, Industrial and Automotive Temperature Ranges
Description
The AT27C020 is a low-power, high performance, 2,097,152-bit, one-time program-
mable read-only memory (OTP EPROM) organized as 256K by 8 bits. It requires only
one 5V power supply in normal read mode operation. Any byte can be accessed
in less than 55 ns, eliminating the need for speed-reducing WAIT states on high-
performance microprocessor systems.
Rev. 0570D–05/00
2-megabit
(256K x 8)
OTP EPROM
AT27C020
PDIP Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
PGM
A17
A14
A13
A8
A9
A11
OE
A10
CE
07
06
05
04
03
TSOP Top View
Type 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
A14
A17
PGM
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
OE
A10
CE
07
06
05
04
03
GND
02
01
O0
A0
A1
A2
A3
PLCC Top View
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A7
A6
A5
A4
A3
A2
A1
A0
O0
A14
A13
A8
A9
A11
OE
A10
CE
07
4
3
2
1
32
31
30
14
15
16
17
18
19
20
01
02
GND
03
04
05
06
A12
A15
A16
VPP
VCC
PGM
A17
Pin Configurations
Pin Name Function
A0 - A17 Addresses
O0 - O7 Outputs
CE Chip Enable
OE Output Enable
PGM Program Strobe
(continued)
AT27C020
2
In read mode, the AT27C020 typically consumes 8 mA.
Standby mode supply current is typically less than 10 µA.
The AT27C020 is available in a choice of industry-standard
JEDEC-approved one-time programmable (OTP) plastic
PDIP, PLCC and TSOP packages. All devices feature two-
line control (CE, OE) to give designers the flexibility to pre-
vent bus contention.
With 256K bytes storage capability, the AT27C020 allows
firmware to be stored reliably and to be accessed by the
system without the delays of mass storage media.
Atmel’s 27C020 have additional features to ensure high
quality and efficient production use. The Rapid™ Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 100 µs/byte. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry-standard
programming equipment to select the proper programming
algorithms and voltages.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed datasheet limits, resulting in device non-
conformance. At a minimum, a 0.1 µF high-frequency, low
inherent inductance, ceramic capacitor should be utilized
for each device. This capacitor should be connected
between the VCC and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply-voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the VCC and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
Block Diagram
AT27C020
3
Note: 1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
VCC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20 ns.
Notes: 1. X can be VIL or VIH.
2. Refer to Programming Characteristics.
3. VH = 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL) except A9, which is set to VH and A0, which is toggled
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
Absolute Maximum Ratings*
Temperature under Bias ................................ -55°C to +125°C*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V(1)
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
Operating Modes
Mode/Pin CE OE PGM Ai VPP Outputs
Read VIL VIL X(1) Ai X DOUT
Output Disable X VIH XXXHigh-Z
Standby VIH XXXXHigh-Z
Rapid Program(2) VIL VIH VIL Ai VPP DIN
PGM Verify VIL VIL VIH Ai VPP DOUT
PGM Inhibit VIH XX X V
PP High-Z
Product Identification(4) VIL VIL X
A9 = VH(3)
A0 = VIH or VIL
A1 - A17 = VIL
X Identification Code
AT27C020
4
Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.
2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP.
Note: 2, 3, 4, 5. See AC Waveforms for Read Operation diagram.
DC and AC Operating Conditions for Read Operation
AT27C020
-55 -70 -90 -12 -15
Operating
Temperature (Case)
Com. 0°C - 70°C0°C - 70°C0°C - 70°C0°C - 70°C0°C - 70°C
Ind. -40°C - 85°C-40°C - 85°C-40°C - 85°C-40°C - 85°C-40°C - 85°C
Auto. -40°C - 125°C-40°C - 125°C-40°C - 125°C
VCC Power Supply 5V ±=10% 5V ±=10% 5V ±=10% 5V ±=10% 5V ±=10%
DC and Operating Characteristics for Read Operation
Symbol Parameter Condition Min Max Units
ILI Input Load Current VIN = 0V to VCC (Com., Ind.) ±1.0 µA
ILO Output Leakage Current VOUT = 0V to VCC (Com., Ind.) ±5.0 µA
IPP(2) VPP(1) Read/Standby Current VPP = VCC ±10 µA
ISB VCC(1) Standby Current ISB1 (CMOS), CE = VCC=± 0.3V 100 µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1.0 mA
ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL 25 mA
VIL Input Low Voltage -0.6 0.8 V
VIH Input High Voltage 2.0 VCC + 0.5 V
VOL Output Low Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA 2.4 V
AC Characteristics for Read Operation
Symbol Parameter Condition
AT27C020
Units
-55-70-90-12-15
Min Max Min Max Min Max Min Max Min Max
tACC(3) Address to Output Delay CE =OE
= VIL
55 70 90 120 150 ns
tCE(2) CE to Output Delay OE = VIL 55 70 90 120 150 ns
tOE(2)(3) OE to Output Delay CE = VIL 20 30 35 35 40 ns
tDF(4)(5) OE or CE High to Output Float,
whichever occurred first 18 20 20 30 40 ns
tOH
Output Hold from Address, CE
or OE,whichever occurred first 77000 ns
AT27C020
5
AC Waveforms for Read Operation(1)
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
Input Test Waveforms and
Measurement Levels
For -55 devices only:
tR, tF < 5 ns (10% to 90%)
For -70, -90, -12, -15 devices only:
tR, tF < 20 ns (10% to 90%)
Output Test Load
Note: CL = 100 pF including jig capacitance except -55
devices, where CL = 30 pF.
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
0.0V
3.0V
1.5V
AC
DRIVING
LEVELS
AC
MEASUREMENT
LEVEL
Pin Capacitance
f = 1 MHz, T = 25°C(1)
Symbol Typ Max Units Conditions
CIN 48pFV
IN = 0V
COUT 812pFV
OUT = 0V
AT27C020
6
Programming Waveforms (1)
Notes: 1. The Input Timing reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
3. When programming the AT27C020, a 0.1 µF capacitor is required across VPP and ground to suppress voltage transients.
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Symbol Parameter Test Conditions
Limits
UnitsMin Max
ILI Input Load Current VIN = VIL, VIH ±10 µA
VIL Input Low Level -0.6 0.8 V
VIH Input High Level 2.0 VCC + 1.0 V
VOL Output Low Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA 2.4 V
ICC2 VCC Supply Current (Program and Verify) 40 mA
IPP2 VPP Supply Current CE = PGM = VIL 20 mA
VID A9 Product Identification Voltage 11.5 12.5 V
AT27C020
7
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
— see timing diagram.
3. Program Pulse width tolerance is 100 µs ± 5%.
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V,VPP = 13.0 ± 0.25V
Symbol Parameter Test Condition (1)
Limits
UnitsMin Max
tAS Address Setup Time
Input Rise and Fall Times:
(10% to 90%) 20 ns
Input Pulse Levels:
0.45V to 2.4V
Input Timing Reference Level:
0.8V to 2.0V
Output Timing Reference Level:
0.8V to 2.0V
2µs
tCES CE Setup Time 2 µs
tOES OE Setup Time 2 µs
tDS Data Setup Time 2 µs
tAH Address Hold Time 0 µs
tDH Data Hold Time 2 µs
tDFP OE High to Output Float Delay(2) 0 130 ns
tVPS VPP Setup Time 2 µs
tVCS VCC Setup Time 2 µs
tPW PGM Program Pulse Width(3) 95 105 µs
tOE Data Valid from OE 150 ns
tPRT
VPP Pulse Rise Time During
Programming 50 ns
Atmel’s 27C020 Integrated Product Identification Code
Codes
Pins
Hex DataA0 O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer 000011110 1E
Device Type 110000110 86
AT27C020
8
Rapid Programming Algorithm
A 100 µs PGM pulse width is used to program. The
address is set to the first location. VCC is raised to 6.5V and
VPP is raised to 13.0V. Each address is first programmed
with one 100 µs PGM pulse without verification. Then a
verification/reprogramming loop is executed for each
address. In the event a byte fails to pass verification, up to
10 successive 100 µs pulses are applied with a verification
after each pulse. If the byte fails to verify after 10 pulses
have been applied, the part is considered failed. After the
byte verifies properly, the next address is selected until all
have been checked. VPP is then lowered to 5.0V and VCC to
5.0V. All bytes are read again and compared with the origi-
nal data to determine if the device passes or fails.
AT27C020
9
Ordering Information
tACC
(ns)
ICC (mA)
Ordering Code Package Operation RangeActive Standby
55 25 0.1 AT27C020-55JC
AT27C020-55PC
AT27C020-55TC
32J
32P6
32T
Commercial
(0°C to 70°C)
25 0.1 AT27C020-55JI
AT27C020-55PI
AT27C020-55TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
70 25 0.1 AT27C020-70JC
AT27C020-70PC
AT27C020-70TC
32J
32P6
32T
Commercial
(0°C to 70°C)
25 0.1 AT27C020-70JI
AT27C020-70PI
AT27C020-70TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
90 25 0.1 AT27C020-90JC
AT27C020-90PC
AT27C020-90TC
32J
32P6
32T
Commercial
(0°C to 70°C)
25 0.1 AT27C020-90JI
AT27C020-90PI
AT27C020-90TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
25 0.1 AT27C020-90JA
AT27C020-90PA
32J
32P6
Automotive
(-40°C to 125°C)
120 25 0.1 AT27C020-12JC
AT27C020-12PC
AT27C020-12TC
32J
32P6
32T
Commercial
(0°C to 70°C)
25 0.1 AT27C020-12JI
AT27C020-12PI
AT27C020-12TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
25 0.1 AT27C020-12JA
AT27C020-12PA
32J
32P6
Automotive
(-40°C to 125°C)
150 25 0.1 AT27C020-15JC
AT27C020-15PC
AT27C020-15TC
32J
32P6
32T
Commercial
(0°C to 70°C)
25 0.1 AT27C020-15JI
AT27C020-15PI
AT27C020-15TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
25 0.1 AT27C020-15JA
AT27C020-15PA
32J
32P6
Automotive
(-40°C to 125°C)
Package Type
32J 32-lead, Plastic J-leaded Chip Carrier (PLCC)
32P6 32-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
32T 32-lead, Plastic Thin Small Outline Package (TSOP)
AT27C020
10
Packaging Information
.045(1.14) X 45˚ PIN NO. 1
IDENTIFY
.025(.635) X 30˚ - 45˚
.012(.305)
.008(.203)
.021(.533)
.013(.330)
.530(13.5)
.490(12.4)
.030(.762)
.015(.381)
.095(2.41)
.060(1.52)
.140(3.56)
.120(3.05)
.032(.813)
.026(.660)
.050(1.27) TYP
.553(14.0)
.547(13.9)
.595(15.1)
.585(14.9)
.300(7.62) REF
.430(10.9)
.390(9.90)
AT CONTACT
POINTS
.022(.559) X 45˚ MAX (3X)
.453(11.5)
.447(11.4)
.495(12.6)
.485(12.3)
1.67(42.4)
1.64(41.7) PIN
1
.566(14.4)
.530(13.5)
.090(2.29)
MAX
.005(.127)
MIN
.065(1.65)
.015(.381)
.022(.559)
.014(.356)
.065(1.65)
.041(1.04)
.630(16.0)
.590(15.0)
0
15 REF
.690(17.5)
.610(15.5)
.012(.305)
.008(.203)
.110(2.79)
.090(2.29)
.161(4.09)
.125(3.18)
SEATING
PLANE
.220(5.59)
MAX
1.500(38.10) REF
*Controlling dimension: millimeters
INDEX
MARK
18.5(.728)
18.3(.720)
20.2(.795)
19.8(.780)
0.25(.010)
0.15(.006)
0.50(.020)
BSC 7.50(.295)
REF
8.20(.323)
7.80(.307) 1.20(.047) MAX
0.15(.006)
0.05(.002)
0
5REF
0.70(.028)
0.50(.020)
0.20(.008)
0.10(.004)
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-016 AE
32P6, 32-lead, 0.600" Wide, Plastic Dual Inline
Package (PDIP)
Dimensions in Inches and (Millimeters)
32T, 32-lead, Plastic Thin Small Outline Package
(TSOP)
Dimensions in Millimeters and (Inches)*
JEDEC OUTLINE MO-142 BD
© Atmel Corporation 2000.
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