Rev. 1.3 July 2011 www.aosmd.com Page 1 of 11
AOZ1310
Single Channel USB Switch
General Description
The AOZ1310 is a member of Alpha and Omega
Semiconductor’s single-channel power-distribution
switch family intended for applications where heavy
capacitive loads and short-circuits are likely to be
encountered. This device incorporates a 70 mΩ
N-channel MOSFET power switch for power-distribution
systems. The switch is controlled by a logic enable input.
Gate drive is provided by an internal charge pump
designed to control the power-switch rise time and fall
time to minimize current surges during switching. The
charge pump requires no external components and
allows operation from supplies as low as 2.7 V.
The AOZ1310 is available in an SOT23-5 package and is
rated over the -40 °C to +85 °C ambient temperature
range.
Features
zTypical 80 mΩ (NFET)
z0.5A maximum continuous current
zVin range of 2.7 V to 5.5 V
zOpen Drain Fault Flag
zFault Flag deglitched (blanking time)
zThermal shutdown
zReverse current blocking
zPackage: SOT23-5
Applications
zNotebook Computers
zDesktop Computers
Typical Application
AOZ1310
IN
OC
EN
OUT
GND
V
IN
C2
0.1μF
Cin
R1
10kΩ
C1
22μF
LOAD
AOZ1310
Rev. 1.3 July 2011 www.aosmd.com Page 2 of 11
Ordering Information
*Contact factory for availability
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
Pin Description
Part Number
Maximum
Continuous Current Typical Short-circuit
Current Limit Enable
Setting Package Output
Discharge EnvironmentalChannel 1 Channel 2 Channel 1 Channel 2
AOZ1341AI
1 A 1A 1.5 A 1.5 A
Active Low SO-8
No Green Product
RoHS Compliant
AOZ1341EI EPAD MSOP-8
AOZ1341AI-1 Active High SO-8
AOZ1341EI-1 EPAD MSOP-8
AOZ1342PI 1.5 A 1.5A 2 A 2 A Active Low EPAD SO-8
AOZ1342PI-1 Active High EPAD SO-8
AOZ1343AI*
1.5 A 0.5A 2 A 0.75 A
Active Low SO-8
AOZ1343EI* EPAD MSOP-8
AOZ1343AI-1* Active High SO-8
AOZ1343EI-1* EPAD MSOP-8
AOZ1312AI-1 1.5 A None 2 A None Active High SO-8
AOZ1312EI-1 EPAD MSOP-8
AOZ1310CI-1 0.5 A None 0.75 A None Active High SOT23-5
Pin Name Pin Number Pin Function
OUT 1 Power-switch output, IN-OUT
GND 2 Ground
OC 3 Overcurrent, open-drain output, active low, IN-OUT
EN 4 Enable input, logic high turns on power switch, IN-OUT
IN 5 Input voltage
SOT23-5
(Top View)
IN
EN
1
2
3
OUT
GND
OC
5
4
AOZ1310CI-1
AOZ1310
Rev. 1.3 July 2011 www.aosmd.com Page 3 of 11
Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may da mage the
device.
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model is a 100 pF capacitor discharging
through a 1.5 kΩ resistor.
Recommended Operating Conditions
The device is not guaranteed to operate beyond the
Recommended Operating Conditions.
Parameter Rating
Input Voltage (VIN)6 V
Enable Voltage (VEN)6 V
Storage Temperature (TS) -55 °C to +150 °C
ESD Rating(1) 2 kV
Parameter Rating
Input Voltage (VIN) +2.7 V to +5.5 V
Junction Temperature (TJ) -40 °C to +125 °C
Package Thermal Resistance (ΘJA)
SOT23-5 191 °C/W
Electrical Characteristics
TA = 25 °C, VIN = VEN =5.5 V, unless otherwise specified.
Symbol Parameter Conditions(3) Min. Typ. Max. Units
POWER SWITCH
RDS(ON) Switch On-Resistance VIN = 5.5 V, IOUT = 0.5 A 80 145 mΩ
trRise Time, Output VIN = 5.5 V , CL = 1 μF, R L = 10 Ω0.6 1.5 ms
VIN = 2.7 V, CL = 1μF, R L = 10 Ω0.4 1
tfFall Time, Output VIN = 5.5 V 0.05 0.5 ms
VIN = 2.7 V 0.05 0.5
FET Leakage Current Out connect to ground,
VI(ENx) = 5.5 V,
or VI(ENx) = 0 V
-40 °C ≤ TJ ≤ 125 °C(2) 1μA
ENABLE INPUT EN
VIH High-level Input Voltage 2.7V ≤ VIN ≤ 5.5V 2.0 V
VIL Low-level Input Voltage 2.7V ≤ VIN ≤ 5.5V 0.8 V
IIInput Current -0.5 -0.5 μA
ton Turn-on Time CL = 100 μF, R L = 10 Ω3ms
toff Turn-off Time CL = 100 μF, R L = 10 Ω10
CURRENT LIMIT
IOS Short-circuit Output Current 0.5 0.8 1.0 A
IOC_TRIP Overcurrent Trip Threshold 0.6 0.85 1.1 A
SUPPLY CURRENT
Supply Current, Low-level
Output
No load on OUT,
VI(ENx) = 5.5 V,
or VI(ENx) = 0 V
TJ = 25°C 0.5 1 μA
-40 °C ≤ TJ ≤ 125 °C(2) 0.5 5
Supply Current, High-level
Output
No load on OUT,
VI(ENx) = 0 V,
or VI(ENx) = 5.5 V
TJ = 25°C 50 70 μA
-40 °C ≤ TJ ≤ 125 °C(2) 50 90
Reverse Leakage Current VI(OUTx) = 5.5V, IN = ground TJ = 25 °C 0.2 μA
UNDERVOLTAGE LOCKOUT
Low-level Voltage, IN 2 2.5 V
Hysteresis, IN TJ = 25°C 200 mV
AOZ1310
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Note:
2. Parameters are guaranteed by design only and not production tested.
3. Pulse testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
Functional Block Diagram
OVERCURRENT OC
Output low Voltage VOL(OCx) IO(OCx) = 5mA 0.4 V
Off-state Current VO(OCx) = 5V or 3.3V 1 μA
OC_L Deglitch OCx assertion or deassertion 4 8 15 ms
THERMAL SHUTDOWN
Thermal Shutdown
Threshold
135 °C
Recovery from Thermal
Shutdown
105 °C
Hysteresis 30 °C
Electrical Characteristics (Continued)
TA = 25 °C, VIN = VEN =5.5 V, unless otherwise specified.
Symbol Parameter Conditions(3) Min. Typ. Max. Units
Deglitch
IN
EN
OC
OUT
Thermal
Shutdown
Gate Driver
AOZ1310
Current
Limit
UVLO
Comparator
2.5V
AOZ1310
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Functional Characteristics
Figure 1. Turn-On Delay and Rise Time
with 1μF Load (Active High)
Figure 2. Turn-Off Delay and Fall Time
with 1μF Load (Active High)
Figure 3. Turn-On Delay and Rise Time
with 100μF Load (Active High)
Figure 4. Turn-Off Delay and Fall Time
with 100μF Load (Active High)
EN
5V/div
VOUT
2V/div
EN
5V/div
VOUT
2V/div
EN
5V/div
VOUT
2V/div
EN
5V/div
VOUT
2V/div
200μs/div 200μs/div
200μs/div 500μs/div
RL = 10Ω
CL = 1μF
TA = 25°C
RL = 10Ω
CL = 1μF
TA = 25°C
RL = 10Ω
CL = 100μF
TA = 25°C
RL = 10Ω
CL = 100μF
TA = 25°C
AOZ1310
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Typical Characteristics
Figure 5. Supply Current, Output Enabled
vs. Junction Temperature
70
60
50
40
30
20
10
0
Junction Temperature (
°
C)
Supply Current (μA)
Vin=2.7V
Vin=3.3V
Vin=5V
Vin=5.5V
Figure 6. Supply Current, Output Disabled
vs. Junction Temperature
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
Junction Temperature (°C)
Supply Current (μA)
Figure 7. UVLO Threshold vs. Junction Temperature
2.22
2.21
2.20
2.19
2.18
2.17
2.16
2.15
2.14
2.13
2.12
2.11
Junction Temperature (°C)
Threshold (V)
Rising
Falling
-50 0 50 100 150 -50 0 50 100 150
-50 0 50 100 150
Vin=2.7V
Vin=3.3V
Vin=5V
Vin=5.5V
AOZ1310
Rev. 1.3 July 2011 www.aosmd.com Page 7 of 11
Detailed Description
The AOZ1310 is a member of Alpha and Omega
Semiconductor’s single-channel power-distribution
switches family. The AOZ1310 is intended for
applications where heavy capacitive loads and
short-circuits are likely to be encountered. Gate drive is
provided by an internal charge pump designed to control
the power-switch rise times and fall times to minimize
current surges during switching. The charge pump
requires no external components and allows operation
from supplies as low as 2.7 V.
Power Switch
The power switch is a N-channel MOSFET with a low
on-state resistance capable of delivering 1 A of
continuous current. Configured as a high-side switch,
the MOSFET will go into high impedance when disabled.
Thus, preventing current flow from OUT to IN and IN to
OUT.
Charge Pump
An internal charge pump supplies power to the circuits
and provides the necessary voltage to drive the gate of
the MOSFET beyond the source. The charge pump is
capable of operating down to a low voltage of 2.7 Volts.
Driver
The driver controls the voltage on the gate to the power
MOSFET switch. This is used to limit the large current
surges when the switch is being turned On and Off.
Proprietary circuitry controls the rise and fall time of the
output voltages.
Enable
The logic enable disables the power switch, charge
pump, gate driver, logic device, and other circuitry to
reduce the supply current. When the enable receives a
logic high the supply current is reduced to approximately
1 μA. The enable input is compatible with both TTL and
CMOS logic levels.
Over-current
The over-current open drain output is asserted
(active low) when an over-current condition occurs.
The output will remain asserted until the over-current
condition is removed. A 15 ms deglitch circuit prevents
the over-current from false triggering.
Thermal Shut-down Protection
When the output load exceeds the current-limit threshold
or a short is present, the device limits the output current
to a safe level by switching into a constant-current mode,
pulling the overcurrent (OC) logic output low.
During current limit or short circuit conditions, the
increasing power dissipation in the chip causing the die
temperature to rise. When the die temperature reaches a
certain level, the thermal shutdown circuitry will shutdown
the device. The thermal shutdown will cycle repeatedly
until the short circuit condition is resolved.
AOZ1310
Rev. 1.3 July 2011 www.aosmd.com Page 8 of 11
Applications Information
Input Capacitor Selection
The input capacitor prevents large voltage transients
from appearing at the input, and provides the
instantaneous current needed each time the switch turns
on and to limit input voltage drop. The input capacitor
also prevents high-frequency noise on the power line
from passing through the output of the power side. The
choice of the input capacitor is based on its ripple current
and voltage ratings rather than its capacitor value. The
input capacitor should be located as close to the VIN pin
as possible. A 1 μF and above ceramic cap is
recommended. However, higher capacitor values further
reduce the voltage drop at the input.
Output Capacitor Selection
The output capacitor acts in a similar way. A small 0.1 μF
capacitor prevents high-frequency noise from going into
the system. Also, the output capacitor has to supply
enough current for a large load that it may encounter
during system transients. This bulk capacitor must be
large enough to supply fast transient load in order to
prevent the output from dropping.
Power Dissipation Calculation
Calculate the power dissipation for normal load condition
using the following equation:
PD = RON x (IOUT)2
The worst case power dissipation occurs when the load
current hits the current limit due to over-current or short
circuit faults. The power dissipation under these
conditions can be calculated using the following
equation:
PD = (VIN – VOUT) x ILIMIT
Layout Guidelines
Good PCB layout is important for improving the thermal
and overall performance of the AOZ1310. To optimize the
switch response time to output short-circuit conditions
keep all traces as short as possible to reduce the effect of
unwanted parasitic inductance. Place the input and
output bypass capacitors as close as possible to the IN
and OUT pins. The input and output PCB traces should
be as wide as possible for the given PCB space. Use a
ground plane to enhance the power dissipation capability
of the device.
AOZ1310
Rev. 1.3 July 2011 www.aosmd.com Page 9 of 11
Package Dimensions, SOT23-5
Gauge Plane Seating Plane
L2
e1
A2
aaa
A1
0.95
1.90
UNIT: mm
0.80
0.63
2.40
A
eb
C
L
θ
D
EE1
5
1
Notes:
1. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 5 mils.
2. Dimension "L" is measured in gauge plane.
3. Tolerance 0.10mm (4 mil) unless otherwise specified
4. Refer to JEDEC MO-193C AB.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Symbols
A
A1
A2
b
C
D
E
E1
e
e1
L
L2
aaa
θ
Dimensions in millimeters
Min.
—
0.00
0.70
0.35
0.10
2.80
2.60
1.50
0.30
0°
Nom.
—
—
0.88
0.40
0.13
2.90
2.80
1.60
0.95 BSC
1.90 BSC
0.40
0.25 BSC
0.10
—
Max.
1.00
0.10
0.95
0.50
0.20
3.00
3.00
1.70
0.60
8°
Symbols
A
A1
A2
b
C
D
E
E1
e
e1
L
L2
aaa
θ
Dimensions in inches
Min.
—
0.00
0.028
0.014
0.004
0.110
0.102
0.059
0.012
0°
Nom.
—
—
0.035
0.016
0.005
0.114
0.110
0.063
0.037 BSC
0.075 BSC
0.016
0.010 BSC
0.004
—
Max.
0.039
0.004
0.037
0.020
0.008
0.118
0.118
0.067
0.024
8°
RECOMMENDED LAND PATTERN
AOZ1310
Rev. 1.3 July 2011 www.aosmd.com Page 10 of 11
Tape and Reel Dimensions, SOT23-5
Tape
Reel
Leader/Trailer and Orientation
Trailer Tape
300mm min.
Components Tape
Orientation in Pocket
Leader Tape
500mm min.
K0
B0
P0 A0
P1
P2
D0 D1
E1
E2 E
Unit: mm
Unit: mm
J
R
Feeding Direction
Tape Size
8mm
Reel Size
ø177.8
M
ø177.8
Max.
N
55.0
Min.
W1
8.4
+1.50 / -0.0
Package
SOT23-5/6L
LP
A0
3.15
±0.10
B0
3.20
±0.10
K0
1.40
±0.10
D0
1.50
±0.05
D1
1.00
+0.10 / -0
E
8.00
±0.30
E1
1.75
±0.10
E2
3.50
±0.05
P0
4.00
±0.10
P1
4.00
±0.10
P2
2.00
±0.05
T
0.23
±0.03
H
13.0
+0.5 / -0.2
S
1.5
Min
K
10.1
Min.
R
12.7
J
4.0
±0.1
W1
MN
S
K
H
AOZ1310
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Part Marking
AOZ1310CI-1
(SOT23-5)
Year Code and Week Code
Part Number Code
Option Code and Assembly Location
Assembly Lot Code
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
This datasheet contains preliminary data; supplementary data may be published at a later date.
Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
