1
Features
General
High-performance, Low-power secureAVR Enhanced RISC Architecture
133 Powerful Instructions (Most Executed in a Single Clock Cycle)
Low-power Idle and Power-down Modes
Bond Pad Locations Conforming to ISO 7816-2
ESD Protection to ± 6000V
Operating Ranges: from 2.7V to 5.5V
Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible
Available in Wafers, Modules and Industry-standard Packages
Memory
256K Bytes of ROM Program Memory
72K Bytes of EEPROM, Including 128-byte OTP Area and 384-byte Bit-addressable
Bytes
1 to 128-byte Program/Erase
1 ms Program, 1 ms Erase
Typically More than 500,000 Write/Erase Cycles at a Temperature of 25oC
10 Years D ata Retention
EEPROM Erase Only Mode
Write EEPROM With or Without Autoerase
6K Bytes of RAM
Peripherals
ISO 7816 Controll er
Up to 625 kbps at 5 MHz
Compliant with T = 0 and T = 1 Pr otocols
One I/O Port
Programmable Internal Oscillator (Up to 20 MHz on ROM)
Two 16 -bit Timers
Random Number Generator (RNG)
2-level, 7-ve ctor Interrupt Controll er
Hardware DES and Triple DES DPA Resistant
Checksum Accelerator
CRC 16 Engine (Complia nt with ISO/IEC 3309)
Security
Dedicated Hardware for Protection Aga i nst SPA/DPA Attacks
Advanced Protection Against Physical Attack
Environmental Protection Systems
Voltage Monitor
Frequency Monitor
Lig ht Protection
Secure Memory Management/Access Protection (Supervisor Mode)
Development Tools
Vo yager Emulation Platform (ATV2 Advanced) to Support Software Development
IAR Systems C-Spy Debugger or Atmel’s AVR Studio Version 4.07 or Above
Software Libraries and Application Notes
Secure
Microcontroller
for Smart Cards
AT90SC25672R
Summary
Rev. 1585ASSMIC06/03
Note: This is a summary document. A complete document will be
available under NDA. For more information, please contact your
local Atmel sales office.
2
AT90SC25672R
1585AS–SMIC–10Jun03
Description The AT90SC25672R is a low-power, high-performance, 8/16-bit microcontroller with
ROM progra m memory, EEPROM d ata memory, based on the sec ureAVR enhance d
RISC architecture. By executing powerful instructions in a single clock cycle, the
AT90SC25672R achieves throughputs close to 1 MIPS per MHz. Its Harvard architec-
ture includes 32 general-purpose working registers directly connected to the ALU,
allowing two inde penden t regis ters to b e acce ssed in one s ingl e instruc tion e xecut ed in
one clock cycle.
The AT90SC25672R uses a new AVR architecture, the secureAVR that allows the lin-
ear addres sing of up to 8M bytes o f code and u p to 16M by tes of data as well as a
number of new functional and security features.
The abi lity to map the E EP RO M in the code spa ce al low s parts of the pr og ram m emo ry
to be reprogrammed in-system. This technology combined with the versatile 8/16-bit
CPU on a monolithic chip provides a highly flexible and cost-effective solution to many
smart card applications.
Additional security features include power and frequency protection logic, logical scram-
bling on program data and addresses , Power Analysis countermeasures and memory
accesses c ontrolled by a supervi sor mode. A block diagram of the AT90SC25672R is
shown in Figure 1.
Figure 1. AT90SC25672R secureAVR RISC Architecture
Instruction
Decoder
Program
Memory
Instruction
Register
Access
Control
General
Purpose
Registers
X
Y
Z
Status
Register
Timer
Control
Lines
ALU
EEPROM
User Memory
OTP
PC
Secure
Control VCC
GND
CLK
Access
Control
IN/OUT
0
Data Bus
8-bit
RNG
16
16
16 8
88
DES
DPA Counter
Measures
Reset
Circuit RST
RAM
Data Memory
Interrupt
Unit
ISO 7816
I/O Port 0
ISO 7816
Controller
CRC and
Checksum
Accelerator
Printed on recycled paper.
ATMEL® is a registered trademark of Atmel; AVR is a trademark of Atmel.
C-Spy® is a registered trademark of IAR Systems AB . Other terms and product names may be the trademark of
others.
© Atmel Corporation 2003.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty
which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors
which may appear in this docum ent, reserves the right to change devices or specifications detailed herein at any time without notice, and does
not make any commitment to update the inform ation contained herein. No licenses to patents or other intellectual property of At mel are granted
by the Company in conn ection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as crit ical
components in life support devices or systems.
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1585AS–SMIC–10Jun03 xM