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Features
General
•High-performance, Low-power secureAVR Enhanced RISC Architecture
– 133 Powerful Instructions (Most Executed in a Single Clock Cycle)
•Low-power Idle and Power-down Modes
•Bond Pad Locations Conforming to ISO 7816-2
•ESD Protection to ± 6000V
•Operating Ranges: from 2.7V to 5.5V
•Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible
•Available in Wafers, Modules and Industry-standard Packages
Memory
•256K Bytes of ROM Program Memory
•72K Bytes of EEPROM, Including 128-byte OTP Area and 384-byte Bit-addressable
Bytes
– 1 to 128-byte Program/Erase
– 1 ms Program, 1 ms Erase
– Typically More than 500,000 Write/Erase Cycles at a Temperature of 25oC
– 10 Years D ata Retention
•EEPROM Erase Only Mode
•Write EEPROM With or Without Autoerase
•6K Bytes of RAM
Peripherals
•ISO 7816 Controll er
– Up to 625 kbps at 5 MHz
– Compliant with T = 0 and T = 1 Pr otocols
•One I/O Port
•Programmable Internal Oscillator (Up to 20 MHz on ROM)
•Two 16 -bit Timers
•Random Number Generator (RNG)
•2-level, 7-ve ctor Interrupt Controll er
•Hardware DES and Triple DES DPA Resistant
•Checksum Accelerator
•CRC 16 Engine (Complia nt with ISO/IEC 3309)
Security
•Dedicated Hardware for Protection Aga i nst SPA/DPA Attacks
•Advanced Protection Against Physical Attack
•Environmental Protection Systems
•Voltage Monitor
•Frequency Monitor
•Lig ht Protection
•Secure Memory Management/Access Protection (Supervisor Mode)
Development Tools
•Vo yager Emulation Platform (ATV2 Advanced) to Support Software Development
•IAR Systems C-Spy Debugger or Atmel’s AVR Studio Version 4.07 or Above
•Software Libraries and Application Notes
Secure
Microcontroller
for Smart Cards
AT90SC25672R
Summary
Rev. 1585AS–SMIC–06/03
Note: This is a summary document. A complete document will be
available under NDA. For more information, please contact your
local Atmel sales office.