IPD600N25N3 G
Opti
MOS
TM
3 P
owe
r-Transistor
Features
• N-channel, normal level
• Excellent gate charge x
R
DS(on)
product (FOM)
• Very
low on-resistance
R
DS(on)
• 175 °C operating te
m
perature
• Pb-free lead plating; RoHS
com
pliant
• Qualified according to JEDEC
1)
for target appli
cation
• Halogen-free according to IEC61249-2-21
• Ideal for high-frequency
switching and sy
nchronous rectification
Maximum ratings,
at
T
j
=25 °C, unless otherw
ise specified
Parameter
Symbol
Conditions
Unit
Continuous drain current
I
D
T
C
=25 °C
25
A
T
C
=100 °C
18
Pulsed drain current
2)
I
D,pulse
T
C
=25 °C
100
Avalanche energy
, singl
e pulse
E
AS
I
D
=25 A,
R
GS
=25
W
210
mJ
Reverse diode d
v
/d
t
d
v
/d
t
10
kV/µs
Gate source voltage
V
GS
±20
V
Power dissipati
on
P
tot
T
C
=25 °C
136
W
Operating and storage temperature
T
j
,
T
stg
-55 ... 175
°C
IEC climatic category; DIN IE
C 68-1
55/175/56
2)
See figure 3
Value
1)
J-STD20 and JESD22
V
DS
250
V
R
DS(on),max
60
m
W
I
D
25
A
Product Summary
Type
IPD600N25N3 G
Package
PG
-T
O252-3
Marking
600N25N
Rev. 2.3
page 1
2011-07-14
IPD600N25N3 G
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Thermal characteristics
Therm
al resistance, junction - case
R
thJC
-
-
1.1
K/W
R
thJA
m
inimal footprint
-
-
75
6 cm2 cooling area
3)
-
-
50
Electrical characteristics,
at
T
j
=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V
(BR)DSS
V
GS
=0 V,
I
D
=1 mA
250
-
-
V
Gate threshold voltag
e
V
GS(th)
V
DS
=
V
GS
,
I
D
=90 µA
2
3
4
Zero gate voltage d
rain current
I
DSS
V
DS
=200 V,
V
GS
=0 V
,
T
j
=25 °C
-
0.1
1
µA
V
DS
=200 V,
V
GS
=0 V
,
T
j
=125 °C
-
10
100
Gate-source leakage current
I
GSS
V
GS
=20 V,
V
DS
=0 V
-
1
100
nA
Drain-source on-state resistance
R
DS(on)
V
GS
=10 V,
I
D
=25 A
-
51
60
m
W
Gate resistance
R
G
-
2.5
-
W
Transconductance
g
fs
|
V
DS
|
>2|
I
D
|
R
DS(on)max
,
I
D
=25 A
24
47
-
S
Values
Therm
al resistance, junction -
ambient
3)
Device on 40 m
m x 40 mm x 1.5 mm ep
oxy PCB FR4 w
ith 6 cm
2
(one layer, 70 µm
thick) c
opper area fo
r drain
connecti
on. PCB is vertic
al in sti
ll air.
Rev. 2.3
page 2
2011-07-14
IPD600N25N3 G
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Dynamic characteristics
Input capacitance
C
iss
-
1770
2350
pF
Output capacitance
C
oss
-
101
134
Reverse transfer capacitance
C
rss
-
3
-
Turn-on delay
time
t
d(on)
-
10
-
ns
Rise time
t
r
-
10
-
Turn-of
f delay
time
t
d(off)
-
22
-
Fall time
t
f
-
8
-
Gate Charge Characteristics
4)
Gate to source charge
Q
gs
-
8
-
nC
Gate to drain charge
Q
gd
-
2
-
Switching
charge
Q
sw
-
5
-
Gate charge total
Q
g
-
22
29
Gate plateau vol
tage
V
plat
eau
-
4.3
-
V
Output charge
Q
oss
V
DD
=100 V,
V
GS
=0 V
-
45
60
nC
Reverse Diode
Diode continous forward current
I
S
-
-
25
A
Diode pulse current
I
S,pulse
-
-
100
Diode forward voltag
e
V
SD
V
GS
=0 V,
I
F
=25 A
,
T
j
=25 °C
-
0.9
1.2
V
Reverse recovery
time
t
rr
-
114
ns
Reverse recovery
charge
Q
rr
-
700
-
nC
4)
See figure 16 for gate charge parameter definition
V
R
=100 V,
I
F
=12
A,
d
i
F
/d
t
=100 A/µs
T
C
=25 °C
Values
V
GS
=0 V,
V
DS
=100 V
,
f
=1 MHz
V
DD
=100 V,
V
GS
=10 V,
I
D
=12 A
,
R
G
=1.6
W
V
DD
=100 V,
I
D
=12
A,
V
GS
=0 to 10 V
Rev. 2.3
page 3
2011-07-14
IPD600N25N3 G
1 Power dissipation
2 Drain current
P
tot
=f(
T
C
)
I
D
=f(
T
C
);
V
GS
≥
10 V
3 Safe operating area
4 Max. transient thermal impedance
I
D
=f(
V
DS
);
T
C
=25 °C;
D
=0
Z
thJC
=f(
t
p
)
parameter:
t
p
param
eter:
D
=
t
p
/
T
single
pulse
0.01
0.02
0.05
0.1
0.2
0.5
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
-2
10
-1
10
0
Z
thJC
[K/W]
t
p
[s]
0
20
40
60
80
100
120
140
160
0
50
100
150
200
P
tot
[W]
T
C
[°
C]
0
10
20
30
0
50
100
150
200
I
D
[A]
T
C
[°
C]
1 µs
10 µs
100 µs
1 m
s
10 m
s
DC
10
-1
10
0
10
1
10
2
10
3
10
-1
10
0
10
1
10
2
10
3
I
D
[A]
V
DS
[V]
Rev. 2.3
page 4
2011-07-14
IPD600N25N3 G
5 Typ. output characteristics
6 Typ. drain-source on resistance
I
D
=f(
V
DS
);
T
j
=25 °C
R
DS(on)
=f(
I
D
);
T
j
=25 °C
parameter:
V
GS
param
eter:
V
GS
7 Typ. transfer characteristics
8 Typ. forward transconductance
I
D
=f(
V
GS
); |
V
DS
|>
2|
I
D
|
R
DS(on)ma
x
g
fs
=f(
I
D
);
T
j
=25 °C
parameter:
T
j
4.5 V
5 V
7 V
10 V
0
20
40
60
80
100
0
10
20
30
R
DS(on)
[m
W
]
I
D
[A]
25
°C
175
°C
0
10
20
30
40
0
2
4
6
8
I
D
[A]
V
GS
[V]
0
10
20
30
40
50
60
70
80
0
25
50
75
g
fs
[S]
I
D
[A]
4.5 V
5 V
7 V
10 V
0
10
20
30
40
50
60
0
1
2
3
4
5
I
D
[A]
V
DS
[V]
Rev. 2.3
page 5
2011-07-14
IPD600N25N3 G
9 Drain-source on-state resistance
10 Typ. gate threshold voltage
R
DS(on)
=f(
T
j
);
I
D
=25 A;
V
GS
=10 V
V
GS(th)
=f(
T
j
);
V
GS
=
V
DS
parameter:
I
D
11 Typ. capacitances
12 Forward characteristics of reverse diode
C
=f(
V
DS
);
V
GS
=0 V;
f
=1 MHz
I
F
=f(
V
SD
)
parameter:
T
j
typ
98%
0
20
40
60
80
100
120
140
160
180
200
-
60
-
20
20
60
100
140
180
R
DS(on)
[m
W
]
T
j
[°
C]
90 µA
900 µA
0
0.5
1
1.5
2
2.5
3
3.5
4
-
60
-
20
20
60
100
140
180
V
GS(th)
[V]
T
j
[°
C]
Ciss
Coss
Crss
10
1
10
2
10
3
10
4
0
40
80
120
160
C
[pF]
V
DS
[V]
25
°C
175
°C
25
°C, 98%
175
°C, 98%
10
0
10
1
10
2
10
3
0
0.5
1
1.5
2
I
F
[A]
V
SD
[V]
Rev. 2.3
page 6
2011-07-14
IPD600N25N3 G
13 A
valanche characteristics
14 Typ. gate charge
I
AS
=f(
t
AV
);
R
GS
=25
W
V
GS
=f(
Q
ga
te
);
I
D
=12 A pulsed
parameter:
T
j
(start)
parameter:
V
DD
15 Drain-source breakdown voltage
16 Gate charge waveforms
V
BR(DSS)
=f(
T
j
)
;
I
D
=1 mA
50 V
125 V
200 V
0
2
4
6
8
10
0
10
20
30
V
GS
[V]
Q
gate
[nC]
220
230
240
250
260
270
280
290
-
60
-
20
20
60
100
140
180
V
BR(DSS)
[V]
T
j
[°
C]
V
GS
Q
g
ate
V
g
s(
th
)
Q
g
(
th
)
Q
gs
Q
gd
Q
sw
Q
g
25
°C
100
°C
125
°C
1
10
100
1
10
100
1000
I
AS
[A]
t
AV
[µs]
Rev. 2.3
page 7
2011-07-14
IPD600N25N3 G
PG-TO252-3: Ou
tline
Rev. 2.3
page 8
2011-07-14
IPD600N25N3 G
Pub
li
sh
ed
by
Inf
i
neon
T
ec
hno
lo
gie
s
AG
81726 Munic
h, Germany
© 2009 Inf
ineon Tec
hnologies
AG
Al
l
Rig
ht
s
Res
er
ve
d.
Lega
l
Di
sc
la
im
er
The information given in this document shall in no event be regarded as a guarantee of
conditions or characteristics. With
respect to any examples or hints given herein, any ty
pical
values stated herein and/or any information regard
ing the application of the device,
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Inf
or
mat
i
on
For further information on technology, delivery terms and conditions and prices, please
contact the nearest Infineon Technologies Office (
www.infineon.com
).
on the types in question, please contact t
he nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems
only with
the express written approval of Infineon Technologies, if a failure of such components can
reasonably be expected to cause the failure of that life-support device or system
or to affect
the safety or effectiv
eness of that device or s
ystem. Life s
upport devices or systems
are
intended to be implanted in the human body or to support and
/or maintain and sustain
and/or protect human life. If they fail,
it is reasonable to assume that t
he health of the user
or other persons may be endange
red.
Rev. 2.3
page 9
2011-07-14
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