July 1998 F Semiconductor Features HIP2500 Half Bridge 500Vpc Driver Maximum Rating Ability to Interface and Drive N-Channel Power Devices Floating Bootstrap Power Supply for Upper Rail Drive CMOS Schmitt-Triggered Inputs with Hysteresis and Pull-Down Up to 400kHz Operation Single Low Current Bias Supply Latch-Up Immune CMOS Logic Peak Drive... 1... 0.2.0. e eee eee eee Up to 2.0A Gate Drive Rise Time (+125C)....... < 25ns (Typ) Applications High Frequency Switch-Mode Power Supply Induction Heating and Welding Switch Mode Amplifiers AC and DC Motor Drives Electronic Lamp Ballasts Description The HIP2500 is a high voltage integrated circuit (HVIC) optimized to drive N-Channel MOS gated power devices in half bridge topol- ogies. It provides the necessary control for PWM motor drive, power supply, and UPS applications. The SD pin allows external shutdown of gate drive to both upper and lower gate outputs. Und- ervoltage lockout will not allow gating when the bias voltage is too low to drive the external switches into saturation. The HIP2500IP is pin and function compatible to the Interna- tional Rectifier IR2110. The HIP2500 has superior ability to accept negative voltages from the Vg pin to the COM pin due to forward recovery of the lower flyback diode. The HIP2500IB is a SOIC or small outline IC form of the HIP2500. The HIP25001B drives high side and low side refer- enced power switches just like the HIP2500IP. The HIP2500IP1 is a 16 lead Plastic DIP form of the HIP2500. Pins 4 and 5 removed from lead frame to provide extra creep- age and strike distances in high voltage applications. Please see Application Note AN9010 for more information. Functional Block Diagram * Battery Chargers rT TS SSS SS SSS SS SS SS SSS * UPS Inverters Ve s * Noise Cancellation in Amplifier Systems LEVEL -> P y suit > LATCH Ho . . Vs Ordering Information PART TEMP. I NUMBER RANGE (C) PACKAGE PKG NO. SD p> I HIP2500IP -40 to +85 | 14Ld PDIP E14.3 l LOGIC Vec I HIP25001P 1 -40 to +85 | 16 Ld PDIP E16.3 LIN Lo I HIP2500IB_ | -40to+85 |16LdSOIC(W) |M16.3 Vss com Meee Pinouts HIP2500 (PDIP) HIP2500 (SOIC) HIP2500 (PDIP) TOP VIEW TOP VIEW TOP VIEW VW Nf Nf Lo [7] fa] Nc Lo [7 6] Nc Lo [7 6] Nc com [3] 3] Vss com [2] 15] Vss com [2] 15] Vss Vec EI 2] LIN Vec BI 4] LIN Vec Ea 4] LIN 4 13] SD 13] SD ne [5 | 2] HIN 2] HIN Vs [5 ne als wi 7 voo Ne [E FF] Voo EI 2 Yoo vs fo] no vs fo] no Ho [7 3] no Ho [ [3] no Ho [ [3] no CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. File Number 2801 9 Copyright Harris Corporation 1997 {HIP2500 Absolute Maximum Ratings Full Temperature Range Unless Otherwise Noted, All Voltages Referenced to Vgg Unless Otherwise Noted. Floating Supply Voltage, Vg............... Vg-0.5V to Vg+18.0V (Positive Terminal) Floating Supply Voltage, Vg... ... 6... eee (Common Terminal) High Side Channel Output Voltage, Vig .......- -0.5V to Vg+0.5V Fixed Supply Voltage, Voc... 6.6. eee eee -0.5V to 18.0V Low Side Channel Output Voltage, Vio........ -0.5V to Voc+0.5V Logic Supply Voltage, Vpp........--.-.-.+-000- -0.5V to 18.0V Logic Input Voltage, Vij ......-.- 6. eee eee -0.5V to Vpp+0.5V [HIN, LIN & SD (Shutdown)] Vpp to COM and Veg to Vgg Voliage............. -0.5V to 18.0V NOTE: Thermal Information Thermal Resistance (Note 1, Typical) Oya HIP2500IP. 0... ee 75C/W HIP2500IP1.. 0.2.0... eee 80C/W HIP2500IB. 1... ee 90C/W See Maximum Power Dissipation vs Temperature Curve Junction Temperature Range ................. -40C to +125C Storage Temperature Range, Tg............... -40C to +150C Operating Ambient Temperature Range, Ta....... -40C to +85C 1. 94, is measured with the component mounted on an evaluation PC board in free air. CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Recommended DC Operating Conditions Floating Supply Voltage, Vg................ Vg+10V to Vg+15V ~~ Low Side Channel Output Voltage, Vigo ..........-... OV to Voc (Floating Terminal) Logic Supply Voltage, Vpp .......-.----.- eee ee eee 4V to Voc High Side Channel Output Voltage, Vg ........-.6-.- 10Vito Vg Floating Supply Voltage, Vg ..... 26... ee eee -4.0V to 500V (With Respect to Vs) (Common Terminal) Fixed Supply Voltage, Voc... 2... eee eee 10V to 15V_ Vgg and COM potentials to be equal. Electrical Specifications Vo. = (Vg- Vs) = Vpp = 15V, COM = Vgg = 0, Unless Otherwise Noted Ty = +25C Ty = -40C TO +125C PARAMETER SYMBOL MIN TYP MAX MIN TYP MAX | UNITS DC CHARACTERISTICS Quiescent Voc Current lace - 1.5 1.9 - - 2.0 mA Quiescent Vgg Current lass - 300 400 - 300 435 pA Quiescent Vpp Current lapp - 0.1 1 - - 1.8 pA Quiescent Leakage Current lg (500V) - 0.4 3.0 - - - HA Logic Input Pulldown Current, Vin = Vpp IN+ - 12 20 - - 22 HA (HIN, LIN, SD) Logic Input Leakage Current, Vin = Vsg IN- - 0 1 - 0 1 pA (HIN, LIN, SD) Logic Input Positive Going Threshold (Note 2) Vint 7.5 8.0 8.5 7.5 8.0 8.6 Vv Logic Input Negative Going Threshold (Note 2) Von- 5.5 5.9 6.3 5.5 5.9 6.4 Vv Undervoltage Positive Going Threshold UV+ 8.0 9.35 9.99 7.8 - 9.99 Vv Undervoltage Negative Going Threshold UV- 77 9.05 9.69 7.5 - 9.69 Vv Undervoltage Hysteresis (Vcc) UVHYS (Vcc) | 250 - 450 170 - 530 mV Undervoltage Hysteresis (Vgs) UVHYS (Vgs) | 250 - 450 170 - 530 mV Output High Open Circuit Voltage (HO, LO) Voutt+ 14.95 15 - 14.95 15 - Vv Output Low Open Circuit Voltage (HO, LO) Vout- - - 0.05 - - 0.05 Vv Output High Short Circuit Current (Sourcing) loutt+ 1.65 2.1 - 1.15 1.6 - A Output Low Short Circuit Current (Sinking) lout- 1.85 2.3 - 1.35 1.7 - A NOTE: 2. See Figure 8 for logic supply voltages other than 15.0V.HIP2500 Switching Specifications Ty = +25C Ty = -40C TO +125C PARAMETER SYMBOL MIN TYP MAX MIN TYP MAX | UNITS HIGH SIDE CHANNEL WITH 500V OFFSET, C, = 1000pF High Side Turn-On Propagation Delay ton 320 420 525 230 - 725 ns High Side Turn-Off Propagation Delay torr 260 385 450 190 - 625 ns High Side Rise Time tr - 25 50 - 25 50 ns High Side Turn-Off Fall Time te - 25 50 - 25 50 ns LOW SIDE CHANNEL, C, = 1000pF Low Side Turn-On Propagation Delay ton 250 365 450 190 - 600 ns Low Side Turn-Off Propagation Delay torr 175 295 370 125 - 475 ns Low Side Turn-On Rise Time tr - 25 50 - 30 50 ns Low Side Turn-Off Fall Time te - 25 50 - 30 50 ns Shutdown Propagation Delay High Side Shutdown tspHo 300 400 490 200 - 650 ns Low Side Shutdown tspLo 175 320 400 125 - 500 ns HIGH SIDE CHANNEL WITH 500V OFFSET, C, = 1000pF Turn-On Propagation Delay Matching M: 0 - 125 0 - 185 ns (Between HO and LO) Minimum On Output Pulse Width (HO, LO) PWouT(MIN) - 35 50 - 35 55 ns Minimum Off Output Pulse Width (HO, LO) PWootmin 275 440 640 250 440 650 ns Minimum On Input Pulse Width (HIN, LIN) PWonvmin) - 100 145 - 100 175 ns Minimum Off Input Pulse Width (HIN, LIN) PWoFF(MIN) - 110 200 - 110 220 ns Deadtime LO Turn-Off to HO Turn-On DHton - 125 - - 125 - ns Deadtime HO Turn-Off to LO Turn-On DLton - -20 - - -20 - ns MAXIMUM TRANSIENT CONDITIONS Offset Supply Operating Transient dV al a o 250 2 10V IQBS1 n seenechensne, 10V IQBSO s 200 | pct , 5 150 -50 0 50 100 150 JUNCTION TEMPERATURE (C) FIGURE 9. QUIESCENT Vgg SUPPLY CURRENT vs TEMPERATURE PEAK OUTPUT CURRENT (A) === SOURCE DRIVER === SINK DRIVER 0 2 4 6 8 10 12 14 16 SOURCE/SINK DRAIN-SOURCE VOLTAGE FIGURE 11. DRIVER SINK/SOURCE V-I CHARACTERISTIC Ty = -40C TO +125C LOGIC THRESHOLD (V) 5 6 8 10 12 14 16 18 LOGIC SUPPLY VOLTAGE (V) (Vpp TO Vss) FIGURE 8. INPUT LOGIC THRESHOLD vs SUPPLY VOLTS 120 @ 100 y 5 / iD A = 80 F A A J a 60 yf z | Zz 4 O uw tr on herr ira 20 te 0 100 1000 1E4 LOAD CAPACITANCE (pF) FIGURE 10. RISE AND FALL TIME vs LOAD CAPACITANCE 30 28 26 24 22 20 18 16 14 12 10 -50 0 50 100 150 TEMPERATURE (C) FIGURE 12. RISE AND FALL TIME vs TEMPERATURE RISE AND FALL TIME (ns)HIP2500 Typical Performance Curves (Continued) 30 28 26 24 22 20 18 16 14 12 10 RISE AND FALL TIME (ns) 10 11 12 13 14 15 16 SUPPLY VOLTAGE (V) FIGURE 13. RISE AND FALL TIME vs SUPPLY VOLTAGE 460 440 420 400 380 360 340 PROPAGATION DELAY (ns) 320 Ltorr 300 10 11 12 13 14 15 16 SUPPLY VOLTAGE (V) FIGURE 14. PROPAGATION DELAY vs SUPPLY VOLTAGE 700 I =~ Ht # 600 ma ON & ra Htorr qa 500 a Lton 5 LL LO = fe 400 oa Ltorr a an & |e x 300 a 200 -50 0 50 100 150 JUNCTION TEMPERATURE (C) FIGURE 15. PROPAGATION DELAYS AT Vcc = 15V Typical Application Diagram HIP2500 Td LEVEL SHIFT LATCH al lo sD I LOGIC LIN Hy OH TO LoaD @ 0 Vcc UT] ylHIP2500 Dual-in-Line Plastic Packages (PDIP) E14.3 (JEDEC MS-001-AA ISSUE D) 14 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 << FE 2 Al 0.015 - 0.39 - 4 | | A2 o115 | 0195 | 293 4.95 - A ely 4 B 0.014 | 0022 | 0356 | 0.558 - SEATING | PLANE = Bt 0.045 0.070 1.15 1.77 8 D1 Cc 0.008 0.014 0.204 0.355 - Bi < >[e]< eo-| em D 0.735 0.775 | 18.66 19.68 5 E 0.300 0.325 7.62 8.25 6 NOTES: E1 0.240 0.280 6.10 7.11 5 1. Controlling Dimensions: INCH. In case of conflict between e 0.100 BSC 2.54 BSC - English and Metric dimensions, the inch dimensions control. GA 0.300 BSC 762 BSC 6 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. ; ; } oo ; eB - 0.430 - 10.92 7 3. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication No. 95. L 0.115 0.150 2.93 3.81 4 4. Dimensions A, A1 and L are measured with the package seated N 14 14 9 in JEDEC seating plane gauge GS-3. Rev. 0 12/93 . D, D1, and E1 dimensions do not include mold flash or protru- sions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). . Eand are measured with the leads constrained to be per- pendicular to datum | -C- |. . @p and & are measured at the lead tips with the leads uncon- strained. eg must be zero or greater. . B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. . Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).HIP2500 Dual-in-Line Plastic Packages (PDIP) E16.3 (JEDEC MS-001-BB ISSUE D) 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 << FE 2 Al 0.015 - 0.39 - 4 | | A2 o115 | 0195 | 293 4.95 - A ely 4 B 0.014 | 0022 | 0356 | 0.558 - SEATING | PLANE A L B1 0.045 0.070 1.15 1.77 8, 10 D1 Cc 0.008 0.014 0.204 0.355 - Bi < >[e]< eo-| em D 0.735 0.775 | 18.66 19.68 5 E 0.300 0.325 7.62 8.25 6 NOTES: E1 0.240 0.280 6.10 7.11 5 1. Controlling Dimensions: INCH. In case of conflict between e 0.100 BSC 2.54 BSC - English and Metric dimensions, the inch dimensions control. GA 0.300 BSC 762 BSC 6 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. ; ; } oo ; eB - 0.430 - 10.92 7 3. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication No. 95. L 0.115 0.150 2.93 3.81 4 4. Dimensions A, A1 and L are measured with the package seated N 16 16 9 in JEDEC seating plane gauge GS-3. Rev. 0 12/93 . D, D1, and E1 dimensions do not include mold flash or protru- sions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). . Eand are measured with the leads constrained to be per- pendicular to datum | -C- |. . @p and & are measured at the lead tips with the leads uncon- strained. eg must be zero or greater. . B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. . Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).HIP2500 Small Outline Plastic Packages (SOIC) ay m| H SEATING PLANE |-Al___. a + eee ret / - 2 | _ ha KW [a] 0.10(0.004) Fep]o.25(0.010) Mc [AMES] NOTES: WS of 1. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. . Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. . Dimension E does not include interlead flash or protrusions. In- terlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. . The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. . L is the length of terminal for soldering to a substrate. N is the number of terminal positions. . Terminal numbers are shown for reference only. oON . The lead width B, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. sions are not necessarily exact. Controlling dimension: MILLIMETER. Converted inch dimen- M16.3 (JEDEC MS-013-AA ISSUE C) 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - Al 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.3977 0.4133 | 10.10 10.50 3 E 0.2914 0.2992 7.40 7.60 4 e 0.050 BSG 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N 16 16 7 a 0 8 0 8 - Rev. 0 12/93