1. Product profile
1.1 General description
A 1200 W LDMOS power transistor for broadcast applications and industrial applications
in the HF to 500 MHz band.
1.2 Features
Typical pulsed p erfo rmance at freq uency o f 225 M Hz, a supply volt age of 50 V and an
IDq of 40 mA, a tp of 100 μs with δ of 20 %:
Output power = 1200 W
Power gain = 24 dB
Efficiency = 71 %
Easy power control
Integrated ESD protection
Excellent ruggedness
High efficiency
Excellent thermal stability
Designed for broadband operation (10 MHz to 500 MHz)
Compliant to Directive 2002/95/EC, rega rd in g Re str ictio n of Haza rd ous Sub s tances
(RoHS)
1.3 Applications
Industrial, scientific and medical applications
Broadcast transmitter applications
BLF578
Power LDMOS transistor
Rev. 02 — 4 February 2010 Product data sheet
Table 1. Application information
Mode of operation f VDS PLGpηD
(MHz) (V) (W) (dB) (%)
CW 108 50 1000 26 75
pulsed RF 225 50 1200 24 71
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 2 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
2. Pinning information
[1] Connected to flange.
3. Ordering information
4. Limiting values
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
1drain1
2drain2
3gate1
4gate2
5source [1]
5
12
43
4
3
5
1
2
sym11
7
Table 3. Ordering information
Type number Package
Name Description Version
BLF578 -flanged balanced LDMOST cera mic package;
2 mounting holes; 4 leads SOT539A
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage -110 V
VGS gate-source voltage −0.5 +11 V
IDdrain current -88 A
Tstg storage temperature −65 +150 °C
Tjjunction temperature -225 °C
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 3 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
5. Thermal characteristics
[1] Tj is the junction temperature.
[2] Rth(j-c) is measured under RF conditions.
[3] See Figure 1.
6. Characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-c) thermal resistance from junction to case Tj = 150 °C[1][2] 0.14 K/W
Zth(j-c) transient thermal impedance from junction to case Tj = 150 °C; tp = 100 μs; δ = 20 % [3] 0.04 K/W
(1) δ = 1 %
(2) δ = 2 %
(3) δ = 5 %
(4) δ = 10 %
(5) δ = 20 %
(6) δ = 50 %
(7) δ = 100 % (DC)
Fig 1. Transient thermal impedance from junction to case as function of pulse duration
001aak924
0.06
0.12
0.18
Zth(j-c)
(K/W)
0
10−710−1
10−4
10−6110−3
tp (s)
10−51010−2
(7)
(6)
(5)
(4)
(3)
(2)
(1)
Table 6. DC characteristics
Tj = 25
°
C; per section unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS drain-source breakdown
voltage VGS = 0 V; ID = 2.5 mA 110 - - V
VGS(th) gate-source threshold voltage VDS = 10 V; ID = 500 mA 1.25 1.7 2.25 V
VGSq gate-source quiescent voltage VDS = 50 V; ID = 20 mA 0.8 1.3 1.8 V
IDSS drain leakage current VGS = 0 V; VDS = 50 V - - 2.8 μA
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 4 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
6.1 Ruggedness in class-AB operation
The BLF578 is cap able o f withst anding a loa d mismatch corr espondin g to VSWR = 13 : 1
through all phases under the following conditions: VDS = 50 V; IDq = 40 mA; PL = 1200 W
pulsed; f = 225 MHz.
IDSX drain cut-off current VGS = VGS(th) + 3.75 V;
VDS = 10 V 58 70 - A
IGSS gate leakage current VGS = 11 V; VDS = 0 V - - 280 nA
RDS(on) drain-source on-state
resistance VGS = VGS(th) + 3.75 V;
ID = 16.66 A -0.07 -Ω
Crs feedback capacitance VGS = 0 V; VDS = 50 V;
f = 1 MHz - 3 - pF
Ciss input capacitance VGS = 0 V; VDS = 50 V;
f = 1 MHz -403 -pF
Coss output capacitance VGS = 0 V; VDS = 50 V;
f = 1 MHz -138 -pF
Table 7. RF characteristics
Mode of operation: pulsed RF; tp = 100
μ
s;
δ
= 20 %; f = 225 MHz; RF performance at VDS = 50 V;
IDq = 40 mA; Tcase = 25
°
C; unless otherwise specified; in a class-AB production test circuit.
Symbol Parameter Conditions Min Typ Max Unit
Gppower gain PL = 1200 W 23 24 25.4 dB
RLin input return loss PL = 1200 W 14 17.5 -dB
ηDdrain efficiency PL = 1200 W 68 71 - %
VGS = 0 V; f = 1 MHz.
Fig 2. O utput capacitance as a function of drain-source voltage; typical values per
section
Table 6. DC characteristics …continued
Tj = 25
°
C; per section unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
VDS (V)
05020 30 4010
001aaj113
300
150
450
600
750
900
Coss
(pF)
0
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 5 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
7. Application information
7.1 Reliability
TTF (0.1 % failure fraction).
The reliability at pulsed conditions can be calculated as follows: TTF (0.1 %) × 1/ δ.
(1) Tj = 100 °C
(2) Tj = 110 °C
(3) Tj = 120 °C
(4) Tj = 130 °C
(5) Tj = 140 °C
(6) Tj = 150 °C
(7) Tj = 160 °C
(8) Tj = 170 °C
(9) Tj = 180 °C
(10) Tj = 190 °C
(11) Tj = 200 °C
Fig 3. BLF578 electromigration (ID, total device)
001aaj114
102
10
104
103
105
Years
1
Idc (A)
0 20168124
(1) (2) (3) (4) (5) (6)
(7) (8) (9) (10) (11)
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 6 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
8. Test information
8.1 Impedance information
8.2 RF performance
The following figures are measured in a class-AB production test circuit.
8.2.1 1-Tone CW pulsed
Table 8. Typical impedance
Simulated ZS and ZL test circuit impedances.
f ZSZL
MHz Ω Ω
225 3.2 + j2.6 3.7 − j0.2
Fig 4. Defin itio n of tran si s tor imp e da nc e
001aaf05
9
drain
ZL
ZS
gate
VDS = 50 V; IDq = 40 mA; f = 225 MHz; tp = 100 μs;
δ = 20 %. VDS = 50 V; IDq = 40 mA; f = 225 MHz; tp = 100 μs;
δ = 20 %.
(1) PL(1dB) = 61.0 dBm (1260 W)
(2) PL(3dB) = 61.4 dBm (1400 W)
Fig 5. Power gain and drain efficiency as function of
load power; typical values Fig 6. Load Power as function of source power;
typical values
PL (W)
100 16001300700 1000400
001aak926
22
20
24
26
Gp
(dB)
18
40
20
60
80
ηD
(%)
0
Gp
ηD
Ps (dBm)
34 403836
001aak927
65
PL
(dBm)
58
59
60
61
62
63
64
ideal PL
PL
(1)
(2)
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 7 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
VDS = 50 V; f = 225 MHz; tp = 100 μs; δ = 20 %.
(1) IDq = 0 mA
(2) IDq = 40 mA
(3) IDq = 80 mA
(4) IDq = 160 mA
VDS = 50 V; f = 225 MHz; tp = 100 μs; δ = 20 %.
(1) IDq = 0 mA
(2) IDq = 40 mA
(3) IDq = 80 mA
(4) IDq = 160 mA
Fig 7. Power gain as a function of load power;
typical values Fig 8. Drain efficiency as a function of load power;
typical values
PL (W)
100 16001300700 1000400
001aak928
22
20
24
26
Gp
(dB)
18
(4)
(3)
(2)
(1)
PL (W)
100 16001300700 1000400
001aak929
40
20
60
80
ηD
(%)
0
(1)
(2)
(3)
(4)
IDq = 40 mA; f = 225 MHz; tp = 100 μs; δ = 20 %.
(1) VDS = 30 V
(2) VDS = 35 V
(3) VDS = 40 V
(4) VDS = 45 V
(5) VDS = 50 V
IDq = 40 mA; f = 225 MHz; tp = 100 μs; δ = 20 %.
(1) VDS = 30 V
(2) VDS = 35 V
(3) VDS = 40 V
(4) VDS = 45 V
(5) VDS = 50 V
Fig 9. Power gain as a function of load power;
typical values Fig 10. Drain efficiency as a function of load powe r;
typical values
PL (W)
100 16001300700 1000400
001aak931
22
20
24
26
Gp
(dB)
18
(4) (5)
(3)
(2)
(1)
PL (W)
100 16001300700 1000400
001aak933
40
20
60
80
ηD
(%)
0
(1) (2) (3) (4) (5)
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 8 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
8.3 Test circuit
See Table 9 for a list of components.
Fig 11. Class-AB common-source productio n tes t ci rc uit
C7
C8
C3
C4
C1
C2
VGG
VGG
C9
C10
C19
C20
C17
C13
C11
R3
R2
R1
C12
R4
C15
C14
C18
C16
L10
L11
L4
L5
T1
T2
L8
L9
L6
L7
C21
C22
C6
L3
C5
input
50 Ω
C27
C26
C25
C28
VDD
VDD
R6 L2
R5 L1
C23
L12 C24
output
50 Ω
001aaj12
3
See Table 9 for a list of components.
Fig 12. Component layout for class-AB production test circuit
001aaj12
4
C9
C1
C2
C3
C4
R1
R2
C5 C6
C7
C8
T1
C10
C11
C13
C15
C14 C17 C19
C21
T2
C22
C24
C27
C28
C25
C26
R6
R5
L2
L1
C23
C16 C18 C20
R3
R4
C12
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 9 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
[1] American Technical Ceramics type 100B or capacitor of same quality.
Table 9. List of componen ts
For production test circuit, see Figure 11 and Figure 12.
Printed-Circuit Board (PCB): Rogers 5880;
ε
r = 2.2 F/m; height = 0.79 mm; Cu (top/bottom metallization);
thickness copper plating = 35
μ
m.
Component Description Value Remarks
C1, C2, C11, C12 multilayer ceramic chip capacitor 4.7 μFTDK4532X7R1E475Mt020U
C2, C3, C27, C28 multilayer ceramic chip capacitor 100 nF Murata X7R 250 V
C5, C7, C8, C21, C22 multilayer ceramic chip capacitor 1 nF [1]
C6 multilayer ceramic chip capacitor 30 pF [1]
C9, C10, C13, C15 multilayer ceramic chip capacitor 62 pF [1]
C14 multilayer ceramic chip capacitor 36 pF [1]
C16, C17 multilayer ceramic chip capacitor 24 pF [1]
C18 multilayer ceramic chip capacitor 30 pF [1]
C19 multilayer ceramic chip capacitor 27 pF [1]
C20 multilayer ceramic chip capacitor 9.1 pF [1]
C23 multilayer ceramic chip capacitor 13 pF [1]
C24 multilayer ceramic chip capacitor 16 pF [1]
C25, C26 electrolytic capacitor 220 μF; 63 V
L1, L2 3 turns 1 mm copper wire D = 2 mm; length = 3 mm
L3, L12 stripline -(L × W) 15 mm × 2.4 mm
L4, L5, L10, L11 stripline -(L × W) 47 mm × 10 mm
L6, L7, L8, L9 stripline -(L × W) 8 mm × 15 mm
R1, R2 metal film resistor 2 Ω; 0.6 W
R3, R4 metal film resistor 20 Ω; 0.6 W
R5, R6 metal film resistor 1 Ω; 0.6 W
T1, T2 semi rigid coax 50 Ω; 58 mm EZ-141-AL-TP-M17
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 10 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
9. Package outline
Fig 13. Package outline SOT539A
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT539A 10-02-02
00-03-03
0 5 10 mm
scale
p
A
F
b
e
D
U2
L
H
Q
c
5
12
43
D1
E
A
w1AB
M M M
q
U1
H1
C
B
M M
w2C
E1
M
w3
UNIT A
mm
Db
11.81
11.56
0.18
0.10
31.55
30.94 13.72 9.53
9.27
17.12
16.10
10.29
10.03
4.7
4.2
ce U2
0.250.25 0.51
w3
35.56
qw
2
w1
F
1.75
1.50
U1
41.28
41.02
H1
25.53
25.27
p
3.30
3.05
Q
2.26
2.01
EE
1
9.50
9.30
inches 0.465
0.455
0.007
0.004
1.242
1.218
D1
31.52
30.96
1.241
1.219 0.540 0.375
0.365
0.674
0.634
0.405
0.395
0.185
0.165 0.0100.010 0.0201.400
0.069
0.059
1.625
1.615
1.005
0.995
0.130
0.120
0.089
0.079
0.374
0.366
H
3.48
2.97
0.137
0.117
L
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
F
langed balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT539
A
Note
1. millimeter dimensions are derived from the original inch dimensions.
2. recommended screw pitch dimension of 1.52 inch (38.6 mm) based on M3 screw.
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 11 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
10. Abbreviations
11. Revision history
Table 10. Abbreviations
Acronym Description
CW Continuous Wave
EDGE Enhanced Data rates for GSM Evolution
GSM Global System for Mobile communications
HF High Frequency
LDMOS Laterally Diffused Metal-Oxide Semiconductor
LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor
RF Radio Frequency
TTF Time To Failure
VSWR Voltage Standing-Wave Ratio
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF578_2 20100204 Product data sheet -BLF578_1
Modifications: •Table 1 on page 1: added information for CW performance.
•Section 1 on page 1: changed typical value of ηD.
•Table 4 on page 2: changed maximum value of ID.
•Table 5 on page 3: changed value of Rth(j-c).
•Table 5 on page 3: added information about Zth(j-c).
•Figure 1 on page 3: added figure.
•Table 6 on page 3: added values vor VGSq.
•Table 6 on page 3: changed typical valu e of I DSX.
•Table 7 on page 4: changed some values.
•Section 8.2.1 on page 6: changed some graphs.
BLF578_1 20081211 Objective data sheet - -
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 12 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semicond uctors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specificatio n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
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completeness of such information and shall have no liability for the
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Notwithstanding any damages that customer might incur for any reason
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changes to information published in this document, including without
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authorized or warranted to be suitable for use in medical, military, aircraft,
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malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or application s and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liabil i ty related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application /use or t he application/use of customer’s third party
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suitable and fit for the Appl ica tion plann ed. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and t he
product. NXP Semiconductors does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress rating s only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter m s and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
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Semiconductors product expressly states that t he product is automotive
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NXP Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualifie d products in automotive equipment or applica tions.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and st andards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminar y specification.
Product [short] dat a sheet Production This document contains the product specification.
BLF578_2 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 4 February 2010 13 of 14
NXP Semiconductors BLF578
Power LDMOS transistor
product for such au tomotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive appl ications beyond NXP Semiconductors’
standard warrant y and NXP Semiconductors’ product specifications.
12.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors BLF578
Power LDMOS transistor
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 4 February 2010
Document identifier: BLF578_2
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.1 Ruggedness in class-AB operation . . . . . . . . . 4
7 Application information. . . . . . . . . . . . . . . . . . . 5
7.1 Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 6
8.1 Impedance information. . . . . . . . . . . . . . . . . . . 6
8.2 RF performance . . . . . . . . . . . . . . . . . . . . . . . . 6
8.2.1 1-Tone CW pulsed . . . . . . . . . . . . . . . . . . . . . . 6
8.3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13 Contact information. . . . . . . . . . . . . . . . . . . . . 13
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
