Intemational Rectifier preuminary HEXFET Power MOSFET PD 9.1101A IRF7202 Advanced Process Technology Ultra Low On-Resistance we CL" De =- @ P-Channe! Mosfet s CE 11). Voss = -20V Surface Mount s CF sTo Available in Tape & Reel o {Te Rosyon) = 0.250 Dynamic dv/dt Rating Fast Switching - Top View Ip = -2.5A Description Fourth Generation HEXFETs from Internationa! Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an . application with dramatically reduced board space. The package is designed for S0-8 vapor phase, infra red, or wave soldering techniques. Power dissipation of greater than 0.80W is possible in a typical PCB mount application. Absolute Maximum Ratings Parameter Max. Units lo @ Tc =25C __| Continuous Drain Current, Vas @ -10 V -2.5 ln @ Tc=70C _| Continuous Drain Current, Vas @ -10 V -2.0 A Ibu Pulsed Drain Current -10 Pp @ Tc = 25C__| Power Dissipation 2.5 W Pp @ Ta=25C | Power Dissipation (PCB Mount)** 16 Linear Derating Factor 0.020 WPC Linear Derating Factor (PCB Mount)** 0.012 Ves Gate-to-Source Voltage +20 Vv dv/dt Peak Diode Recovery dv/dt @ -3.0 Vins Ts, Tsta Junction and Storage Temperature Range -55 to +150 C Thermal Resistance Parameter Min. Typ. Max. Units Rac Junction-to-PCB = _ 50 CW Rea Junction-to-Ambient (PCB mount)** _ _ 80 ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. Me 485545e 0026519 TIT 91IRF7202 | | a Electrical Characteristics @ Ty = 25C (unless otherwise specified) | - Parameter Min. | Typ. | Max. | Units Test Conditions Vierypss Drain-to-Source Breakdown Voltage 20 | | | V_ |[Vas=0V, in=250uA AVenyoss/AT.| Breakdown Voltage Temp. Coefficient j-0.039} | VC | Reference to 25C, Ip=-imA . . . | 0.21 | 0.25 Vas=10V, Ip=-1.0A | Rosin) Static Drain-to-Source On-Resistance To34 | 0.40 Q. Vasr4.5V,n=0.50A@. | b=-0.50A @ Vesin) Gate Threshold Voltage _- | 1.0 | | -3.0 | V> | Vos=Vas, In=-250nA Ors Forward Transconductance |/26/ S| Vos=-15V, In=-2.5A loss Drain-to-Source Leakage Current = = pA a BY oe TSEC lass Gate-to-Source Forward Leakage | |-100] |, Ves=-20V : Gate-to-Source Reverse Leakage | | 100 Ves=20V Qy Total Gate Charge | 10 | 15 Ip=-2.0A Qe Gate-to-Source Charge. { | 20 | | nC |Vos=-10V Qoa Gate-to-Drain ("Miller") Charge - | 26) Ves=-10V @ | ton) _ | Turn-On Delay:Time - } 1 40 Vop=-10V tr - | Rise Time ee = 15 | 40 ns lp=-1.0A. tayo __ | Turm-Off Delay Time | 37 | 90 Re=6.02 ti __| Fall Time | 2 | 50 Ro=102_ Lo Intemal Drain inductance |25] Jean Oem) Tao a |teneedage Ls Internal Source Inductance - 40 yO ie contact : Ciss input Capacitance |270| Ves=0V Coss Output Capacitance _|-200 | | PF |Vos=20v: Cres _ |Reverse Transfer Capacitance _ 57 _ f=1.0MHz Source-Drain Ratings and Characteristics . . ~ Parameter Min. | Typ. | Max. | Units | - Test Conditions Is Continuous Source Current | | 20 MOSFET symbol D (Body Diode) | . A | Showing the Ism ~ | Pulsed Source Current |. | go integral reverse = @ (Body Diode) p-n junction diode. s Vsp___| Diode Forward Voltage _| -1.4 |'-1.6 | -V__ | Ts=25C, Is=-1.25A, Vas=0V tr: Reverse Recovery Time | 69 | 100 | ns_ | T)=25C, IF=-2.0A On Reverse Recovery Charge _. | 80 | 120 | nC |di/dt=100Aus @ ton Forward Tum-On Time .__. Intrinsic tum-on time is neglegible (tum-on is dominated by Ls+Lp) Notes: ; Repetitive rating; pulse width limited by Isps-2.5A, di/dts90A/us, VopsVisr)pss, max. junction temperature Tys 150C. @ Not Applicable @ Pulse width < 300 1s; duty cycle <2%. Me 4855452 0026520 701 92| IRF7202 -Ip, Drain Current (Amps) -Ip, Drain Current (Amps) a Qa = 10! Cc 2 5 oO & a 6 20us PULSE WIDTH 20us PULSE WIDTH To = 25C Te = 450C 10 10 4ot 10 tod -Vos, Drain-to-Source Voltage (volts) -Vps, Drain-to-Source Voltage (veits) Fig 1. Typical Output Characteristics, Fig 2. Typical Output Characteristics, Tce=25C Tc=150C 2.5 2.0 1.5 1.0 Rps(on): Drain-to-Source On Resistance (Normalized) 0.5 Vos = -15V 20us PULSE WIDTH 00 Ves = ~10V 4 5 6 7 8 8 40 "-60 -40 -20 0 20 40 60 80 100 120 140 160 -Vas, Gate-to-Source Voltage (volts) Ty, Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature M 48554S5e OO2bSe1 645 93IRF7202 | | 700 6S = ov, f = 4MHz Cgs + Cga Cus Crhss Cog + 500 Capacitance (pF) Q Ves, Gate-to-Source Voltage (volts) 0 FIGUAE 12 409 : 104 0 9 12 15 ' -Vpg, Drain-to-Source Voltage (volts) ' Qe, Total-Gate Charge (nC) . Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voitage Gate-to-Source Voltage 102 ~ OPERATION IN THIS AREA LIMITED 2 5 BY Fos (ON) & s g: c 2 & 40 = ~ oO 5 5 is E S . a . & ; 2 gy a gs 5 T. 2 2 Ty=1509C Ves = OV SINGLE o 1.0 1.6 2.0 2.5 3,0 oT 2 5 4 2 5 40 2 5 402 -Vsp, Source-to-Drain Voltage (volts) - - -Vpg, Drain-to-Source Voltage (volts) Fig7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage Me 4855452 OOebSee 584 94-Ip, Drain Current (Amps) IRF7202 DUT. mg) , Voo Jy-t0V Pulse Width < tps Duty Factor < 0.1% H Fig 10a. Switching Time Test Circuit taon) tr taorf) 4 on iV ZA | A , . YN to Case Temperature eo) i. voe___/ ___/ a Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature 10? 10 1 EE mL SINGLE PULSE ete +t; (THERMAL RESPONSE) NOTES: a 4. OUTY FACTOR, D=ti/t2 2. PEAK Ty=Pom x Zthjc + Te Thermal Response (Zajc) 105 1074 105 10% out 4 10 102 103 t,, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case M@ 486554Se 0026523 410 95IRF7202 | _ Current Regulator | Same Type as OUT. 14 t i \ SOK A { 12 T 2uF PL | | ] $-3uF Qg > I \ tov DY Rn SEESSESESSEESETY a + DUT. J+ | + Qes a Qep mF Ves Ya amt pS - L Charge + lg * tp . Current Sampling Resistors Fig 12a. Basic Gate Charge Waveform Fig 12b. Gate Charge Test Circuit Refer to the Appendix Section for the following: Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit ~ See page 328 Appendix B: Package Outline Mechanical Drawing See page 332 Appendix C: Part Marking Information - See page 332 Appendix D: Tape & Reel Information See page 336 Intemational : : [ter] Rectifier MM 48554S2 0026524 357 96