Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
1
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UE3223PSV5.5+otV0.3+22sroticapac4SEYSEY02
UE3423PSV5.5+otV0.3+35sroticapac4SEYSEY82
SP3223EU/3243EU
High Speed Intelligent +3.0V to +5.5V
RS-232 Transceivers
The SP3223EU and 3243EU products are RS-232 transceiver solutions intended for portable or hand-
held applications such as notebook and palmtop computers. The "U" series is based on Sipex's
SP3223E/3243E series and has been enhanced for high speed. The data rate is improved to 1000kbps,
easily meeting the demands of high speed RS-232 applications. The SP3223EU and 3243EU use an
internal high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V
operation. This charge pump and Sipex's driver architecture allow the SP3223EU/3243EU series to
deliver compliant RS-232 performance from a single power supply ranging from +3.0V to +5.5V. The
SP3223EU is a 2-driver/2-receiver device, and the SP3243EU is a 3-driver/5-receiver device, ideal for
laptop/notebook computer and PDA applications. The SP3243EU includes one complementary
receiver that remains alert to monitor an external device's Ring Indicate signal while the device is
shutdown.
The AUTO ON-LINE® feature allows the device to automatically "wake-up" during a shutdown state
when an RS-232 cable is connected and a connected peripheral is turned on. Otherwise, the device
automatically shuts itself down drawing less than 1µA.
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
■
AUTO ON-LINE®
circuitry automatically
wakes up from a 1µA shutdown
■ Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of VCC
Variations
■ Enhanced ESD Specifications:
+15kV Human Body Model
+15kV IEC1000-4-2 Air Discharge
+8kV IEC1000-4-2 Contact Discharge
■ 1000 Kbps minimum transmission rate
■ Ideal for High Speed RS-232 Applications
DESCRIPTION
SELECTION TABLE
Applicable U.S. Patents - 5,306,954; and other patents pending.
®
V-
1
2
3
417
18
19
20
5
6
7
16
15
14
SHUTDOWN
C1+
V+
C1-
C2+
C2-
ONLINE
EN
R1IN
GND
V
CC
T1OUT
STATUS
8
9
10 11
12
13
R2IN
R2OUT
SP3223EU
T2OUT T1IN
T2IN
R1OUT
Now Available in Lead Free Packaging
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
2
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
VCC.......................................................-0.3V to +6.0V
V+ (NOTE 1).......................................-0.3V to +7.0V
V- (NOTE 1)........................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)...........................................+13V
ICC (DC VCC or GND current).........................+100mA
Input Voltages
TxIN, ONLINE,
SHUTDOWN, EN (SP3223EU)...........-0.3V to +6.0V
RxIN...................................................................+25V
Output Voltages
TxOUT.............................................................+13.2V
RxOUT, STATUS.......................-0.3V to (VCC + 0.3V)
Short-Circuit Duration
TxOUT.....................................................Continuous
Storage Temperature......................-65°C to +150°C
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX,
C1 - C4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
Power Dissipation per package
20-pin PDIP (derate 16.0mW/oC above+70oC).....1300mW
20-pin SSOP (derate 9.25mW/oC above +70oC)....750mW
20-pin TSSOP (derate 11.1mW/oC above +70oC)..900mW
28-pin SOIC (derate 12.7mW/oC above +70oC)....1000mW
28-pin SSOP (derate 11.2mW/oC above +70oC).....900mW
28-pin TSSOP (derate 13.2mW/oC above +70oC)......1059mW
32-pin MLPQ (derate 29.4mW/oC above +70oC)........2352mW
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current,AUTO ON-LINE®1.0 10 µAAll RxIN open, ONLINE = GND,
SHUTDOWN = VCC, VCC = +3.3V,
TAMB = +25°C, TxIN = GND or VCC
Supply Current, Shutdown 1.0 10 µASHUTDOWN = GND, VCC = +3.3V,
TAMB = +25°C, TxIN = VCC or GND
Supply Current, 0.3 1.0 mA ONLINE = SHUTDOWN = VCC, no load,
AUTO ON-LINE® Disabled
V
CC
= +3.3V, T
AMB
= +25°C, TxIN = GND or V
CC
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold VCC = +3.3V or +5.0V, TxIN, EN(SP3223EU),
LOW 0.8 V ONLINE, SHUTDOWN
HIGH 2.4 V
Input Leakage Current ±0.01 ±1.0 µATxIN, EN, ONLINE, SHUTDOWN,
TAMB = +25°C, VIN = 0V to VCC
Output Leakage Current ±0.05 ±10 µAReceivers disabled, VOUT = 0V to VCC
Output Voltage LOW 0.4 V IOUT = 1.6mA
Output Voltage HIGH VCC - 0.6 VCC - 0.1 V IOUT = -1.0mA
DRIVER OUTPUTS
Output Voltage Swing ±5.0 ±5.4 V All driver outputs loaded with 3KΩ to GND,
TAMB = +25°C
Output Resistance 300 ΩVCC = V+ = V- = 0V, VOUT = ±2V
Output Short-Circuit Current ±35 ±60 mA VOUT = 0V
Output Leakage Current ±25 µAV
CC = 0V or 3.0V to 5.5V, VOUT = ±12V,
Drivers disabled
ELECTRICAL CHARACTERISTICS
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
3
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX,
C1 - C4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
RECEIVER INPUTS
Input Voltage Range -25 25 V
Input Threshold LOW 0.6 1.2 V VCC = 3.3V
Input Threshold LOW 0.8 1.5 V VCC = 5.0V
Input Threshold HIGH 1.5 2.4 V VCC = 3.3V
Input Threshold HIGH 1.8 2.4 V VCC = 5.0V
Input Hysteresis 0.3 V
Input Resistance 3 5 7 kΩ
AUTO ON-LINE® CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC)
STATUS Output Voltage LOW 0.4 V IOUT = 1.6mA
STATUS Output Voltage HIGH VCC - 0.6 V IOUT = -1.0mA
Receiver Threshold to Drivers 200 µSFigure 19
Enabled (tONLINE)
Receiver Positive or Negative 0.5 µSFigure 19
Threshold to STATUS HIGH
(tSTSH)
Receiver Positive or Negative 20 µSFigure 19
Threshold to STATUS LOW
(tSTSL)
TIMING CHARACTERISTICS
Maximum Data Rate 1000 Kbps RL = 3KΩ, CL = 250pF, one driver active
Receiver Propagation Delay
tPHL 0.15 µsReceiver input to Receiver output, CL = 150pF
tPLH 0.15
Receiver Output Enable Time 200 ns Normal operation
Receiver Output Disable Time 200 ns Normal operation
Driver Skew 100 ns | tPHL - tPLH |
Receiver Skew 50 ns | tPHL - tPLH |
Transition-Region Slew Rate 90 V/µsV
CC = 3.3V, RL = 3KΩ, TAMB = 25°C,
measurements taken from -3.0V to +3.0V or
+3.0V to -3.0V
ELECTRICAL CHARACTERISTICS
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
4
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all drivers
loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
Figure 2. Transmitter Output Voltage VS. Supply
Voltage for the SP3223EU
2.7 3 3.5 4 4.5 5
Supply Voltage (V)
Transmitter Output
Voltage (V)
6
4
2
0
-2
-4
-6
1Driver at 1Mbps
Other Drivers at 62.5Kbps
All Drivers Loaded with 3K // 250pF
Figure 6. Transmitter Output Voltage VS. Supply
Voltage for the SP3223EU
0 250 500 1000 1500
Load Capacitance (pF)
Supply Current (mA)
35
30
25
20
15
10
5
0
T1 at 1Mbps
T2 at 62.5Kbps
2.7 3 3.5 4 4.5 5
Supply Voltage (V)
Transmitter Output
Voltage (V)
6
4
2
0
-2
-4
-6
T1 at 1Mbps
T2 at 62.5Kbps
All Drivers loaded
with 3K//250pF
Figure 1. Transmitter Skew VS. Load Capacitance for
the 3223EU / 3243EU
0 250 500 1000 1500 2000
200
150
100
50
0
Load Capacitance (pF)
Skew (ns)
T1 at 500Kbps
T2 at 31.2Kbps
All TX loaded 3K // CLoad
Figure 3. Transmitter Output Voltage VS. Load
Capacitance for the SP3223EU
Figure 5. Supply Current VS. Supply Voltage for the
SP3223EU
0 250 500 1000 1500
Load Capacitance (pF)
Transmitter
Output Voltage (V)
6
4
2
0
-2
-4
-6
T1 at 1Mbps
T2 at 62.5Kbps
2.7 3 3.5 4 4.5 5
Supply Voltage (V)
SupplyCurrent (mA)
20
15
10
5
0
T1 at 1Mbps
T2 at 62.5Kbps
All Drivers loaded
with 3K//250pF
Figure 4. Supply Current VS. Load Capacitance for the
SP3223EU
TYPICAL PERFORMANCE CHARACTERISTICS
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
5
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all drivers
loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
Figure 8. Slew Rate VS. Load Capacitance for the
SP3243EU
Figure 10. Supply Current VS. Supply Voltage for the
SP3243EU
Figure 7. Transmitter Output Voltage VS. Load
Capacitance for the SP3243EU
Figure 9. Supply Current VS. Load Capacitance for the
SP3243EU
0 250 500 1000 1500 2000
Load Capacitance (pF)
Transmitter
Output Voltage (V)
6
4
2
0
-2
-4
-6
1 TX at full data rate
2 TX’s at1/16 data rate
2Mbps 1.5Mbps 1Mbps
2Mbps 1.5Mbps 1Mbps
0 250 500 1000 1500 2000
Load Capacitance (pF)
Slew Rate (V / µs)
120
100
80
60
40
20
0
Slew +
Slew -
1 TX at 1Mbps
2 TX’s at 62.5Kbps
All TX loaded 3K // CLoad
0 250 500 1000 1500
Load Capacitance (pF)
SupplyCurrent (mA)
50
40
30
20
10
0
1 TX at full data rate
2 TX’s at 1/16 data rate
All TX loaded 3K // CLoad
2 Mbps
1.5 Mbps
1 Mbps
2.7 3 3.5 4 4.5 5
Supply Voltage (V)
Supply Current (mA)
30
25
20
15
10
5
0
1 Driver at 1Mbps
Other Drivers at 62.5Kbps
All Drivers Loaded with 3K // 250pF
TYPICAL PERFORMANCE CHARACTERISTICS
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
6
Table 1. Device Pin Description
PIN NUMBER SP3243EUCR
NAME FUNCTION SP3223EU SP3243EU MLPQ
EN Receiver Enable. Apply logic LOW for normal operation. 1 - -
Apply logic HIGH to disable the receiver outputs (high-Z state).
C1+ Positive terminal of the voltage doubler charge-pump capacitor. 2 28 28
V+ Regulated +5.5V output generated by the charge pump. 3 27 26
C1- Negative terminal of the voltage doubler charge-pump capacitor. 4 24 22
C2+ Positive terminal of the inverting charge-pump capacitor. 5 1 29
C2- Negative terminal of the inverting charge-pump capacitor. 6 2 31
V- Regulated -5.5V output generated by the charge pump. 7 3 32
R1IN RS-232 receiver input. 16 4 2
R2IN RS-232 receiver input. 9 5 3
R3IN RS-232 receiver input. - 6 4
R4IN RS-232 receiver input. - 7 5
R5IN RS-232 receiver input. - 8 6
R1OUT TTL/CMOS receiver output. 15 19 17
R2OUT TTL/CMOS receiver output. 10 18 16
R2OUT Non-inverting receiver-2 output, active in shutdown. - 20 18
R3OUT TTL/CMOS receiver output. - 17 15
R4OUT TTL/CMOS receiver output. - 16 14
R5OUT TTL/CMOS receiver output. - 15 13
STATUS TTL/CMOS Output indicating online and shutdown status. 11 21 19
T1IN TTL/CMOS driver input. 13 14 12
T2IN TTL/CMOS driver input. 12 13 11
T3IN TTL/CMOS driver input. - 12 10
ONLINE Apply logic HIGH to override Auto-Online circuitry keeping 14 23 21
drivers active (SHUTDOWN must also be logic HIGH,
refer to Table 2).
T1OUT RS-232 driver output. 17 9 7
T2OUT RS-232 driver output. 8 10 8
T3OUT RS-232 driver output. - 11 9
GND Ground. 18 25 23
VCC +3.0V to +5.5V supply voltage. 19 26 25
SHUTDOWN Apply logic LOW to shut down drivers and charge pump. 20 22 20
This overrides all AUTO ON-LINE® circuitry and ONLINE
(refer to Table 2).
NC No Connection - - 1,24,27,30
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
7
Figure 13. SP3243EU MLPQ Pinout Configuration
Figure 11. SP3223EU Pinout Configuration
V-
1
2
3
417
18
19
20
5
6
7
16
15
14
SHUTDOWN
C1+
V+
C1-
C2+
C2-
ONLINE
EN
R
1
IN
GND
V
CC
T
1
OUT
STATUS
8
9
10 11
12
13
R
2
IN
R
2
OUT
SP3223EU
T
2
OUT T
1
IN
T
2
IN
R
1
OUT
R
4
IN
1
2
3
425
26
27
28
5
6
7
24
23
22 SHUTDOWN
C2-
V-
R
1
IN
R
2
IN
R
3
IN ONLINE
C2+
C1-
GND
V
CC
V+
STATUS
T
1
IN
8
9
10
11 18
19
20
21
12
13
14
17
16
15 R
5
OUT
T
1
OUT
T
2
OUT
T
3
OUT
T
3
IN
T
2
IN R
4
OUT
R
5
IN
R
3
OUT
R
2
OUT
R
1
OUT
R
2
OUT
SP3243EU
C1+
®
®
SP3243EU
V-
C2-
NC
C2+
C1+
NC
V+
V
CC
NC
R
1
IN
R
2
IN
R
3
IN
R
4
IN
R
5
IN
T
1
OUT
T
2
OUT
T
3
OUT
T
3
IN
T
2
IN
T
1
IN
R
5
OUT
R
4
OUT
R
3
OUT
R
2
OUT
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
NC
GND
C1-
ONLINE
SHUTDOWN
STATUS
R
2
OUT
R
1
OUT
Figure 12. SP3243EU Pinout Configuration
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
8
Figure 14. SP3223EU Typical Operating Circuit
SP3223EU
2
4
6
5
3
7
19
GND
T
1
IN
T
2
IN
C1+
C1-
C2+
C2-
V+
V-
V
CC
13
12
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
0.1µF
0.1µF
17
8RS-232
OUTPUTS
RS-232
INPUTS
TTL/CMOS
INPUTS
+3.3V to +5V
18
SHUTDOWN
20
5KΩ
R
1
OUT
15 16
5KΩ
R
2
IN
R
2
OUT
10 9
TTL/CMOS
OUTPUTS
EN
1
ONLINE
14
R
1
IN
T
2
OUT
T
1
OUT
11 STATUS
V
CC
To µP Supervisor
Circuit
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
9
Figure 15. SP3243EU Typical Operating Circuit
SP3243EU
28
24
2
1
27
3
26
5KΩ
5KΩ
5KΩ
5KΩ
5KΩ
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
14
13
12
20
19
18
17
16
15
0.1
µ
F
0.1
µ
F
0.1
µ
F
+
C2
C5
C1
+
+C3
C4
+
+
0.1
µ
F
0.1
µ
F
9
10
11
4
5
6
7
8
RS-232
OUTPUTS
RS-232
INPUTS
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
To µP Supervisor
Circuit
23
22
21
V
CC
V
CC
25
T
1
IN
R
1
OUT R
1
IN
T
2
OUT
R
2
OUT
T
2
IN
T
3
IN T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
4
IN
R
5
IN
R
2
OUT
R
3
OUT
R
4
OUT
R
5
OUT
ONLINE
SHUTDOWN
STATUS
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
10
DESCRIPTION
The SP3223EU and SP3243EU transceivers
meet the EIA/TIA-232 and ITU-T V.28/V.24
communication protocols and can be
implemented in battery-powered, portable, or
hand-held applications such as notebook or
palmtop computers. The SP3223EU and
SP3243EU devices feature Sipex's proprietary
and patented (U.S.-- 5,306,954) on-board charge
pump circuitry that generates ±5.5V RS-232
voltage levels from a single +3.0V to +5.5V
power supply. The SP3223EU and SP3243EU
devices can operate at a data rate of 1000kbps
fully loaded.
The SP3223EU is a 2-driver/2-receiver device,
and the SP3243EU is a 3-driver/5-receiver device,
ideal for portable or hand-held applications. The
SP3243EU includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where VCC may be
disconnected.
The SP3223EU and SP3243EU series is an ideal
choice for power sensitive designs. The
SP3223EU and SP3243EU devices feature
AUTO ON-LINE® circuitry which reduces the
power supply drain to a 1µA supply current. In
many portable or hand-held applications, an RS-
232 cable can be disconnected or a connected
peripheral can be turned off. Under these condi-
tions, the internal charge pump and the drivers
will be shut down. Otherwise, the system auto-
matically comes online. This feature allows de-
sign engineers to address power saving concerns
without major design changes.
THEORY OF OPERATION
The SP3223EU and SP3243EU series is made
up of four basic circuit blocks:
1. Drivers
2. Receivers
3. the Sipex proprietary charge pump, and
4. AUTO ON-LINE® circuitry.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative to
the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. These
drivers comply with the EIA-TIA-232-F and all
previous RS-232 versions. Unused drivers in-
puts should be connected to GND or VCC.
The drivers have a minimum data rate of
1000kbps fully loaded with 3kΩ in parallel with
250pF, ensuring compatibility with PC-to-PC
communication software.
Figure 16. Interface Circuitry Controlled by Micropro-
cessor Supervisory Circuit
SP3243EU
28
24
2
1
27
3
26
5KΩ
5KΩ
5KΩ
5KΩ
5KΩ
GND
C1+
C1-
C2+
C2-
V+
V-
VCC
14
13
12
20
19
18
17
16
15
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
0.1µF
0.1µF
9
10
11
4
5
6
7
8
RS-232
OUTPUTS
RS-232
INPUTS
23
22
21
VCC
25
T
1
IN
R
1
OUT R
1
IN
T
2
OUT
R
2
OUT
T
2
IN
T
3
IN T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
4
IN
R
5
IN
R
2
OUT
R
3
OUT
R
4
OUT
R
5
OUT
ONLINE
SHUTDOWN
STATUS
UART
or
Serial µC
µP
Supervisor
IC
TxD
RTS
DTR
RxD
CTS
DSR
DCD
RIV
CC
VIN
RESET
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
11
Figure 17 shows a loopback test circuit used to
test the RS-232 Drivers. Figure 18 shows the test
results where one driver was active at 1Mbps and
all three drivers loaded with an RS-232 receiver
in parallel with a 250pF capacitor. Figure 19
shows the test results of the loopback circuit with
all drivers active at 250kbps with typical
RS-232 loads in parallel with 1000pF capacitors. A
superior RS-232 data transmission rate of 1Mbps
Table 2. SHUTDOWN and EN Truth Tables
Note: In AUTO ON-LINE® Mode where ONLINE =
GND and SHUTDOWN = VCC, the device will shut down
if there is no activity present at the Receiver inputs.
Figure 17. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
makes the SP3223EU/3243EU series an ideal
match for high speed LAN and personal com-
puter peripheral applications.
Receivers
The receivers convert +5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels. The
SP3223EU receivers have an inverting output
that can be disabled by using the EN pin.
Figure 18. Loopback Test results at 1Mbps Figure 19. Loopback Test results at 250Kbps
UE3223PS:ECIVED
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NWODTUHST
X
TUOR
X
TUOR
2
TUO
0ZhgiHZhgiHevitcA
1evitcAevitcAevitcA
SP3223EU
SP3243EU
GND
T
1
IN
T
X
IN
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
0.1µF
0.1µF
TTL/CMOS
INPUTS
+3V to +5V
SHUTDOWN
5kΩ
R
1
OUT
5kΩ
R
X
IN
R
X
OUT
TTL/CMOS
OUTPUTS
EN *
ONLINE
R
1
IN
T
X
OUT
T
1
OUT
STATUS
V
CC
To µP Supervisor
Circuit
1000pF 1000pF
*
SP3223EU Only
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
12
Receivers are active when the AUTO ON-LINE®
circuitry is enabled or when in shutdown.
During the shutdown, the receivers will continue
to be active. If there is no activity present at the
receivers for a period longer than 100µs or when
SHUTDOWN is enabled, the device goes into a
standby mode where the circuit draws 1µA.
Driving EN to a logic HIGH forces the outputs of
the receivers into high-impedance. The truth
table logic of the SP3223EU and SP3243EU
driver and receiver outputs can be found in Table 2.
The SP3243EU includes an additional non-in-
verting receiver with an output R2OUT. R2OUT
is an extra output that remains active and
monitors activity while the other receiver
outputs are forced into high impedance.
This allows Ring Indicator (RI) from a
peripheral to be monitored without forward
biasing the TTL/CMOS inputs of the other
devices connected to the receiver outputs.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5KΩ pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.
Charge Pump
The charge pump is a Sipex–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs. The
charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of the
input voltage (VCC) over the +3.0V to +5.5V
range. This is important to maintain compliant
RS-232 levels regardless of power supply
fluctuations.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump is
disabled. This oscillator controls the four phases
of the voltage shifting. A description of each
phase follows.
Phase 1
— VSS charge storage — During this phase of
the clock cycle, the positive side of capacitors
C1 and C2 are initially charged to VCC. Cl+ is
then switched to GND and the charge in C1– is
transferred to C2–. Since C2+ is connected to
VCC, the voltage potential across capacitor C2 is
now 2 times VCC.
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of C2
to GND. This transfers a negative generated
voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C3, the positive side of capacitor C1 is switched
to VCC and the negative side is connected to
GND.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2+ is at VCC, the
voltage potential across C2 is 2 times VCC.
Phase 4
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND,
allowing the charge pump cycle to begin again.
The charge pump cycle will continue as long as
the operational conditions for the internal
oscillator are present.
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
13
Since both V+ and V– are separately generated
from VCC, in a no–load condition V+ and V– will
be symmetrical. Older charge pump approaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.
Figure 20. AUTO ON-LINE® Timing Waveforms
The clock rate for the charge pump typically
operates at 250kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
RECEIVER
RS-232 INPUT
VOLTAGES
STATUS
+5V
0V
-5V
tSTSL tSTSH
tONLINE
VCC
0V
DRIVER
RS-232 OUTPUT
VOLTAGES
0V
+2.7V
-2.7V
S
H
U
T
D
O
W
N
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
14
Figure 22. Charge Pump — Phase 2
Figure 23. Charge Pump Waveforms
V
CC
= +5V
–10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
++
–
–
––
Figure 24. Charge Pump — Phase 3
V
CC
= +5V
–5V
+5V
–5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
++
–
–
––
Figure 25. Charge Pump — Phase 4
V
CC
= +5V
+10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
++
–
–
––
VCC = +5V
–5V –5V
+5V
VSS Storage Capacitor
VDD Storage Capacitor
C1C2
C3
C4
+
+
++
–
–
––
Figure 21. Charge Pump — Phase 1
Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 1.96V
2
1T
T[]
T
2
+6V
a) C
2+
b) C
2
-
-6V
0V
0V
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
15
Figure 26. SP3243EU Driver Output Voltages vs. Load
Current per Transmitter
Figure 27. Circuit for the connectivity of the SP3243EU with a DB-9 connector
6
4
2
0
-2
-4
-6
Transmitter Output Voltage [V]
Load Current Per Transmitter [mA]
Vout+
Vout-
0.62
0.869
0.939
1.02
1.12
1.23
1.38
1.57
1.82
2.67
3.46
4.93
8.6
6
7
8
9
1
2
3
4
5
DB-9
Connector
6. DCE Ready
7. Request to Send
8. Clear to Send
9. Ring Indicator
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
SP3243EU
28
24
2
1
27
3
26
5KΩ
5KΩ
5KΩ
5KΩ
5KΩ
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
14
13
12
20
19
18
17
16
15
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
0.1µF
0.1µF
9
10
11
4
5
6
7
8
To µP Supervisor
Circuit
23
22
21
VCC
V
CC
25
T
1
IN
R
1
OUT R
1
IN
T
2
OUT
R
2
OUT
T
2
IN
T
3
IN T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
4
IN
R
5
IN
R
2
OUT
R
3
OUT
R
4
OUT
R
5
OUT
ONLINE
SHUTDOWN
STATUS
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
16
LANGIS232-SR REVIECERTA TUPNI
NWODTUHS TUPNI TUPNIENILNOTUPTUOSUTATS REVIECSNART SUTATS
SEYHGIH-HGIH noitarepOlamroN
ONHGIHHGIHWOL noitarepOlamroN
ONHGIHWOLWOL nwodtuhS
(
enilnO-otuA
)
SEYWOL-HGIH nwodtuhS
ONWOL-WOL nwodtuhS
Table 3. AUTO ON-LINE® Logic
Figure 28. Stage I of AUTO ON-LINE® Circuitry
Figure 29. Stage II of AUTO ON-LINE® Circuitry
RS-232
Receiver Block
RXINACT
Inactive Detection Block
RXIN RXOUT
R1INACT R2INACT R3INACT R4INACT R5INACT
Delay
Stage Delay
Stage Delay
Stage Delay
Stage Delay
Stage
SHUTDOWN
STATUS
LOW
HIGH / LOW
HIGH / LOW
(Auto-Online)
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
17
AUTO ON-LINE® Circuitry
The SP3223EU and SP3243EU devices have a
patent pending AUTO ON-LINE® circuitry on
board that saves power in applications such as
laptop computers, palmtop (PDA) computers
and other portable systems.
The SP3223EU and SP3243EU devices
incorporate an AUTO ON-LINE® circuit that
automatically enables itself when the external
transmitters are enabled and the cable is
connected. Conversely, the AUTO ON-LINE®
circuit also disables most of the internal circuitry
when the device is not being used and goes into
a standby mode where the device typically draws
1mA. This function can also be externally
controlled by the ONLINE pin. When this pin is
tied to a logic LOW, the AUTO ON-LINE®
function is active. Once active, the device is
enabled until there is no activity on the receiver
inputs. The receiver input typically sees at least
+3V, which are generated from the transmitters
at the other end of the cable with a +5V
minimum. When the external transmitters are
disabled or the cable is disconnected, the
receiver inputs will be pulled down by their
internal 5kΩ resistors to ground. When this
occurs over a period of time, the internal
transmitters will be disabled and the device goes
into a shutdown or standy mode. When ONLINE
is HIGH, the AUTO ON-LINE® mode is dis-
abled.
The AUTO ON-LINE® circuit has two stages:
1) Inactive Detection
2) Accumulated Delay
The first stage, shown in Figure 28, detects an
inactive input. A logic HIGH is asserted on
RXINACT if the cable is disconnected or the
external transmitters are disabled. Otherwise,
RXINACT will be at a logic LOW. This circuit
is duplicated for each of the other receivers.
The second stage of the AUTO ON-LINE® cir-
cuitry, shown in Figure 29, processes all the
receiver's RXINACT signals with an accumu-
lated delay that disables the device to a 1µA
supply current.
The STATUS pin goes to a logic LOW when the
cable is disconnected, the external transmitters
are disabled, or the SHUTDOWN pin is
invoked. The typical accumulated delay is
around 20µs.
When the SP3223EU and SP3243EU drivers or
internal charge pump are disabled, the supply
current is reduced to 1µA. This can commonly
occur in hand-held or portable applications where
the RS-232 cable is disconnected or the RS-232
drivers of the connected peripheral are turned off.
The AUTO ON-LINE® mode can be disabled by
the SHUTDOWN pin. If this pin is a logic LOW,
the AUTO ON-LINE® function will not operate
regardless of the logic state of the ONLINE pin.
Table 3 summarizes the logic of the AUTO ON-
LINE® operating modes. The truth table logic of
the SP3223EU and SP3243EU driver and re-
ceiver outputs can be found in Table 2.
The STATUS pin outputs a logic LOW signal
if the device is shutdown. This pin goes to a
logic HIGH when the external transmitters are
enabled and the cable is connected.
When the SP3223EU and SP3243EU devices
are shut down, the charge pumps are turned off.
V+ charge pump output decays to VCC, the
V- output decays to GND. The decay time will
depend on the size of capacitors used for the
charge pump. Once in shutdown, the time
required to exit the shut down state and have
valid V+ and V- levels is typically 200µs.
For easy programming, the STATUS can be
used to indicate DTR or a Ring Indicator signal.
Tying ONLINE and SHUTDOWN together
will bypass the AUTO ON-LINE® circuitry so
this connection acts like a shutdown input pin.
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
18
ESD TOLERANCE
The SP3223EU/3243EU series incorporates
ruggedized ESD cells on all driver output and
receiver input pins. The ESD structure is
improved over our previous family for more
rugged applications and environments sensitive
to electro-static discharges and associated
transients. The improved ESD tolerance is at
least +15kV without damage nor latch-up.
There are different methods of ESD testing
applied: a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semi-
conductors. This method is also specified in
MIL-STD-883, Method 3015.7 for ESD testing.
The premise of this ESD test is to simulate the
human body’s potential to store electro-static
energy and discharge it to an integrated circuit.
The simulation is performed by using a test
model as shown in Figure 30. This method will
test the IC’s capability to withstand an ESD
transient during normal handling such as in
manufacturing areas where the ICs tend to be
handled frequently.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment and
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
with IEC1000-4-2 is that the system is required
to withstand an amount of static electricity when
ESD is applied to points and surfaces of the
equipment that are accessible to personnel during
normal usage. The transceiver IC receives most
of the ESD current when the ESD source is
applied to the connector pins. The test circuit for
IEC1000-4-2 is shown on Figure 31. There are
two methods within IEC1000-4-2, the Air
Discharge method and the Contact Discharge
method.
With the Air Discharge Method, an ESD voltage
is applied to the equipment under test (EUT)
through air. This simulates an electrically charged
person ready to connect a cable onto the rear of
the system only to find an unpleasant zap just
before the person touches the back panel. The
high energy potential on the person discharges
through an arcing path to the rear panel of the
system before he or she even touches the system.
This energy, whether discharged directly or
through air, is predominantly a function of the
discharge current rather than the discharge
voltage. Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with the
approach speed.
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the
ESD arc. The discharge current rise time is
constant since the energy is directly transferred
without the air-gap arc. In situations such as
hand held systems, the ESD charge can be directly
discharged to the equipment from a person already
holding the equipment. The current is transferred
on to the keypad or the serial port of the equipment
directly and then travels through the PCB and finally
to the IC.
Figure 30. ESD Test Circuit for Human Body Model
R
C
C
S
R
S
SW1 SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
19
DEVICE PIN HUMAN BODY IEC1000-4-2
TESTED MODEL Air Discharge Direct Contact Level
Driver Outputs +15kV +15kV +8kV 4
Receiver Inputs +15kV +15kV +8kV 4
The circuit models in Figures30 and 31 represent
the typical ESD testing circuit used for all three
methods. The CS is initially charged with the DC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through RS, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
For the Human Body Model, the current limiting
resistor (RS) and the source capacitor (CS) are
1.5kΩ an 100pF, respectively. For IEC-1000-4-
2, the current limiting resistor (RS) and the source
capacitor (CS) are 330Ω an 150pF, respectively.
The higher CS value and lower RS value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage capacitor
injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the test
point.
Figure 32. ESD Test Waveform for IEC1000-4-2
t=0ns t=30ns
0A
15A
30A
t ➙
i ➙
Figure 31. ESD Test Circuit for IEC1000-4-2
Table 4. Transceiver ESD Tolerance Levels
R
S
and
R
V
add up to 330Ω for IEC1000-4-2.
R
S
and
R
V
add up to 330Ω for IEC1000-4-2.
Contact-Discharge Module
R
V
R
C
C
S
R
S
SW1 SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
R
V
Contact-Discharge Module
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
20
PACKAGE: 20 PIN PDIP
eA
eB
E
D1
D
L
A1
b
b2
e
b3
N
123
INDEX
AREA
N/2
E
E1
C
b
- - .210
.015 -
Dimensions in inches
20 PIN PDIP
JEDEC MS-001
(AD) Variation
.115 .130 .195
.014 .018 .022
.045 .060 .070
.240 .250 .280
A
A1
A2
b
c
D1
E
E1
e
eA
eB
.115 .130 .150
L
MIN NOM MAX
b2
b3 .030 .039 .045
D
.008
.010 .014
.980 1.030 1.060
.005
.300 .310 .325
.100 BSC
.300 BSC
.430
-
--
--
20 pin PDIP
A
A2
c
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
21
b
c
WITH LEAD FINISH
BASE METAL
Seating Plane
A2 A
A1
SEE DETAIL “A”
L1
L
Seaing Plane
Ø
2 NX R R1
A
A
DETAIL A
Gauge Plane
Section A-A
D
INDEX AREA
D
2x2
E1
N
12
E1 E
b
- - 2.0
0.05 - -
Dimensions in (mm)
20 PIN SSOP
JEDEC MO-150
(AE) Variation
1.65 1.75 1.85
0.22 - 0.38
0.09 - 0.25
0.55 0.75 0.95
0º 4º 8º
A
A1
A2
b
c
D
E
E1
L
L1
Ø
MIN NOM MAX
7.40 7.80 8.20
5.00 5.30 5.60
1.25 REF
6.90 7.20 7.50
20 PIN SSOP
PACKAGE: 20 PIN SSOP
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
22
D
EH
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(WIDE)
A
A1
Ø
L
Be
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A
A1
B
D
E
e
H
L
Ø
28–PIN
0.090/0.104
(2.29/2.649)
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.697/0.713
(17.70/18.09)
0.291/0.299
(7.402/7.600)
0.050 BSC
(1.270 BSC)
0.394/0.419
(10.00/10.64)
0.016/0.050
(0.406/1.270)
0°/8°
(0°/8°)
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
23
Seating Plane
A2 A
A1
b
SEE DETAIL “A”
B
B
Seaing Plane
L1
L
Ø1
DETAIL A
Ø2
Ø3
C
b
Section B-B
E1 E
D
INDEX AREA
D
2x2
E1
12
e
- - 1.20
Dimensions in (mm)
20 PIN TSSOP
JEDEC MO-153
(AC) Variation
0.80 1.00 1.05
0.19 - 0.30
0.09 - 0.20
0º - 8º
A
A2
b
c
Ø1
MIN NOM MAX
A1 0.05 - 0.15
D6.40 6.50 6.60
E6.40 BSC
E1 4.30 4.40 4.50
e0.65 BSC
Ø2
Ø3
L
12º REF
12º REF
L1
0.45 0.60 0.75
1.00 REF
20 PIN TSSOP
PACKAGE: 20 PIN TSSOP
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
24
D2 NX K
NX L
E2
NX K
NX b
0.80 0.90 1.00
0 0.02 0.05
Dimensions in
(mm)
32 PIN QFN
JEDECMO220
(VHHD-4)
0 0.65 1.00
0.20 REF
0.35 0.40 0.45
A
A1
A2
A3
D
E
D2
L
MIN NOM MAX
3.50 3.65 3.80
E2 3.50 3.65 3.80
ND
5.00 BSC
5.00 BSC
8
NE 8
32 PIN QFN
e0.50 BSC
b 0.18 0.25 0.30
Ø 0º - 14º
N32
e
D
E
SEATING PLANE
A1
A
4X
Ø
º
A3
A2
K0.20 - -
PACKAGE: 32 PIN QFN
Date: 06/28/04 SP3223EU/3243EU +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation
25
Part Number Temperature Range Package Types
SP3223EUCP.................................................... 0°C to +70°C...................................................... 20-pin PDIP
SP3223EUCA.................................................... 0°C to +70°C.................................................... 20-pin SSOP
SP3223EUCA/TR.............................................. 0°C to +70°C.................................................... 20-pin SSOP
SP3223EUCY.................................................... 0°C to +70°C.................................................. 20-pin TSSOP
SP3223EUCY/TR.............................................. 0°C to +70°C.................................................. 20-pin TSSOP
SP3243EUCT .................................................... 0°C to +70°C.................................................. 28-pin WSOIC
SP3243EUCT/TR .............................................. 0°C to +70°C.................................................. 28-pin WSOIC
SP3243EUCA.................................................... 0°C to +70°C.................................................... 28-pin SSOP
SP3243EUCA/TR.............................................. 0°C to +70°C.................................................... 28-pin SSOP
SP3243EUCY.................................................... 0°C to +70°C.................................................. 28-pin TSSOP
SP3243EUCY/TR.............................................. 0°C to +70°C.................................................. 28-pin TSSOP
SP3243EUCR ................................................... 0°C to +70°C.......................................................32-pin QFN
SP3223EUEP .................................................. -40°C to +85°C .................................................... 20-pin PDIP
SP3223EUEA .................................................. -40°C to +85°C .................................................. 20-pin SSOP
SP3223EUEA/TR ............................................ -40°C to +85°C .................................................. 20-pin SSOP
SP3223EUEY .................................................. -40°C to +85°C ................................................ 20-pin TSSOP
SP3223EUEY/TR ............................................ -40°C to +85°C ................................................ 20-pin TSSOP
SP3243EUET .................................................. -40°C to +85°C ................................................ 28-pin WSOIC
SP3243EUET/TR ............................................ -40°C to +85°C ................................................ 28-pin WSOIC
SP3243EUEA .................................................. -40°C to +85°C .................................................. 28-pin SSOP
SP3243EUEA/TR ............................................ -40°C to +85°C .................................................. 28-pin SSOP
SP3243EUEY .................................................. -40°C to +85°C ................................................ 28-pin TSSOP
SP3243EUEY/TR ............................................ -40°C to +85°C ................................................ 28-pin TSSOP
SP3243EUER.................................................. -40°C to +85°C .....................................................32-pin QFN
Corporation
ANALOG EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
ORDERING INFORMATION
Available in lead free packaging. To order add “-L” suffix to part number.
Example: SP3223EUEA/TR = standard; SP3223EUEA-L/TR = lead free
/TR = Tape and Reel
Pack quantity is 1,00 for SSOP, TSSOP and WSOIC.