1. Product profile
1.1 General description
160 W LDMOS power transistor for base station applications at frequencies from
800 MHz to 1000 MHz.
[1] ACPR400 and ACPR600 at 30 kHz resolution bandwidth.
1.2 Features
nTypical GSM EDGE performance at f = 894 MHz, VDS = 28 V and IDq = 900 mA:
uAverage output power = 80 W
uGain = 19.7 dB
uEfficiency = 41.5 %
uACPR400 =−61 dBc
uACPR600 =−72 dBc
uEVMrms = 2.6 %
nEasy power control
nExcellent ruggedness
nHigh efficiency
nExcellent thermal stability
nDesigned for broadband operation (800 MHz to 1000 MHz)
nInternally matched for ease of use
BLF4G10LS-160
UHF power LDMOS transistor
Rev. 01 — 19 June 2007 Product data sheet
Table 1. Typical performance
RF performance at T
case
= 25
°
C in a common source class-AB test circuit.
Mode of operation f VDS PLPL(AV) GpηDACPR400 ACPR600 EVMrms IMD3
(MHz) (V) (W) (W) (dB) (%) (dBc) (dBc) (%) (dBc)
CW 894 28 200 - 19.0 59 - - - -
2-tone 894 28 - 80 19.7 42.5 - - - −30
GSM EDGE 894 28 - 80 19.7 41.5 −61[1] −72[1] 2.6 -
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 2 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
1.3 Applications
nRF power amplifiers for GSM, GSM EDGE and CDMA base stations and multi carrier
applications in the 800 MHz to 1000 MHz frequency range.
2. Pinning information
[1] Connected to flange
3. Ordering information
4. Limiting values
5. Thermal characteristics
Table 2. Pinning
Pin Description Simplified outline Symbol
1 drain
2 gate
3 source [1] 3
2
1
sym112
1
3
2
Table 3. Ordering information
Type number Package
Name Description Version
BLF4G10LS-160 - flanged LDMOST ceramic package; 2 mounting holes; 2
leads SOT502A
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 65 V
VGS gate-source voltage −0.5 +15 V
IDdrain current - 15 A
Tstg storage temperature −65 +150 °C
Tjjunction temperature - 200 °C
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Max Unit
Rth(j-case) thermal resistance from junction
to case Tcase =80°C
PL= 50 W 0.49 0.58 K/W
PL= 130 W 0.38 0.47 K/W
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 3 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
6. Characteristics
7. Application information
7.1 Ruggedness in class-AB operation
The BLF4G10LS-160 is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: VDS =28V;
IDq = 900 mA; PL = 160 W (CW); f = 894 MHz.
Table 6. Characteristics
T
j
= 25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS drain-source breakdown
voltage VGS =0V; I
D= 2.1 mA 65 - - V
VGS(th) gate-source threshold voltage VDS = 10 V; ID= 230 mA 2.5 2.9 3.5 V
VGSq gate-source quiescent voltage VDS = 28 V; ID= 900 mA 2.65 3.15 3.65 V
IDSS drain leakage current VGS =0V; V
DS =28V - - 5 µA
IDSX drain cut-off current VGS =V
GS(th) +6 V;
VDS =10V 35 42 - A
IGSS gate leakage current VGS = 15 V; VDS = 0 V - - 420 nA
gfs forward transconductance VDS =10V; I
D= 7.5 A - 11 - S
RDS(on) drain-source on-state
resistance VGS =V
GS(th) + 6 V;
ID= 7.5 A - 0.065 - Ω
Crs feedback capacitance VGS =0V; V
DS =28V;
f=1MHz - 3.0 - pF
Table 7. Application information
Mode of operation: 2-tone; f
1
= 894 MHz; f
2
= 894.2 MHz; RF performance at V
DS
=28V;
I
Dq
= 900 mA; T
case
=25
°
C; unless otherwise specified; in a class-AB test circuit.
Symbol Parameter Conditions Min Typ Max Unit
Gppower gain PL(PEP) = 160 W 18.5 19.7 21 dB
RLin input return loss PL(PEP) = 160 W - −10 −6dB
ηDdrain efficiency PL(PEP) = 160 W 40 42.5 - %
IMD3 third order intermodulation distortion PL(PEP) = 160 W - −30 −27 dBc
IMD5 fifth order intermodulation distortion PL(PEP) = 160 W - −39 −36 dBc
IMD7 seventh order intermodulation distortion PL(PEP) = 160 W - −59 −55 dBc
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 4 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
[1] 0.2 overlap is allowed for measurement reproducibility.
Table 8. RF gain grouping
f
1
= 894 MHz; f
2
= 894.2 MHz
Code[1] Gain (dB) for two-tone
Min Max
C 18.5 19
D 19 19.5
E 19.5 20
F 20 20.5
G 20.5 21
VDS = 28 V; IDq = 900 mA; Tcase =25°C;
f = 894 MHz. VDS =28V; I
Dq = 900 mA; Tcase =25°C;
f = 894 MHz.
Fig 1. One-tone CW power gain and drain efficiency
as functions of load power; typical values Fig 2. Two-tone power gain and drain efficiency as
functions of average load power; typical values
001aag546
PL (W)
0 24016080
17
19
21
Gp
(dB)
15
20
40
60
ηD
(%)
0
ηD
Gp
001aag547
PL(AV) (W)
0 1208040
18
20
22
Gp
(dB)
16
20
40
60
ηD
(%)
0
ηD
Gp
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 5 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
VDS = 28 V; IDq = 900 mA; Tcase =25°C;
f = 894 MHz. VDS =28V; T
case =25°C; f = 894 MHz.
(1) IDq = 800 mA.
(2) IDq = 900 mA.
(3) IDq = 1000 mA.
(4) IDq = 1100 mA.
Fig 3. Intermodulation distortion a function of
average load power; typical values Fig 4. IMD3 as a function of average load power;
typical values
VDS = 28 V; IDq = 900 mA; Tcase =25°C;
f = 894 MHz. VDS =28V; I
Dq = 900 mA; Tcase =25°C;
f = 894 MHz.
Fig 5. GSM EDGE power gain and drain efficiency as
functions of average load power; typical values Fig 6. GSM EDGE ACPR at 400 kHz and at 600 kHz as
a function of average load power; typical values
001aag548
PL(AV) (W)
0 1208040
−40
−60
−20
0
IMD
(dBc)
−80
IMD3
IMD5
IMD7
001aag549
PL(AV) (W)
0 1208040
−40
−60
−20
0
IMD3
(dBc)
−80
2
1
3
4
001aag550
PL(AV) (W)
0 1008040 6020
18
19
17
20
21
Gp
(dB)
16
20
30
10
40
50ηD
(%)
0
Gp
ηD
001aag551
PL(AV) (W)
0 1008040 6020
−70
−60
−50
ACPR
(dBc)
−80
ACPR400
ACPR600
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 6 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
VDS = 28 V; IDq = 900 mA; Tcase =25°C;
f = 894 MHz. VDS =28V; I
Dq = 900 mA; Tcase =25°C;
f = 894 MHz.
Fig 7. GSM EDGE rms EVM and peak EVM as
functions of average load power; typical values Fig 8. GSM EDGE ACPR and rms EVM as functions of
drain efficiency; typical values
VDS = 28 V; IDq = 1100 mA; f = 881.5 MHz.
Test signal: IS-95 with PAR = 9.9 dB at 0.01 %
probability.
VDS =28V; I
Dq = 1100 mA.
(1) f = 869 MHz.
(2) f = 881.5 MHz.
(3) f = 894 MHz.
Fig 9. CDMA power gain and drain efficiency as
functions of average load power; typical values,
measured in a CDMA demo test circuit
Fig 10. CDMA power gain as a function of average load
power at various frequencies; typical values,
measured in a CDMA demo test circuit
001aag552
PL(AV) (W)
0 1008040 6020
8
4
12
16
EVM
(%)
0
EVMM
EVMrms
001aag553
ηD (%)
0604020
−64
−68
−60
−56
ACPR
(dBc)
−72
2
1
3
4
EVM
(%)
0
EVMrms
ACPR400
001aag554
PL(AV) (dBm)
28 484436 4032
18
17
19
20
Gp
(dB)
16
20
10
30
40
ηD
(%)
0
Gp
ηD
001aag555
PL(AV) (dBm)
28 484436 4032
18
17
19
20
Gp
(dB)
16
1
2
3
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 7 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
8. Test information
VDS = 28 V; IDq = 1100 mA; Tcase =25°C; f = 881.5 MHz.
Fig 11. CDMA ACPR at 750 kHz and at 1980 kHz as functions of average load power; typical values, measured in a
CDMA demo test circuit
001aag556
PL(AV) (dBm)
28 484436 4032
−55
−65
−45
−35
ACPR
(dBc)
−75
ACPR1980
ACPR750
See Table 9 for a list of components
Fig 12. Circuit schematic for 894 MHz production test circuit
Vbias
VDD
RF in RF out
C10
C3
L9 C4 L10
001aag557
L8
L7
L4
L3
C1 L2L1
R1 C9C8C7
L6L5
C6
C5
C2
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 8 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
The striplines are on a double copper-clad Rogers 6006 Printed-Circuit Board (PCB) with εr= 6.15 and
thickness = 0.635 mm.
See Table 9 for a list of components.
Fig 13. Component layout for 894 MHz production test circuit
001aag593
BLF4G10LS-160
Input-Rev1 BLF4G10LS-160
Output-Rev1
VDD
+Vbias
R1
L1 L2
L3 L4 L7 L8 L9
L10
L5
L6 C7 C8 C9
C10
C4
C3
C2
C1
C5
C6
Table 9. List of components (see Figure 12 and Figure 13).
Component Description Value Remarks
C1, C4, C6, C7 multilayer ceramic chip
capacitor 68 pF [1]
C2 multilayer ceramic chip
capacitor 1.5 pF [1]
C3 multilayer ceramic chip
capacitor 1.4 pF [1]
C5, C9 tantalum capacitor 10 µF
C8 ceramic capacitor 1 µF 1812X7R105KL2AB
C10 electrolytic capacitor 220 µF
L1 stripline [2] (W ×L) 0.914 mm ×10.160 mm
L2 stripline [2] (W ×L) 0.914 mm ×24.384 mm
L3 tapered stripline [2] (W1 ×W2 ×L)
0.914 mm ×19.812 mm ×11.024 mm
L4 stripline [2] (W ×L) 19.812 mm ×21.438 mm
L5 stripline [2] (W ×L) 0.914 mm ×42.342 mm
L6 stripline [2] (W ×L) 1.524 mm ×42.418 mm
L7 stripline [2] (W ×L) 17.221 mm × 22.479 mm
L8 tapered stripline [2] (W1 ×W2 ×L)
17.221 mm ×0.914 mm ×20.625 mm
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 9 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
[1] American Technical Ceramics type 100B or capacitor of same quality.
[2] The striplines are on a double copper-clad Rogers 6006 Printed-Circuit Board (PCB) with εr= 6.15 and
thickness = 0.635 mm.
L9 stripline [2] (W ×L) 0.914 mm ×19.126 mm
L10 stripline [2] (W ×L) 0.914 mm ×6.858 mm
R1 SMD resistor 5.1 Ω
Table 9. List of components (see Figure 12 and Figure 13).
…continued
Component Description Value Remarks
See Table 10 for a list of components
Fig 14. Circuit schematic for 869 MHz to 894 MHz CDMA demo test circuit
C3
001aag559
Vbias(12 V - 28 V)
VDD(28 V)
RF in RF out
C11
C2
C4
L9 C12 L10
L8
L7
L4
Q3
L3
C1 L2L1
R8
R2
R9R10 R7
R1
Q1
R6
Q2
R5
R3
R4
C10C9C8
L6L5
C5
C6
C7
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 10 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
The other side is unetched and serves as a ground plane.
See Table 10 for a list of components.
Fig 15. Component layout for 869 MHz to 894 MHz CDMA demo test circuit
001aag594
BLF4G10LS-160
CDMA in BLF4G10LS-160
CDMA out
VDD(28 V)Vbias(12 V - 28 V)
Q1 C3
R6
R8
C6
C7
L1 L2
L3 L4 L7 L8 L9
L10
L5
L6 C8 C9 C10
C11
C12
R9 Q2
Q3
C2
C4
R5
R4 C5
R1
R2
R7
R3
R10
C1
Table 10. List of components (see Figure 14 and Figure 15).
Component Description Value Remarks
C1, C6, C8 multilayer ceramic chip
capacitor 68 pF [1]
C2, C7 multilayer ceramic chip
capacitor 1.3 pF [1]
C3, C4 ceramic capacitor 100 nF
C5, C10 tantalum capacitor 10 µF
C9 ceramic capacitor 1 µF
C11 electrolytic capacitor 2200 µF
C12 multilayer ceramic chip
capacitor 18 pF [1]
L1 stripline [2] (W ×L) 0.914 mm ×10.160 mm
L2 stripline [2] (W ×L) 0.914 mm ×24.384 mm
L3 tapered stripline [2] (W1 ×W2 ×L)
0.914 mm ×19.812 mm ×11.024 mm
L4 stripline [2] (W ×L) 19.812 mm ×21.438 mm
L5 stripline [2] (W ×L) 0.914 mm ×42.342 mm
L6 stripline [2] (W ×L) 1.524 mm ×42.418 mm
L7 stripline [2] (W ×L) 17.221 mm × 22.479 mm
L8 tapered stripline [2] (W1 ×W2 ×L)
17.221 mm ×0.914 mm ×20.625 mm
L9 stripline [2] (W ×L) 0.914 mm ×19.126 mm
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 11 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
[1] American Technical Ceramics type 100B or capacitor of same quality.
[2] The striplines are on a double copper-clad Rogers 6006 Printed-Circuit Board (PCB) with εr= 6.15 and
thickness = 0.635 mm.
L10 stripline [2] (W ×L) 0.914 mm ×6.858 mm
R1, R2 SMD resistor 430 Ω
R3 SMD resistor 300 Ω
R4 potentiometer 200 Ω
R5 SMD resistor 2 kΩ
R6 SMD resistor 1.1 kΩ
R7 SMD resistor 11 kΩ
R8 SMD resistor 5.1 Ω
R9 SMD resistor 5.1 kΩ
R10 SMD resistor 910 Ω
Q1 voltage regulator 78L08
Q2 transistor 2N2222
Q3 BLF4G10-160
Table 10. List of components (see Figure 14 and Figure 15).
…continued
Component Description Value Remarks
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 12 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
9. Package outline
Fig 16. Package outline SOT502A
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT502A 99-12-28
03-01-10
0 5 10 mm
scale
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A
p
L
AF
b
D
U2
H
Q
c
1
3
2
D1
E
A
C
q
U1
C
B
E1
M M
w2
UNIT A
mm
Db
12.83
12.57 0.15
0.08 20.02
19.61 9.53
9.25 19.94
18.92 9.91
9.65
4.72
3.43
cU2
0.25 0.5127.94
qw
2
w1
F
1.14
0.89
U1
34.16
33.91
L
5.33
4.32
p
3.38
3.12
Q
1.70
1.45
EE
1
9.50
9.30
inches 0.505
0.495 0.006
0.003 0.788
0.772
D1
19.96
19.66
0.786
0.774 0.375
0.364 0.785
0.745 0.390
0.380
0.186
0.135 0.01 0.021.100
0.045
0.035 1.345
1.335
0.210
0.170 0.133
0.123 0.067
0.057
0.374
0.366
H
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
w1AB
M M M
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 13 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
10. Abbreviations
11. Revision history
Table 11. Abbreviations
Acronym Description
ACPR Adjacent Channel Power Ratio
CDMA Code Division Multiple Access
CW Continuous Waveform
EDGE Enhanced Data GSM Environment
EVM Error Vector Magnitude
GSM Global System for Mobile communications
IS-95 CDMA Interim Standard 95
LDMOS Laterally Diffused Metal Oxide Semiconductor
LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor
PAR Peak-to-Average power Ratio
RF Radio Frequency
RMS Root Mean Square
SMD Surface-Mount Device
VSWR Voltage Standing-Wave Ratio
Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF4G10LS-160_1 20070619 Product data sheet - -
BLF4G10LS-160_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 19 June 2007 14 of 15
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors BLF4G10LS-160
UHF power LDMOS transistor
© NXP B.V. 2007. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 June 2007
Document identifier: BLF4G10LS-160_1
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 2
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Application information. . . . . . . . . . . . . . . . . . . 3
7.1 Ruggedness in class-AB operation. . . . . . . . . . 3
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
13 Contact information. . . . . . . . . . . . . . . . . . . . . 14
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
