1. General description
The 74HC594; 74HCT594 is an 8-bit serial- in/serial or parallel-out shift register with a
storage register. Separate clock and reset inputs are provided on both shift and storage
registers. The device features a serial input (DS) and a serial output (Q7S) to enable
cascading. Data is shifted on the LOW-to-HIGH transitions of the SHCP input, and the
data in the shift register is transferred to the storage register on a LOW-to-HIGH transition
of the STCP input. If both clocks are connected together, the shift register will always be
one clock pulse ahead of the storage register. A LOW level on one of the two register
reset pins (SHR and STR) will clear the corresponding register. Inputs include clamp
diodes. This enables the use of current limiting resistors to interface inputs to voltages in
excess of VCC.
2. Features and benefits
Synchronous serial input and output
Complies with JEDEC standard No.7A
8-bit parallel output
Shift and storage registers have indepen dent direct clear and clocks
Independent clocks for shift and storage registers
100 MHz (typical)
Input levels:
For 74HC594: CMOS level
For 74HCT594: TTL level
Multiple package options
Specified from 40 Cto+85C and from 40 Cto+125C
3. Applications
Serial-to parallel data conversion
Remote control holding register
74HC594; 74HCT594
8-bit shift register with output register
Rev. 4 — 25 February 2016 Product data sheet
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 2 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
4. Ordering information
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperature
range Name Description Version
74HC594D 40 C to +125 C SO16 plastic small outline package; 16 leads;
body width 3.9 mm SOT109-1
74HCT594D
74HC594DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm SOT338-1
74HCT594DB
Fig 1. Functional di agram
PEF
44 4 4 4 4 4 4
'6
6+&3
6+5
67&3
675


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67$*(6+,)75(*,67(5
%,76725$*(5(*,67(5
46
Fig 2. Logic symbol Fig 3. IEC logic symbol
PEF
67&36+&3
6756+5
'6
46
4
4
4
4
4
4
4
4

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
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6+&3
67&3
4
4
4
4
4
4
4
4
6+5
675
'6 
' '
&



&

 5
65*5
46
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 3 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
Fig 4. Logic diag ram
PEF
4 4 4 4 4 4 4
'6
6+&3
6+5
67&3
675
'4
&3
))6+
5
67$*(
'4
&3
))67
5
67$*(672
'4
4
'4
&3
))6+
5
67$*(
'4
&3
))67
5
46
Fig 5. Timing diagram
PEF
46
4
675
6+5
67&3
'6
6+&3
4
4
4
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 4 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 6. Pin configuration SO16 Fig 7. Pin configuration SSOP16
4 9
&&
4 4
4 '6
4 675
4 67&3
4 6+&3
4 6+5
*1' 46
DDI







+&
+&7
+&
+&7
4 9
&&
4 4
4 '6
4 675
4 67&3
4 6+&3
4 6+5
*1' 46
DDI




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
Table 2. Pin description
Symbol Pin Description
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 15, 1, 2, 3, 4, 5, 6, 7 parallel data output
GND 8 ground (0 V)
Q7S 9 serial data output
SHR 10 shift register reset (active LOW)
SHCP 11 shift register clock input
STCP 12 storage register clock input
STR 13 storage register reset (active LOW)
DS 14 serial data input
VCC 16 supply voltage
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 5 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
7. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level;
= LOW-to-HIGH transition;
X = don’t care.
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For SSOP16 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
Table 3. Function table[1]
Function Input
SHR STR SHCP STCP DS
Clear shift register L X X X X
Clear storage register X L X X X
Load DS into shift register stage 0, advance previous stage data to the next stage H X XH or L
Transfer shift register data to storage register and outputs Qn X H X X
Shift register one count pulse ahead of storage register H H X
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V or VI>V
CC + 0.5 V [1] -20 mA
IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] -20 mA
IOoutput curren t VO= 0.5 V to VCC + 0.5 V
Serial data output Q7S - 25 mA
Parallel data output - 35 mA
ICC supply current Serial data output Q7S - 50 mA
Parallel data output - 70 mA
IGND ground current Serial data output Q7S - 50 mA
Parallel data output - 70 mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C[2] - 500 mW
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 6 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
9. Recommended operating conditions
10. Static characteristics
Table 5. Recommended operating con ditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions 74HC594 74HCT594 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VIinput voltage 0 - VCC 0-V
CC V
VOoutput voltage 0 - VCC 0-V
CC V
Tamb ambient temperature 40 - +125 40 - +125 C
t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
Table 6. Static characteristics type 74HC594
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 1.2 - V
VCC = 4.5 V 3.15 2.4 - V
VCC = 6.0 V 4.2 3.2 - V
VIL LOW-level input voltage VCC = 2.0 V - 0. 8 0.5 V
VCC = 4.5 V - 2.1 1.35 V
VCC = 6.0 V - 2.8 1.8 V
VOH HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - V
IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - V
IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - V
VOL LOW-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 V
IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 V
IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 V
IIinput leakage current VI=V
CC or GND; VCC =6.0V - - 0.1 A
ICC supply current VI = VCC or GND; IO = 0 A;
VCC =6.0V --8.0A
Ciinput capacita n c e - 3. 5 - pF
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 7 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
Tamb = 40 C to +85 C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VIL LOW-level input voltage VCC = 2.0 V - - 0 .5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VOH HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V 3.84 - - V
IO = 5.2 mA; VCC = 6.0 V 5.34 - - V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V 3.84 - - V
IO = 7.8 mA; VCC = 6.0 V 5.34 - - V
VOL LOW-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V - - 0.33 V
IO = 5.2 mA; VCC = 6.0 V - - 0.33 V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V - - 0.33 V
IO = 7.8 mA; VCC = 6.0 V - - 0.33 V
IIinput leakage current VI=V
CC or GND; VCC =6.0V - - 1.0 A
ICC supply current VI = VCC or GND; IO = 0 A;
VCC =6.0V --80A
Tamb = 40 C to +125 C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VIL LOW-level input voltage VCC = 2.0 V - - 0 .5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VOH HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V 3.7 - - V
IO = 5.2 mA; VCC = 6.0 V 5.2 - - V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V 3.7 - - V
IO = 7.8 mA; VCC = 6.0 V 5.2 - - V
Table 6. Static characteristics type 74HC594 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 8 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
VOL LOW-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V - - 0.4 V
IO = 5.2 mA; VCC = 6.0 V - - 0.4 V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V - - 0.4 V
IO = 7.8 mA; VCC = 6.0 V - - 0.4 V
IIinput leakage current VI=V
CC or GND; VCC =6.0V - - 1.0 A
ICC supply current VI = VCC or GND; IO = 0 A;
VCC =6.0V --160A
Table 6. Static characteristics type 74HC594 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Table 7. Static characteristics type 74HCT594
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 C
VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V
VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V
VOH HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - V
VOL LOW-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V - 0.16 0.26 V
IIinput leakage current VI=V
CC or GND; VCC =5.5V - - 0.1 A
ICC supply current VI = VCC or GND; IO = 0 A;
VCC =5.5V --8.0A
ICC additional supply current per input pin; VI=V
CC 2.1 V and
other inputs at VCC or GND;
IO=0A; V
CC = 4.5 V to 5.5 V
pins SHR, SHCP, STCP, STR - 150 540 A
pin DS - 25 90 A
Ciinput capacita n c e - 3. 5 - pF
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 9 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
Tamb = 40 C to +85 C
VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V
VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V
VOH HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V 3.84 - - V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V 3.84 - - V
VOL LOW-level output voltage VI = VIH or VIL
Serial data output
IO = 4.0 mA; VCC = 4.5 V - - 0.33 V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V - - 0.33 V
IIinput leakage current VI=V
CC or GND; VCC =5.5V - - 1.0 A
ICC supply current VI = VCC or GND; IO = 0 A;
VCC =5.5V --80A
ICC additional supply current per input pin; VI=V
CC 2.1 V and
other inputs at VCC or GND;
IO=0A; V
CC = 4.5 V to 5.5 V
pins SHR, SHCP, STCP, STR --675A
pin DS - - 112.5 A
Tamb = 40 C to +125 C
VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V
VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V
VOH HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V 3.7 - - V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V 3.7 - - V
VOL LOW-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V - - 0.4 V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V - - 0.4 V
IIinput leakage current VI=V
CC or GND; VCC =5.5V - - 1.0 A
ICC supply current VI = VCC or GND; IO = 0 A;
VCC =5.5V --160A
ICC additional supply current per input pin; VI=V
CC 2.1 V and
other inputs at VCC or GND;
IO=0A; V
CC = 4.5 V to 5.5 V
pins SHR, SHCP, STCP, STR --735A
pin DS - - 122.5 A
Table 7. Static characteristics type 74HCT594 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 10 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
11. Dynamic characteristics
Table 8. Dynamic characteristics type 74HC594
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
tpd propagation
delay SHCP to Q7S; see Figure 8 [1]
VCC = 2.0 V - 44 150 - 185 - 225 ns
VCC = 4.5 V - 16 30 - 37 - 45 ns
VCC = 5.0 V; CL=15pF - 13 - - - - - ns
VCC = 6.0 V - 14 26 - 31 - 38 ns
STCP to Qn; see Figure 9
VCC = 2.0 V - 44 150 - 185 - 225 ns
VCC = 4.5 V - 16 30 - 37 - 45 ns
VCC = 5.0 V; CL = 15 pF - 13 - - - - - ns
VCC = 6.0 V - 14 26 - 31 - 38 ns
tPHL HIGH to
LOW
propagation
delay
SHR to Q7S; see Figure 12
VCC = 2.0 V - 39 150 - 185 - 225 ns
VCC = 4.5 V - 14 30 - 37 - 45 ns
VCC = 5.0 V; CL=15pF - 11 - - - - - ns
VCC = 6.0 V - 12 26 - 31 - 38 ns
STR to Qn; see Figure 13
VCC = 2.0 V - 39 125 - 155 - 185 ns
VCC = 4.5 V - 14 25 - 31 - 37 ns
VCC = 5.0 V; CL=15pF - 11 - - - - - ns
VCC = 6.0 V - 12 21 - 26 - 31 ns
tTHL HIGH to
LOW output
transition
time
Q7S; see Figure 8
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
VCC = 6.0 V - 6 13 - 16 - 19 ns
Qn
VCC = 2.0 V - 14 60 - 75 - 90 ns
VCC = 4.5 V - 5 12 - 15 - 18 ns
VCC = 6.0 V - 4 10 - 13 - 15 ns
tTLH LOW to
HIGH
output
transition
time
Q7S; see Figure 8
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
VCC = 6.0 V - 6 13 - 16 - 19 ns
Qn
VCC = 2.0 V - 14 60 - 75 - 90 ns
VCC = 4.5 V - 5 12 - 15 - 18 ns
VCC = 6.0 V - 4 10 - 13 - 15 ns
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 11 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
tWpulse width SHCP (HIGH or LOW);
see Figure 8
VCC = 2.0 V 80 10 - 100 - 120 - ns
VCC = 4.5 V 16 4 - 20 - 24 - ns
VCC = 6.0 V 14 3 - 17 - 20 - ns
STCP (HIGH or LOW);
see Figure 9
VCC = 2.0 V 80 10 - 100 - 120 - ns
VCC = 4.5 V 16 4 - 20 - 24 - ns
VCC = 6.0 V 14 3 - 17 - 20 - ns
SHR and STR (HIGH or
LOW); see Figure 12 and
Figure 13
VCC = 2.0 V 80 14 - 100 - 120 - ns
VCC = 4.5 V 16 5 - 20 - 24 - ns
VCC = 6.0 V 14 4 - 17 - 20 - ns
tsu set-up time DS to SHCP; see Figure 10
VCC = 2.0 V 100 10 - 125 - 150 - ns
VCC = 4.5 V 20 4 - 25 - 30 - ns
VCC = 6.0 V 17 3 - 21 - 26 - ns
SHR to STCP;
see Figure 11
VCC = 2.0 V 100 14 - 125 - 150 - ns
VCC = 4.5 V 20 5 - 25 - 30 - ns
VCC = 6.0 V 17 4 - 21 - 26 - ns
SHCP to STCP;
see Figure 9
VCC = 2.0 V 100 17 - 125 - 150 - ns
VCC = 4.5 V 20 6 - 25 - 30 - ns
VCC = 6.0 V 17 5 - 21 - 26 - ns
thhold time DS to SHCP; see Figure 10
VCC = 2.0 V 25 8- 30 - 35 -ns
VCC = 4.5 V 5 3- 6 - 7 -ns
VCC = 6.0 V 4 2- 5 - 6 -ns
trec recovery
time SHR to SHCP and
STR to STCP; see
Figure 12 and Figure 13
VCC = 2.0 V 50 14 - 65 - 75 - ns
VCC = 4.5 V 10 5- 13 - 15 -ns
VCC = 6.0 V 9 4- 11 - 13 -ns
Table 8. Dynamic characteristics type 74HC594 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 12 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
[1] tpd is the same as tPHL and tPLH.
[2] CPD is used to determine the dynamic power dissipation (PD in W):
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
fmax maximum
frequency SHCP or STCP;
see Figure 8 and Figure 9
VCC = 2.0 V 6.0 30 - 4.8 - 4.0 - MHz
VCC = 4.5 V 30 92 - 2 4 - 20 - MHz
VCC = 5.0 V; CL = 15 pF - 100 - - - - - MHz
VCC = 6.0 V 35 109 - 28 - 24 - MHz
CPD power
dissipation
capacitance
VI = GND to VCC;
VCC =5V; f
i=1MHz [2] -84- - - - -pF
Table 8. Dynamic characteristics type 74HC594 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
Table 9. Dynamic characteristics type 74HCT594
GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
tpd propagation
delay SHCP to Q7S; see Figure 8 [1] -1832 - 40 - 48ns
VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns
STCP to Qn; see Figure 9 -1832 - 40 - 48ns
VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns
tPHL HIGH to
LOW
propagation
delay
SHR to Q7S; see Figure 12 -1730 - 38 - 45ns
VCC = 5.0 V; CL = 15 pF - 14 - - - - - ns
STR to Qn; see Figure 13 -1730 - 38 - 45ns
VCC = 5.0 V; CL = 15 pF - 14 - - - - - ns
tTHL HIGH to
LOW output
transition
time
Q7S; see Figure 8
VCC = 4.5 V - 7 15 - 19 - 22 ns
Qn
VCC = 4.5 V - 5 12 - 15 - 18 ns
tTLH LOW to
HIGH output
transition
time
Q7S; see Figure 8
VCC = 4.5 V - 7 15 - 19 - 22 ns
Qn
VCC = 4.5 V - 5 12 - 15 - 18 ns
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 13 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
[1] tpd is the same as tPHL and tPLH.
[2] CPD is used to determine the dynamic power dissipation (PD in W):
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
tWpulse width SHCP (HIGH or LOW);
see Figure 8 16 4 - 20 - 24 - ns
STCP (HIGH or LOW);
see Figure 9 16 4 - 20 - 24 - ns
SHR and STR (HIGH or
LOW); see Figure 12 and
Figure 13
16 6 - 20 - 24 - ns
tsu set-up time DS to SHCP; see Figure 10 20 4 - 25 - 30 - ns
SHR to STCP;
see Figure 11 20 6 - 25 - 30 - ns
SHCP to STCP;
see Figure 9 20 7 - 25 - 30 - ns
thhold time DSto SHCP; see Figure 10 53- 6 - 7 - ns
trec recovery
time SHR to SHCP and
STR to STCP; see Figure 12
and Figure 13
10 5- 13 - 15 - ns
fmax maximum
frequency SHCP or STCP;
see Figure 8 and Figure 9 30 92 - 24 - 20 - MHz
VCC = 5.0 V; CL = 15 pF - 100 - - - - - MHz
CPD power
dissipation
capacitance
VI = GND to VCC 1.5 V;
VCC =5V; f
i=1MHz [2] -89- - - - - pF
Table 9. Dynamic characteristics type 74HCT594 …continued
GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 14.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 14 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
12. Waveforms
Measurement points are given in Table 10.
tPLH and tPHL are the same as tpd.
tTLH = LOW to HIGH output transition time; tTHL = HIGH to LOW output transition time.
Fig 8. The shift clock (SHCP) to output (Q7S) prop agation delays, the shift clock pulse width, the maximum shift
clock frequency, and output transition times
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Measurement points are given in Table 10.
tPLH and tPHL are the same as tpd.
Fig 9. The storage clock (STCP) to output (Qn), propagation delays, the storage clock pulse width, the
maximum storage clock pulse frequency and the shift clock to storage clock set-up time
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 15 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
Measurement points are given in Table 10.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 10. The data set-up time and hold times for DS input to SHCP
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Fig 11. The set-up time shift reset (SHR) to storage clock (STCP)
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© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 16 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
Measurement points are given in Table 10.
tPLH and tPHL are the same as tpd.
Fig 12. The shift reset (SHR) pulse width, the shift reset to output (Q7S) propagation delay and the shift reset to
shift clock (SHCP) recovery time
PEF
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W3+/
90
WUHF
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6+&3LQSXW
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Measurement points are given in Table 10.
tPLH and tPHL are the same as tpd.
Fig 13. The storage reset (STR) pulse width, the storage reset to output (Qn) propagation delay and the storage
reset to storage clock (STCP) recovery time
PEF
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0
W
3+/
9
0
W
UHF
W
:
9
0
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675LQSXW
Table 10. Measurement points
Type Input Output
VMVM
74HC594 0.5 VCC 0.5 VCC
74HCT594 1.3 V 1.3 V
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 17 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
Test data is given in Table 11.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance
S1 = Test selection switch
Fig 14. Test circuit for measuring switching times
9
0
9
0
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:
W
:
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&&
9
&&
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57
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&/
RSHQ
*
Table 11. Test data
Type Input Load S1 position
VItr, tfCLRLtPHL, tPLH tPZH, tPHZ tPZL, tPLZ
74HC594 VCC 6ns 15pF, 50 pF 1kopen GND VCC
74HCT594 3V 6ns 15pF, 50 pF 1kopen GND VCC
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 18 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
13. Package outline
Fig 15. Package outline SOT109-1 (SO16)
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© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 19 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
Fig 16. Package outline SOT338-1 (SSOP16)
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© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 20 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
14. Abbreviations
15. Revision history
Table 12. Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
LSTTL Low-Power Schottky Transistor-Transistor Logic
MM Machine Model
TTL Transistor-Transistor Logic
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT594 v.4 20160225 Product data sheet - 74HC_HCT594 v.3
Modifications: •Type numbers 74HC594N and 74HCT594N (SOT38-4) removed.
74HC_HCT594 v.3 20061220 Product data sheet - 74HC_HCT594_CNV v.2
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Table 1 “Ordering information” updated.
74HC_HCT594_CNV v.2 19970908 Product specification - 74HC_HCT594_CNV v.1
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 21 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device (s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in life support , life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Custo mers should provide appropriate
design and operating safeguards to minimize the risks associate d with t heir
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party custo mer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by cust omer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
74HC_HCT594 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 25 February 2016 22 of 23
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for aut omo tive use. It i s neither qua lif ied nor test ed
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standards, custome r
(a) shall use the product without Nexperia’s warranty of the
product for such au tomotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting f rom customer design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
16.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
17. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia 74HC594; 74HCT594
8-bit shift register with output register
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 5
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Recommended operating conditions. . . . . . . . 6
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 10
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18
14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 20
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
17 Contact information. . . . . . . . . . . . . . . . . . . . . 22
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
25 February 2016