1
FEATURES
DESCRIPTION
APPLICATIONS
* USB requirement that downstream-facing ports are bypassed with at least 120 µF per hub
IN
FAULT
EN
OUT
ILIM
GND
GND
USB Data
USB
Port
120 F *µ
R
15 k
ILIM
W
0.1 Fµ
R
100 k
FAULT
W
5-V USB Input
FAULT Signal
Control Signal
2
1
3
5
6
4
OUT
EN
GND ILIM
FAULT
IN
DBV PACKAGE
(TOP VIEW)
TPS2014600mA
TPS20151 A
TPS2041B500mA
TPS2051B500mA
TPS2045A 250mA
TPS2049100mA
TPS2055A 250mA
TPS20611 A
TPS20651 A
TPS20681.5 A
TPS20691.5 A
TPS2042B500mA
TPS2052B500mA
TPS2046B250mA
TPS2056250mA
TPS20621 A
TPS20661 A
TPS20601.5 A
TPS20641.5 A
TPS2080500mA
TPS2081500mA
TPS2082500mA
TPS2090250mA
TPS2091250mA
TPS2092250mA
TPS2043B500mA
TPS2053B500mA
TPS2047B250mA
TPS2057A 250mA
TPS20631 A
TPS20671 A
TPS2044B500mA
TPS2054B500mA
TPS2048A 250mA
TPS2058250mA
TPS2085500mA
TPS2086500mA
TPS2087500mA
TPS2095250mA
TPS2096250mA
TPS2097250mA
TPS201xA 0.2 A to2 A
TPS202x0.2 A to2 A
TPS203x0.2 A to2 A
GENERAL SWITCHCATALOG
33m ,SingleW80m ,SingleW80m ,DualW80m ,DualW80m , TripleW80m ,QuadW80m ,QuadW
TPS2551-Q1
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...................................................................................................................................................................................................... SLVS850 – JUNE 2008
ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCH
•Qualified for Automotive Applications•Adjustable Current-Limit: 100 mA to 1100 mA
The TPS2551 power-distribution switch is intendedfor applications in which heavy capacitive loads and•Fast Overcurrent Response: 2 µs (Typ)
short circuits are likely to be encountered,•85-m ΩHigh-Side MOSFET
incorporating a 100-m Ω, N-channel MOSFET in a•Reverse Input-Output Voltage Protection
single package. The current-limit threshold is useradjustable between 100 mA and 1.1 A via an•Operating Range: 2.5 V to 6.5 V
external resistor. The power-switch rise and fall times•Deglitched Fault Report
are controlled to minimize current surges during•1- µA Maximum Standby Supply Current
switching.•Junction Temperature Range: – 40 ° C to 125 ° C
The device limits the output current to a desired level•Built-in Soft-Start
by switching into a constant-current mode when theoutput load exceeds the current-limit threshold or a•15-kV ESD Protection (With External
short is present. An internal reverse-voltage detectionCapacitance)
comparator disables the power-switch in the eventthat the output voltage is driven higher than the inputto protect devices on the input side of the switch. The•USB Ports/Hubs
FAULT logic output asserts low during both•Cell Phones
overcurrent and reverse-voltage conditions.•Laptops
•Heavy Capacitive Loads•Reverse-Voltage Protection
Figure 1. Typical Application as USB Power Switch
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
(1)
DISSIPATION RATINGS
TPS2551-Q1
SLVS850 – JUNE 2008 ......................................................................................................................................................................................................
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This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields.These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according toMIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher thanmaximum-rated voltages to these high-impedance circuits. During storage or handling the device leads should be shorted togetheror the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriate logicvoltage level, preferably either V
CC
or ground. Specific guidelines for handling devices of this type are contained in the publicationGuidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.
ORDERING INFORMATION
(1)
T
J
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
– 40 ° C to 125 ° C SOT-23 – DBV Reel of 3000 TPS2551QDBVRQ1 PIUQ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com .(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
over operating free-air temperature range unless otherwise noted
(2)
Voltage range on IN, OUT, EN, ILIM, FAULT – 0.3 V to 7 VVoltage range from IN to OUT – 7 V to 7 VI
OUT
Continuous output current Internally limitedContinuous total power dissipation See Dissipation Ratings TableFAULT sink current 25 mAILIM source current 1 mAT
J
Operating junction temperature range – 40 ° C to 150 ° CT
Sgt
Storage temperature range – 65 ° C to 150 ° CLead temperature 1,6 mm (1/16-inch) from case for 10 seconds 300 ° CHuman-Body Model (HBM) 2000 VESD Electrostatic discharge rating
Charged-Device Model (CDM) 1500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) Voltages are referenced to GND unless otherwise noted.
BOARD PACKAGE THERMAL THERMAL T
A
≤25 ° C DERATING T
A
= 70 ° C T
A
= 85 ° CRESISTANCE RESISTANCE
POWER FACTOR ABOVE POWER POWERθ
JA
θ
JC
RATING
T
A
= 25 ° C RATING RATING
Low-K
(1)
DBV 350 ° C/W 55 ° C/W 285 mW 2.85 mW/ ° C 155 mW 114 mWHigh-K
(2)
DBV 160 ° C/W 55 ° C/W 625 mW 6.25 mW/ ° C 340 mW 250 mW
(1) The JEDEC low-K (1s) board used to derive this data was a 3-in × 3-in, two-layer board with 2-oz copper traces on top of the board.(2) The JEDEC high-K (2s2p) board used to derive this data was a 3-in × 3-in, multilayer board with 1-oz internal power and ground planesand 2-oz copper traces on top and bottom of the board.
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RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
TPS2551-Q1
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...................................................................................................................................................................................................... SLVS850 – JUNE 2008
MIN MAX UNIT
V
IN
Input voltage, IN 2.5 6.5 VV
EN
Enable voltage 0 6.5 VI
OUT
Continuous output current, OUT 0 1.1 AR
ILIM
Current-limit set resistor from ILIM to GND 14.3 80.6 k Ω
I
FAULT
FAULT sink current 0 10 mAT
J
Operating junction temperature – 40 125 ° C
over recommended operating junction temperature range, 2.5 V ≤V
IN
≤6.5 V, R
ILIM
= 14.3 k Ω, V
EN
= 5.0 V (unless otherwisenoted)
PARAMETER TEST CONDITIONS
(1)
MIN TYP MAX UNIT
POWER SWITCH
T
J
= 25 ° C 85 95Static drain-source on-stater
DS(on)
mΩresistance
– 40 ° C ≤T
J
≤125 ° C 135V
IN
= 6.5 V 1.0 1.5C
L
= 1 µF, R
L
= 100 Ω,t
r
Rise time, output
(see Figure 2 )V
IN
= 2.5 V 0.65 1.0
msV
IN
= 6.5 V 0.2 0.5C
L
= 1 µF, R
L
= 100 Ω,t
f
Fall time, output
(see Figure 2 )V
IN
= 2.5 V 0.2 0.5
ENABLE INPUT EN OR EN
V
IH
High-level input voltage 1.1
VV
IL
Low-level input voltage 0.66I
EN
Input current V
EN
= 0 V or 6.5 V – 0.5 0.5 µAt
on
Turnon time 3.6 msC
L
= 1 µF, R
L
= 100 Ω, (see Figure 2 )t
off
Turnoff time 3 ms
CURRENT LIMIT
R
ILIM
= 80.6 k Ω110 215 300Short-circuit current, OUTI
OS
R
ILIM
= 38.3 k Ω300 500 650connected to GND
R
ILIM
= 15 k Ω1050 1400 1650
mAR
ILIM
= 80.6 k Ω290 315 420Current-limit threshold (maximumI
OC
dc output current I
OUT
delivered to R
ILIM
= 38.3 k Ω620 665 750load)
R
ILIM
= 15 k Ω1550 1650 1750t
IOS
Response time to short circuit V
IN
= 5.0 V (see Figure 3 ) 2 µs
REVERSE-VOLTAGE PROTECTION
Reverse-voltage comparator trippoint
95 135 190 mV(V
OUT
– V
IN
)Time from reverse-voltage
V
IN
= 5.0 V 3 5 7 mscondition to MOSFET turn off
SUPPLY CURRENT
V
IN
= 6.5 V, No load on OUT, V
EN
= 0 V, 14.3 k Ω ≤I
IN_off
Supply current, low-level output 0.1 1 µAR
ILIM
≤80.6 k Ω
R
ILIM
= 15 k Ω150 µAV
IN
= 6.5 V, No load onI
IN_on
Supply current, high-level output
OUT, V
EN
= 6.5 V
R
ILIM
= 80.6 k Ω130 µAI
REV
Reverse leakage current V
OUT
= 6.5 V, V
IN
= 0 V, T
J
= 25 ° C 0.01 1 µA
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into accountseparately.
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SLVS850 – JUNE 2008 ......................................................................................................................................................................................................
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ELECTRICAL CHARACTERISTICS (continued)over recommended operating junction temperature range, 2.5 V ≤V
IN
≤6.5 V, R
ILIM
= 14.3 k Ω, V
EN
= 5.0 V (unless otherwisenoted)
PARAMETER TEST CONDITIONS
(1)
MIN TYP MAX UNIT
UNDERVOLTAGE LOCKOUT
V
UVLO
Low-level input voltage, IN V
IN
rising 2.35 2.45 VHysteresis, IN T
J
= 25 ° C 25 mV
FAULT FLAG
V
OL
Output low voltage, FAULT I
FAULT
= 1 mA 180 mVOff-state leakage V
FAULT
= 6.5 V 1 µAFAULT assertion or deassertion due to overcurrent
5 7.5 10 msconditionFAULT deglitch
FAULT assertion or deassertion due to
2 4 6 msreverse-voltage condition
THERMAL SHUTDOWN
Thermal shutdown threshold 155 ° CThermal shutdown threshold in
135 ° Ccurrent-limit
Hysteresis 15 ° C
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DEVICE INFORMATION
Charge
Pump
Driver
UVLO
Current
Limit
Thermal
Sense
IN
GND
EN
ILIM
OUT
FAULT
CS
Reverse
Voltage
Comparator
-
+
Current
Sense
4-ms
Deglitch
8-msDeglitch
PARAMETER MEASUREMENT INFORMATION
RLCL
OUT
trtf
90% 90%
10%
10%
VOLTAGEWAVEFORMS
TESTCIRCUIT
50% 50%
90%
10%
ton toff
VOUT
VOUT
VEN
TPS2551-Q1
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...................................................................................................................................................................................................... SLVS850 – JUNE 2008
Terminal Functions
TERMINAL
I/O DESCRIPTIONNAME NO.
EN 3 I Enable input, logic high turns on power switchFAULT 4 O Active-low open-drain output, asserted during overcurrent, overtemperature, or reverse-voltage conditions.GND 2 Ground connectionILIM 5 I External resistor used to set current-limit threshold; recommended 14.3 k Ω ≤ R
ILIM
≤80.6 k Ω.IN 1 I Input voltage; connect a 0.1 µF or greater ceramic capacitor from IN to GND as close to the IC as possible.OUT 6 O Power-switch output
FUNCTIONAL BLOCK DIAGRAM
Figure 2. Test Circuit and Voltage Waveforms
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tIOS
IOS
IOUT
IOUT
IOS IOC
DECREASING
LOAD
RESISTANCE
VOUT
DECREASING
LOAD
RESISTANCE
TPS2551-Q1
SLVS850 – JUNE 2008 ......................................................................................................................................................................................................
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PARAMETER MEASUREMENT INFORMATION (continued)
Figure 3. Response Time to Short-Circuit Waveform
Figure 4. Output Voltage vs. Current-Limit Threshold
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TYPICAL CHARACTERISTICS
TPS2551-Q1
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...................................................................................................................................................................................................... SLVS850 – JUNE 2008
Figure 5. Turnon Delay and Rise Time
Figure 6. Turnoff Delay and Fall Time
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TYPICAL CHARACTERISTICS (continued)
Figure 7. Device Enabled into Short-Circuit
Figure 8. Full-Load to Short-Circuit Transient Response
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...................................................................................................................................................................................................... SLVS850 – JUNE 2008
TYPICAL CHARACTERISTICS (continued)
Figure 9. Short-Circuit to Full-Load Recovery Response
Figure 10. No-Load to Short-Circuit Transient Response
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TYPICAL CHARACTERISTICS (continued)
Figure 11. Short-Circuit to No-Load Recovery Response
Figure 12. No Load to 1 ΩTransient Response
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...................................................................................................................................................................................................... SLVS850 – JUNE 2008
TYPICAL CHARACTERISTICS (continued)
Figure 13. 1 Ωto No Load Transient Response
Figure 14. Reverse-Voltage Protection Response
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2.30
UVLOFalling
T -JunctionTemperature-°C
J
-50 0 50 100 150
2.40
2.31
2.32
2.33
2.34
2.35
2.36
2.37
2.38
2.39
UVLORising
UVLO-UndervoltageLockout-V
TPS2551-Q1
SLVS850 – JUNE 2008 ......................................................................................................................................................................................................
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TYPICAL CHARACTERISTICS (continued)
Figure 15. Reverse-Voltage Protection Recovery
Figure 16. UVLO – Undervoltage Lockout – V
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0
T -JunctionTemperature-°C
J
-50 0 50 100 150
0.50
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
IIN-SupplyCurrent,OutputDisabled- Am
V =6.5V
IN
V =5V
IN
V =3.3V
IN
V =2.5V
IN
TPS2551-Q1
www.ti.com
...................................................................................................................................................................................................... SLVS850 – JUNE 2008
TYPICAL CHARACTERISTICS (continued)
Figure 17. I
IN
– Supply Current, Output Disabled – µA
Figure 18. I
IN
– Supply Current, Output Enabled – µA
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0
PeakCurrent- A
0 1.5 3 4.5 6
20
2
4
6
8
10
12
14
16
18
CurrentLimitResponse- sm
V =5V,
T =25°C
IN
A
0
T -JunctionTemperature-°C
J
-50 0 50 100 150
25
50
75
100
125
150
r -StaticDrain-SourceOn-StateResistance-m
DS(on) W
TPS2551-Q1
SLVS850 – JUNE 2008 ......................................................................................................................................................................................................
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TYPICAL CHARACTERISTICS (continued)
Figure 19. Current Limit Response – µs
Figure 20. MOSFET r
DS(on)
Vs. Junction Temperature
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DETAILED DESCRIPTION
Overview
Overcurrent
Reverse-Voltage Protection
FAULT Response
Undervoltage Lockout (UVLO)
TPS2551-Q1
www.ti.com
...................................................................................................................................................................................................... SLVS850 – JUNE 2008
The TPS2551 is a current-limited power-distribution switch that uses N-channel MOSFETs for applications whereshort-circuits or heavy capacitive loads will be encountered. This device allows the user to program thecurrent-limit threshold between 100 mA and 1.1 A via an external resistor. Additional device shutdown featuresinclude overtemperature protection and reverse-voltage protection. The device incorporates an internal chargepump and gate drive circuitry necessary to drive the N-channel MOSFET. The charge pump supplies power tothe driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. Thecharge pump operates from input voltages as low as 2.5 V and requires little supply current. The driver controlsthe gate voltage of the power switch. The driver incorporates circuitry that controls the rise and fall times of theoutput voltage to limit large current and voltage surges and provide built-in soft-start functionality.
The TPS2551 responds to an overcurrent condition by limiting its output current to the I
OC
and I
OS
levels shownin Figure 21 . Three response profiles are possible depending on the loading conditions and are summarized inFigure 4 .
One response profile occurs if the TPS2551 is enabled into a short-circuit. The output voltage is held near zeropotential with respect to ground and the TPS2551 ramps the output current to I
OS
(see Figure 7 ).
A second response profile occurs if a short is applied to the output after the TPS2551 is enabled. The deviceresponds to the overcurrent condition within time t
IOS
(see Figure 3 ). The current-sense amplifier is over-drivenduring this time and momentarily disables the internal current-limit MOSFET. The current-sense amplifiergradually recovers and limits the output current to I
OS
.
A third response profile occurs if the load current gradually increases. The device first limits the load current toI
OC
. If the load demands a current greater than I
OC
, the TPS2551 folds back the current to I
OS
and the outputvoltage decreases to I
OS
x R
LOAD
for a resistive load, which is shown in Figure 4 .
The TPS2551 thermal cycles if an overload condition is present long enough to activate thermal limiting in any ofthe above cases. The device turns off when the junction temperature exceeds 135 ° C (typ). The device remainsoff until the junction temperature cools 15 ° C (typ) and then restarts. The TPS2551 cycles on/off until the overloadis removed (see Figure 9 and Figure 11 ) .
The reverse-voltage protection feature turns off the N-channel MOSFET whenever the output voltage exceedsthe input voltage by 135 mV (typical) for 4-ms. This prevents damage to devices on the input side of theTPS2551 by preventing significant current from sinking into the input capacitance. The N-channel MOSFET isallowed to turn-on once the output voltage goes below the input voltage for the same 4-ms deglitch time. Thereverse-voltage comparator also asserts the FAULT output (active-low) after 4-ms.
The FAULT open-drain output is asserted (active low) during an overcurrent, overtemperature or reverse-voltagecondition. The output remains asserted until the fault condition is removed. The TPS2551 is designed toeliminate false FAULT reporting by using an internal delay "deglitch" circuit for overcurrent (7.5-ms) andreverse-voltage (4-ms) conditions without the need for external circuitry. This ensures that FAULT is notaccidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch circuitrydelays entering and leaving fault conditions. Overtemperature conditions are not deglitched and assert theFAULT signal immediately.
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLOturn-on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage drop from largecurrent surges.
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Enable (EN)
Thermal Sense
TPS2551-Q1
SLVS850 – JUNE 2008 ......................................................................................................................................................................................................
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The logic enable controls the power switch, bias for the charge pump, driver, and other circuits to reduce thesupply current. The supply current is reduced to less than 1- µA when a logic high is present on EN or when alogic low is present on EN. A logic low input on EN or a logic high input on EN enables the driver, control circuits,and power switch. The enable input is compatible with both TTL and CMOS logic levels.
The TPS2551 protects itself with two independent thermal sensing circuits that monitor the operating temperatureof the power-switch and disables operation if the temperature exceeds recommended operating conditions. Thedevice operates in constant-current mode during an overcurrent conditions, which increases the voltage dropacross power-switch. The power dissipation in the package is proportional to the voltage drop across thepower-switch, so the junction temperature rises during an overcurrent condition. The first thermal sensor turns offthe power-switch when the die temperature exceeds 135 ° C and the part is in current limit. The second thermalsensor turns off the power-switch when the die temperature exceeds 155 ° C regardless of whether thepower-switch is in current limit. Hysteresis is built into both thermal sensors, and the switch turns on after thedevice has cooled approximately 15 ° C. The switch continues to cycle off and on until the fault is removed. Theopen-drain false reporting output FAULT is asserted (active low) immediately during an overtemperatureshutdown condition.
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APPLICATION INFORMATION
Input and Output Capacitance
Programming the Current-Limit Threshold
TPS2551-Q1
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...................................................................................................................................................................................................... SLVS850 – JUNE 2008
Input and output capacitance improve the performance of the device; the actual capacitance should be optimizedfor the particular application. For all applications, a 0.01 µF to 0.1 µF ceramic bypass capacitor between IN andGND is recommended as close to the device as possible for local noise de-coupling. This precaution reducesringing on the input due to power-supply transients. Additional input capacitance may be needed on the input toreduce voltage overshoot from exceeding the absolute maximum voltage of the device during heavy transients.This is especially important during bench testing when long, inductive cables are used to connect the evaluationboard to the bench power-supply.
Placing a high-value electrolytic capacitor on the output pin is recommended when the large transient currentsare expected on the output. Additionally, bypassing the output with a 0.01 µF to 0.1 µF ceramic capacitorimproves the immunity of the device to short-circuit transients.
The overcurrent threshold is user programmable via an external resistor. Many applications require that theminimum current-limit is above a certain current level or that the maximum current-limit is below a certain currentlevel, so it is important to consider the tolerance of the overcurrent threshold when selecting a value for R
ILIM
.The following equations and Figure 21 can be used to calculate the resulting overcurrent threshold for a givenexternal resistor value (R
ILIM
). Figure 21 includes current-limit tolerance due to variations caused by temperatureand process. The traces routing the R
ILIM
resistor to the TPS2551 should be as short as possible to reduceparasitic effects on the current-limit accuracy.
There are two important current-limit thresholds for the device and are related by Figure 4 . The first threshold isthe short-circuit current threshold I
OS
. I
OS
is the current delivered to the load if the part is enabled into ashort-circuit or a short-circuit is applied during normal operation. The second threshold is the overcurrentthreshold I
OC
. I
OC
is the peak dc current that can be delivered to the load before the device begins to limitcurrent. I
OC
is important if ramped loads or slow transients are common to the application. It is important toconsider both I
OS
and I
OC
when choosing R
ILIM
. R
ILIM
can be selected to provide a current-limit threshold thatoccurs 1) above a minimum load current or 2) below a maximum load current.
To design above a minimum current-limit threshold, find the intersection of R
ILIM
and the maximum desired loadcurrent on the I
OS(min)
curve and choose a value of R
ILIM
below this value. Programming the current-limit above aminimum threshold is important to ensure start-up into full-load or heavy capacitive loads. The resultingmaximum dc load current is the intersection of the selected value of R
ILIM
and the I
OC(max)
curve.
To design below a maximum dc current level, find the intersection of R
ILIM
and the maximum desired load currenton the I
OC(max)
curve and choose a value of R
ILIM
above this value. Programming the current-limit below amaximum threshold is important to avoid current-limiting upstream power supplies causing the input voltage busto droop. The resulting minimum short-circuit current is the intersection of the selected value of R
ILIM
and theI
OS(min)
curve.
Overcurrent Threshold Equations (I
OC
):•I
OC(max)
(mA) = (24500 V) / (R
ILIM
kΩ)
0.975
•I
OC(typ)
(mA) = (23800 V) / (R
ILIM
kΩ)
0.985
•I
OC(min)
(mA) = (23100 V) / (R
ILIM
kΩ)
0.996
Short-Circuit Current Equations (I
OS
):•I
OS(max)
(mA) = (25500 V) / (R
ILIM
kΩ)
1.013
•I
OS(typ)
(mA) = (28700 V) / (R
ILIM
kΩ)
1.114
•I
OS(min)
(mA) = (39700 V) / (R
ILIM
kΩ)
1.342
where 14.3 k Ω ≤ R
ILIM
≤80.6 k Ω. I
OS(typ)
and I
OS(max)
are not plotted to improve graph clarity.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): TPS2551-Q1
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700
1800
15 20 25 30 35 40 45 50 55 60 65 70 75 80
R -k
ILIM W
Current-LimitThreshold-mA
IOC(max)
IOC(typ)
IOC(min)
IOS(min)
Application 1: Designing Above a Minimum Current Limit
Application 2: Designing Below a Maximum Current Limit
TPS2551-Q1
SLVS850 – JUNE 2008 ......................................................................................................................................................................................................
www.ti.com
Figure 21. Current-Limit Threshold vs R
ILIM
Some applications require that current-limiting cannot occur below a certain threshold. For this example, assumethat 1 A must be delivered to the load so that the minimum desired current-limit threshold is 1000 mA. Use theI
OS
equations and Figure 21 to select R
ILIM
.•I
OS(min)
(mA) = 1000 mA•I
OS(min)
(mA) = (39700 V) / (R
ILIM
(k Ω))
1.342
•R
ILIM
(k Ω) = [(39700 V) / (I
OS(min)
(mA))]
1/1.342
•R
ILIM
= 15.54 k Ω
Select the closest 1% resistor less than the calculated value: R
ILIM
= 15.4 k Ω. This sets the minimum current-limitthreshold at 1 A . Use the I
OC
equations, Figure 21 , and the previously calculated value for R
ILIM
to calculate themaximum resulting current-limit threshold.•R
ILIM
= 15.4 k Ω
•I
OC(max)
(mA) = (24500 V) / (R
ILIM
(k Ω))
0.975
•I
OC(max)
(mA) = (24500 V) / (15 (k Ω))
0.975
•I
OC(max)
= 1703 mA
The resulting maximum current-limit threshold is 1.7 A with a 15.4 k Ωresistor.
Some applications require that current-limiting must occur below a certain threshold. For this example, assumethat the desired upper current-limit threshold must be below 1.25 A to protect an up-stream power supply. Usethe I
OC
equations and Figure 21 to select R
ILIM
.•I
OC(max)
(mA) = 1250 mA•I
OC(max)
(mA) = (24500 V) / (R
ILIM
(k Ω))
0.975
•R
ILIM
(k Ω) = [(24500 V) / (I
OC(max)
(mA))]
1/0.975
•R
ILIM
= 21.15 k Ω
18 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2551-Q1
Power Dissipation and Junction Temperature
Universal Serial Bus (USB) Power-Distribution Requirements
TPS2551-Q1
www.ti.com
...................................................................................................................................................................................................... SLVS850 – JUNE 2008
Select the closest 1% resistor greater than the calculated value: R
ILIM
= 21.5 k Ω. This sets the maximumcurrent-limit threshold at 1.25 A . Use the I
OS
equations, Figure 21 , and the previously calculated value for R
ILIMto calculate the minimum resulting current-limit threshold.•R
ILIM
= 21.5 k Ω
•I
OS(min)
(mA) = (39700 V) / (R
ILIM
(k Ω))
1.342
•I
OS(min)
(mA) = (39700 V) / (21.5 (k Ω))
1.342
•I
OS(min)
= 647 mA
The resulting minimum current-limit threshold is 647 mA with a 21.5 k Ωresistor.
The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. Itis good design practice to estimate power dissipation and junction temperature. The below analysis gives anapproximation for calculating junction temperature based on the power dissipation in the package. However, it isimportant to note that thermal analysis is strongly dependent on additional system level factors. Such factorsinclude air flow, board layout, copper thickness and surface area, and proximity to other devices dissipatingpower. Good thermal design practice must include all system level factors in addition to individual componentanalysis.
Begin by determining the r
DS(on)
of the N-channel MOSFET relative to the input voltage and operatingtemperature. As an initial estimate, use the highest operating ambient temperature of interest and read r
DS(on)from the typical characteristics graph. Using this value, the power dissipation can be calculated by:P
D
= r
DS(on)
× I
OUT
2
Where:
P
D
= Total power dissipation (W)r
DS(on)
= Power switch on-resistance ( Ω)I
OUT
= Maximum current-limit threshold (A)
This step calculates the total power dissipation of the N-channel MOSFET.
Finally, calculate the junction temperature:T
J
= P
D
× R
θJA
+ T
A
Where:
T
A
= Ambient temperature ( ° C)R
θJA
= Thermal resistance ( ° C/W)P
D
= Total power dissipation (W)
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeatthe calculation using the "refined" r
DS(on)
from the previous calculation as the new estimate. Two or threeiterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependenton thermal resistance R
θJA
, and thermal resistance is highly dependent on the individual package and boardlayout. The "Dissipating Rating Table" at the beginning of this document provides example thermal resistancesfor specific packages and board layouts.
One application for this device is for current-limiting in universal serial bus (USB) applications. The original USBinterface was a 12-Mb/s or 1.5-Mb/s, multiplexed serial bus designed for low-to-medium bandwidth PCperipherals (e.g., keyboards, printers, scanners, and mice). As the demand for more bandwidth increased, theUSB 2.0 standard was introduced increasing the maximum data rate to 480-Mb/s. The four-wire USB interface isconceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for differential data,and two lines are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where poweris distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 Vfrom the 5-V input or its own internal power supply. The USB specification classifies two different classes of
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): TPS2551-Q1
Self-Powered and Bus-Powered Hubs
Low-Power Bus-Powered and High-Power Bus-Powered Functions
USB Power-Distribution Requirements
TPS2551-Q1
SLVS850 – JUNE 2008 ......................................................................................................................................................................................................
www.ti.com
devices depending on its maximum current draw. A device classified as low-power can draw up to 100 mA asdefined by the standard. A device classified as high-power can draw up to 500 mA. It is important that theminimum current-limit threshold of the current-limiting power-switch exceed the maximum current-limit draw ofthe intended application. The latest USB standard should always be referenced when considering thecurrent-limit threshold
The USB specification defines two types of devices as hubs and functions. A USB hub is a device that containsmultiple ports for different USB devices to connect and can be self-powered (SPH) or bus-powered (BPH). Afunction is a USB device that is able to transmit or receive data or control information over the bus. A USBfunction can be embedded in a USB hub. A USB function can be one of three types included in the list below.•Low-power, bus-powered function•High-power, bus-powered function•Self-powered function
SPHs and BPHs distribute data and power to downstream functions. The TPS2551 has higher current capabilitythan required for a single USB port allowing it to power multiple downstream ports.
A SPH has a local power supply that powers embedded functions and downstream ports. This power supplymust provide between 4.75 V to 5.25 V to downstream facing devices under full-load and no-load conditions.SPHs are required to have current-limit protection and must report overcurrent conditions to the USB controller.Typical SPHs are desktop PCs, monitors, printers, and stand-alone hubs.
A BPH obtains all power from an upstream port and often contains an embedded function. It must power up withless than 100 mA. The BPH usually has one embedded function, and power is always available to the controllerof the hub. If the embedded function and hub require more than 100 mA on power up, the power to theembedded function may need to be kept off until enumeration is completed. This is accomplished by removingpower or by shutting off the clock to the embedded function. Power switching the embedded function is notnecessary if the aggregate power draw for the function and controller is less than 100 mA. The total currentdrawn by the bus-powered device is the sum of the current to the controller, the embedded function, and thedownstream ports, and it is limited to 500 mA from an upstream port.
Both low-power and high-power bus-powered functions obtain all power from upstream ports. Low-powerfunctions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and candraw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ωand 10 µF at power up, the device must implement inrush current limiting.
USB can be implemented in several ways regardless of the type of USB device being developed. Severalpower-distribution features must be implemented.•SPHs must:– Current-limit downstream ports– Report overcurrent conditions•BPHs must:– Enable/disable power to downstream ports– Power up at < 100 mA– Limit inrush current ( < 44 Ωand 10 µF)•Functions must:– Limit inrush currents– Power up at < 100 mA
The feature set of the TPS2551 meets each of these requirements. The integrated current-limiting andovercurrent reporting is required by self-powered hubs. The logic-level enable and controlled rise times meet theneed of both input and output ports on bus-powered hubs and the input ports for bus-powered functions.
20 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2551-Q1
Auto-Retry Functionality
OUT
IN
GND
FAULT ILIM
EN
Input
TPS2551
PowerPad
Output
0.1 Fm
R
100k
FAULT
W
C
0.1 F
RETRY
m
R
20k
ILIM
W
CLOAD
RLOAD
1kW
OUT
IN
GND
FAULT ILIM
EN
ExternalLogic
Signal&Driver
TPS2551
PowerPad
Input
0.1 Fm
R
100k
FAULT
W
C
0.1 F
RETRY
m
R
20k
ILIM
W
CLOAD
RLOAD
1kW
Output
TPS2551-Q1
www.ti.com
...................................................................................................................................................................................................... SLVS850 – JUNE 2008
Some applications require that an overcurrent condition disables the part momentarily during a fault conditionand re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor andcapacitor. During a fault condition, FAULT pulls low disabling the part. The part is disabled when EN is pulledlow, and FAULT goes high impedance allowing C
RETRY
to begin charging. The part re-enables when the voltageon EN reaches the turnon threshold, and the auto-retry time is determined by the resistor/capacitor timeconstant. The part will continue to cycle in this manner until the fault condition is removed.
Figure 22. Auto-Retry Functionality
Some applications require auto-retry functionality and the ability to enable/disable with an external logic signal.The figure below shows how an external logic signal can drive EN through R
FAULT
and maintain auto-retryfunctionality. The resistor/capacitor time constant determines the auto-retry time-out period.
Figure 23. Auto-Retry Functionality With External EN Signal
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): TPS2551-Q1
Latch-Off Functionality
OUT
IN
GND
FAULT
ILIM
EN
Input TPS2551
PowerPad
Output
10kW
STAT
ExternalLogic
EnableSignal
SN74HC00D
0.1 Fm
0.1 Fm
R
10k
FAULT
W
15kW
CLOAD
RLOAD
Two-Level Current-Limit Circuit
OUT
IN
GND
FAULT ILIM
EN
ControlSignal
Input
TPS2551
FAULT Signal
GND
Output
CurrentLimit
ControlSignal
0.1 Fm
R
100k
FAULT
W
R1
80.6kW
R2
20kW
CLOAD
RLOAD
Q1
2N7002
TPS2551-Q1
SLVS850 – JUNE 2008 ......................................................................................................................................................................................................
www.ti.com
The circuit in Figure 24 uses an SN74HC00 quad-NAND gate to implement overcurrent latch-off. The SN74HC00high-speed CMOS logic gate is selected because it operates over the 2.5-V to 6.5-V range of the TPS2551.
This circuit is designed to work with the active-high TPS2551. ENABLE must be logic low during start-up until V
INis stable to ensure that the switch initializes in the OFF state. A logic high on ENABLE turns on the switch afterV
IN
is stable. FAULT momentarily pulls low during an overcurrent condition, which latches STAT logic low anddisables the switch. The host can monitor STAT for an overcurrent condition. Toggling ENABLE resets STAT andre-enables the switch.
Figure 24. Overcurrent Latch-Off Using a Quad-NAND Gate
Some applications require different current-limit thresholds depending on external system conditions. Figure 25shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold isset by the total resistance from ILIM to GND (see previously discussed "Programming the Current-LimitThreshold" section). A logic-level input enables/disables MOSFET Q1 and changes the current-limit threshold bymodifying the total resistance from ILIM to GND. Additional MOSFETs/resistor combinations can be used inparallel to Q1/R2 to increase the number of additional current-limit levels.
NOTE:
ILIM should never be driven directly with an external signal.
Figure 25. Two-Level Current-Limit Circuit
22 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2551-Q1
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS2551QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS2551-Q1 :
•Catalog: TPS2551
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
PACKAGE OPTION ADDENDUM
www.ti.com 8-Apr-2009
Addendum-Page 1
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