AEC Q100 Grade 1 Compliant
This product conforms to specifications per the terms of the Ramtron Ramtron International Corporation
standard warranty. The product has completed Ramtron’s internal 1850 Ramtron Drive, Colorado Springs, CO 80921
qualification testing and has reached production status. (800) 545-FRAM, (719) 481-7000
http://www.ramtron.com
Rev. 3.0
Apr. 2009 Page 1 of 8
FM1106
Nonvolatile 3V Dual State Saver
Features
Nonvolatile State Saver
• Logic States Retained in Absence of Power
• Outputs Automatically Restored at Power-up
• Unlimited Number of State Changes
• Max t
PD
50ns at 2.7V
• Max Frequency 900 kHz
Low Power Operation
• Supply voltage of 2.7V to 3.6V
• 5 µA Standby Current (+85°C)
Industry St andard Configuration
• Automotive Temperature -40° C to +125° C
o Qualified to AEC Q100 Specification
• 8-pin “Green”/RoHS SOIC Package
Overview
The FM1106 is an innovative FRAM-based device
that stores inputs like conventional logic and retains
the stored state in the absence of power. This product
solves three basic problems in an elegant fashion.
First, it provides continuous access to nonvolatile
system settings without performing a memory read
operation or using dedicated processor I/O pins.
Second, it allows the storage of signals that may
change frequently and possibly without notice. Third,
it allows the nonvolatile storage of a system setting
without the system overhead and extra pins of a serial
memory.
Functionally, the inputs are stored and passed to the
output on the rising edge of the clock CLK. This
unique product serves a variety of applications. Here
are a few applications:
! Control relays or valves with automatic setting
on power-up without processor intervention
! Interface to soft/momentary front-panel switch
and indicator lamp. Capture switch settings and
drive LEDs without processor intervention
! Replaces jumpers & control signal routing
! Initialize state of I/O card signals
! Eliminate the overhead of serial memory for
systems needing only a bit of data
Pin Configuration
V
DD
Q
0
D
1
CLK
EN
D
0
V
SS
Q
1
1
2
3
4
8
7
6
5
Pin Names Function
D
N
Data In
Q
N
Data Out
EN Enable
CLK Clock
VDD Supply Voltage
VSS Ground
Ordering Information
FM1106-GA Dual State Saver,
8-pin “Green”/RoHS SOIC,
Automotive Grade 1
FM1106-GATR Dual State Saver,
8-pin “Green”/RoHS SOIC,
Automotive Grade 1, Tape&Reel
FM1106 - Automotive Temp.
Rev. 3.0
Apr. 2009 Page 2 of 8
Block Diagram and Truth Table
INPUTS OUTPUT
Qn
EN CLK Dn
H ↑L L
H ↑ H H
H H or L X Q
0
L X X Hi-Z
L Low voltage level
H High voltage level
X Don’t Care
↑ CLK rising edge
Q
0
Previous output state before CLK ↑
Pin Descriptions
Pin Name I/O Description
D
0
, D
1
Input Data inputs
Q
0
, Q
1
Output Data outputs
CLK Input Clock: On a rising edge of CLK, the D
N
inputs are transferred to the Q
N
outputs. While
CLK is high or low, the Q
N
outputs do not change regardless of the state of the data
inputs. See truth table.
EN Input Enable. This active-high input enables the device. When low, inputs are ignored and
updates to the nonvolatile cells are prevented. When high, the device operates
normally.
VDD Supply Power Supply (2.7V to 3.6V)
VSS Supply Ground
NV
State
Saver
CLK
D
N
Q
N
EN
FM1106 - Automotive Temp.
Rev. 3.0
Apr. 2009 Page 3 of 8
Description
Nonvolatile storage applied to logic is a
revolutionary concept. The FM1106 simplifies the
design of system control functions. This product is
unique because it remembers the stored output
values in the absence of power. Any change in the
latched state is automatically written to a nonvolatile
ferroelectric latch. This function is possible due to
the fast write time and extremely high write
endurance of the underlying ferroelectric memory
technology.
Use of Enable Pin
The FM1106 has an enable pin that is intended to be
used in conjunction with a system reset. An active-
low reset may be tied directly to the EN pin. At
power-up, /RESET will be held low for some time
during which the data input and CLK pins will be
ignored. Once the system comes out of reset and EN
goes high, the outputs Q
N
drive to the state that were
previously latched and the device operates normally.
When the EN pin is low, the outputs Q
N
are tri-
stated.
The enable pin may be tied to V
DD
since the device
integrates a power management circuit that monitors
the V
DD
level during power cycles.
FM1106 - Automotive Temp.
Rev. 3.0
Apr. 2009 Page 4 of 8
Electrical Specif ications
Ab solute Max imum R atin gs
Symbol Description Ratings
V
DD
Power Supply Voltage with respect to V
SS
-1.0V to +5.0V
V
IN
Voltage on any signal pin with respect to V
SS
-1.0V to +5.0V
and V
IN
< V
DD
+1.0V
T
STG
Storage temperature -55°C to + 125°C
T
LEAD
Lead temperature (Soldering, 10 seconds) 300° C
V
ESD
Electrostatic Discharge Voltage
- Human Body Model (JEDEC Std JESD22-A114-B)
- Charged Device Model (JEDEC Std JESD22-C101-A)
- Machine Model (JEDEC Std JESD22-A115-A)
4kV
1kV
200V
Package Moisture Sensitivity Level MSL-1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating
only, and the functional operation of the device at these or any other conditions above those listed in the operational section of this
specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability.
DC Operating Conditions (
T
A
= -40° C to +125° C, V
DD
= 2.7V to 3.6V unless otherwise specified)
Symbol Parameter Min Typ Max Units Notes
V
DD
Power Supply Voltage 2.7 - 3.6 V
I
SB
Standby Current
@
+85°C
@
+125°C
-
-
5
8
µ
A
µ
A
1
C
PD
Power Dissipation Capacitance - 165 pF 2
I
LI
Input Leakage Current ±1
µ
A 3
I
LO
Output Leakage Current ±1
µ
A 3
V
IL
Input Low Voltage -0.3 0.3 V
DD
V
V
IH
Input High Voltage 0.7 V
DD
V
DD
+ 0.3 V
V
OH
Output High Voltage
@
I
OH
= -1 mA
V
DD
– 0.5
-
V
V
OL
Output Low Voltage
@
I
OL
= 1 mA (V
DD
=2.7V)
@
I
OL
= 10 mA (V
DD
=2.7V)
-
-
0.4
0.8
V
V
V
HYS
Input Hysteresis (CLK, EN) 200 mV 4
Notes
1.
CLK = V
SS
, all other inputs at V
DD
or V
SS
.
2.
To calculate device power dissipation, P
D
= C
PD
*V
DD
2
*f
i
+ C
L
*V
DD
2
*f
o
, where f
i
is the input clk freq, f
o
is the output freq,
and C
L
is the output load capacitance. Active current I
DD
may be calculated as I
DD
= C
PD
*V
DD
*f
i
, assuming outputs are
floating.
3.
V
IN
or V
OUT
= V
SS
to V
DD
.
4.
This parameter is characterized but not tested.
Capacitance (T
A
= 25° C , f=1.0 MHz, V
DD
= 3.3V)
Symbol Parameter Min Max Units Notes
C
I
Input Capacitance - 8 pF 1
Notes
1. This parameter is characterized but not tested.
FM1106 - Automotive Temp.
Rev. 3.0
Apr. 2009 Page 5 of 8
AC Parameters
(T
A
= -40° C to +125° C, V
DD
= 2.7V to 3.6V, C
L
= 30 pF unless otherwise specified)
Symbol Parameter Min Max Units Notes
f
MAX
Maximum Clock Frequency - 900 kHz
t
LOW
CLK Low Period 0.3 -
µ
s
t
HIGH
CLK High Period 0.3 -
µ
s
t
PD
Propagation delay CLK to Q
N
- 50 ns
t
HZ
EN Low to Q
N
Hi-Z - 25 ns 1
t
R
Input Rise Time - 100 ns 1
t
F
Input Fall Time - 100 ns 1
t
DS
Data (D
N
) Setup Time to CLK
↑
5 - ns
t
DH
Data (D
N
) Hold Time after CLK
↑
10 - ns
t
EHD
EN Hold Time (EN High after CLK
↑
) 50 - ns
t
EH
EN High Time 5 -
µ
s
t
EL
EN Low Time 2 -
µ
s
Notes
1.
This parameter is characterized but not tested.
Power Cycling a nd Data Retention
(T
A
= -40° C to +125° C, V
DD
= 2.7V to 3.6V, unless otherwise specified)
Symbol Parameter Min Max Units Notes
Nonvolatile Data Retention Time 45 - years
t
VDR
V
DD
Rise Time 25 -
µ
s/V 1
t
VDF
V
DD
Fall Time 50 -
µ
s/V 1
t
RES
EN High to Q
N
Restore Time - 0.5
µ
s 2
t
PDS
EN Low to Power Down Time 1 -
µ
s
t
EHFC
EN High to First Clock (CLK
↑
) after Power Up 4 -
µ
s 3
Notes
1. Slope measured at any point on V
DD
waveform.
2. After power up, when EN goes high the nonvolatile latches are read and the values restored to the outputs Q
N
.
3. After power up, this is the minimum time required before a state change operation may occur. EN and V
DD
may be
coincident at power up, and in this case t
EHFC
time is referenced to V
DD
(min) and CLK
↑
.
Data Retention (V
DD
= 3.0V to 3.6V)
Parameter Min Max Units Notes
Data Retention
@
T
A
= 85°C
@
T
A
= 125°C
45
9000
-
-
Years
Hours
Note : The device is guaranteed to retain data after both conditions have been applied : (1) 45 yrs at a temperature
of 85°C and (2) 9000 hrs at 125°C.
Typical Grade 1 Operating Profile
0
200
400
600
800
1000
1200
1400
1600
70 75 80 85 90 95 100 105 110 115 120 125
Temperature (°C)
Hours
Typical Grade 1 Storag e Profile
0
5000
10000
15000
20000
25000
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80
Temperature (°C)
Hours
FM1106 - Automotive Temp.
Rev. 3.0
Apr. 2009 Page 6 of 8
AC Test Conditions
Input Pulse Levels 0.1 V
DD
to 0.9 V
DD
Input Rise and Fall Times 10 ns
Input and Output Timing Levels 0.5 V
DD
Output Load Capacitance 30pF
FM1106 Signal Timing
CLK
D
N
Q
N
previous
D0
Q0
t
PD
t
DS
t
DH
t
HIGH
1/f
MAX
D1
t
LOW
t=0
EN
t
EHD
Q1
t
PD
t
HZ
t
EL
t
EH
Q1
t
RES
Power Cycle Timing
~
~~
~~
~
D7 D8 DLAST
Q7 Q8 QLAST QLAST
D0 D1
Q0 Q1
CLK
D
N
Q
N
~
~
V
DD
V
DD (MIN)
V
DD (M I N)
t
PDS
t
EHFC
t
RES
~
~
EN
FM1106 - Automotive Temp.
Rev. 3.0
Apr. 2009 Page 7 of 8
Mechanical Drawing
8-pin SOIC (JEDEC Sta ndard MS-012 variation AA)
Pin 1
3.90
±
0.10 6.00
±
0.20
4.90
±
0.10
0.10
0.25
1.35
1.75
0.33
0.51
1.27 0 .10 mm
0.25
0.50 45
°
0.40
1.27
0.19
0.25
0°- 8°
Recommended PCB Footprint
7.70
0.65
1.27
2.00
3.70
Refer to JEDEC MS-012 for complete dimensions and notes.
All dimensions in milli meters.
SOIC Package Marking Scheme
Legend:
XXXX= part number, P= package type, T= temp (A=automotive grade, blank=ind.)
LLLLLLL= lot code
RIC=Ramtron Int’l Corp, YY=year, WW=work week
Example: FM1106, “Green” SOIC package, Automotive, Year 2008, Work Week 19
FM1106-GA
A80007G
RIC0819
XXXXXXX-PT
LLLLLLL
RICYYWW
FM1106 - Automotive Temp.
Rev. 3.0
Apr. 2009 Page 8 of 8
Revision History
Revision
Date
Summary
1.0 11/26/2008 Created automotive temperature spec.
1.1 2/3/2009 Added tape and reel ordering information.
3.0 4/15/2009 Changed to Production status. Changed 125C retention time.
