FDS5670
FDS5670 Rev. B
FDS5670
60V N-Channel PowerTrenchTM MOSFET
August 1999
1999 Fairchild Semiconductor Corporation
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source V ol tage 60 V
VGSS Gate-S ource Voltage ±20 V
IDDrain Current - Continuous (Note 1a) 10 A
- Pulsed 50
PDPower Dissipation for Single Operat i on (Note 1a) 2.5 W
(Note 1b) 1.2
(Note 1c) 1
TJ, Tstg Operating and Storage Junction T emperature Range -55 to +150 °C
Thermal Characteristics
RθJA Thermal Re sistance, Junction-to-Ambient (Note 1a) 50 °C/W
RθJC Thermal Re sistance, Junction-to-Case (Note 1) 25 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape Width Quantity
FDS5670 FDS5670 13’’ 12mm 2500 units
General Description
This N-Channel MOSFET has been designed specifically
to improve the overall efficiency of DC/DC converters using
either synchronous or conventional switching PWM
controllers.
These MOSFETs feature faster switching and lower gate
charge than other MOSFETs with comparable RDS(ON)
specifications.
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power supply
designs with higher overall efficiency.
Features
10 A, 60 V. RDS(ON) = 0.014 @ VGS = 10 V
RDS(ON) = 0.017 @ VGS = 6 V.
Low gate charge.
Fast switching speed.
High performance trench technology for extremely
low RDS(ON).
High power and current handling capability.
6
7
8
5
3
2
1
4
S
D
S
S
SO-8
D
D
D
G
FDS5670
FDS5670 Rev. B
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain-Sourc e Breakdown Voltage VGS = 0 V, ID = 250 µA60 V
BVDSS
TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C58 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 48 V, V GS = 0 V 1 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 nA
IGSSR Gate-Body Leak age Current, Reverse VGS = -20 V, V DS = 0 V -100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA22.44 V
VGS(th)
TJ
Gate Threshold V oltage
Temperature Coefficient ID = 250 µA, Referenced to 25°C6.8 mV/°C
RDS(on) Static Drain-S ource
On-Resistance VGS = 10 V, I D = 10 A
VGS = 10 V, ID = 10 A, TJ=125°C
VGS = 6 V, ID = 9 A
0.012
0.019
0.014
0.014
0.027
0.017
ID(on) On-State Drain Current VGS = 10 V, V DS = 5 V 25 A
gFS Forward Transconductance VDS = 5 V, I D = 10 A 39 S
Dynamic Characteristics
Ciss Input Capacitance 2900 pF
Coss Output Capacit ance 685 pF
Crss Reverse Transf er Capacitance
VDS = 15 V, VGS = 0 V
f = 1.0 MHz
180 pF
Switching Characteristics (Note 2)
td(on) Turn-On Delay Time 16 29 ns
trTurn-On Rise Time 10 20 ns
td(off) Turn-Off Del ay Ti m e 50 80 ns
tfTurn-Off Fall Time
VDD = 30 V, ID = 1 A
VGS = 10 V, RGEN = 6
23 42 ns
QgTotal Gate Charge 49 70 nC
Qgs Gate-Source Charge 9 nC
Qgd Gate-Drain Charge
VDS = 20 V, I D = 10 A
VGS = 10 V,
10.4 nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Cont i nuous Drain-Source Diode Forward Current 2.1 A
VSD Drain-Source Di ode Forward Voltage VGS = 0 V, I S = 2.1 A (Note 2) 0.72 1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width 300 µs, Duty Cycle 2.0%
a) 50° C/W when
mounted on a 0.5 in2
pad of 2 oz. copper.
b) 105° C/W when
mounted on a 0.02 in2
pad of 2 oz. copper.
c) 125° C/W when mounted
on a minimum pad.
FDS5670
FDS5670 Rev. B
Typical Characteristics
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation
with Gate-to-Source Voltage.
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
-50 -25 0 25 50 75 100 125 150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 10A
V
GS
= 10V
0
10
20
30
40
50
60
12345
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
T
A
= -55
o
C25
o
C
125
o
C
V
DS
=5V
0
0.01
0.02
0.03
0.04
0.05
345678910
V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
= 10A
T
A
= 125
o
C
T
A
= 25
o
C
0
10
20
30
40
50
60
01234
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN-SOURCE CURRENT (A)
V
GS
= 10V 6V
5V4.5V
3.5V
4V
0.0001
0.001
0.01
0.1
1
10
100
0 0.2 0.4 0.6 0.8 1 1.2
V
SD
, BODY DIODE VOLTAGE (V)
I
S
, REVERSE DRAIN CUR RE NT (A)
T
J
=125
o
C
25
o
C
-55
o
C
V
GS
=0
0.8
1
1.2
1.4
1.6
1.8
2
0 102030405060
I
D
, DRAIN CURRENT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 4.0V
10V
5.0V
7.0V
4.5V
6.0V
FDS5670
FDS5670 Rev. B
Typical Characteristics (continued)
0.001 0.01 0.1 1 10 100 300
0
10
20
30
40
50
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
R =125°C/W
T = 25°C
θJA
A
Figure 7. Gate-Charge Characteristics. Figure 8. Capacitance Characteristics.
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient themal response will change depending on the circuit board design.
0.0001 0.001 0.01 0.1 1 10 100 300
0.001
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TI ME (s e c)
T R ANSI ENT TH ER MAL RESI ST ANC E
r(t), NORMALIZED EF F ECT I V E
1
S i n g l e P u l s e
D = 0.5
0. 1
0.05
0.02
0. 0 1
0.2
D u t y C y c l e, D = t /t
12
R (t) = r(t) * R
R = 125°C/ W
θJA
θJA
θJA
T - T = P * R (t)
θ
JA
A
J
P(pk)
t
1
t
2
0.01
0.1
1
10
100
0.1 1 10 100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
DC10s
1s
100ms
10ms
1ms
100µs
R
DS(ON)
LIMIT
V
GS
= 10V
SINGLE PULSE
R
θJA
= 125
o
C/W
T
A
= 25
o
C
0
2
4
6
8
10
0 1020304050
Q
g
, GATE CHARGE (nC)
V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= 10A V
DS
= 10V
20V
30V
0
1000
2000
3000
4000
5000
0 102030
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
C
ISS
C
RSS
C
OSS
f = 1MHz
V
GS
= 0 V
SOIC(8ld s) Packaging
Configuration: Figure 1.0
Components Leader Tape
1680mm minimum or
210 empty poc kets
Tr aile r Tape
640mm min imum or
80 empty poc kets
SOIC(8lds ) Tape Leader and Trailer
Configuration: Figure 2.0
Cover Tape
Carrier Tape
Note/Comments
Packaging Option
SOIC (8lds) Packaging Information
Standard
(no flow c ode) L86Z F011
Packaging type
Reel Size
TNR
13" Dia
Rail/Tube
-
TNR
13" Dia
Qty per Reel/Tube/Bag 2,500 95 4,000
Box Dimension (mm) 343x64x343 530x130x83 343x64x343
Max qty per Box 5,000 30,000 8,000
D84Z
TNR
7" Dia
500
184x187x47
1,000
Weight per unit (gm) 0.0774 0.0774 0.0774 0.0774
Weight per Reel (kg) 0.6060 - 0.9696 0.1182
F63TN Label
ESD Label
343mm x 342mm x 64mm
St a nd ard I n te r m ed ia te bo x
ESD Label
F63TNR Label sample F63TNLabel
LOT: CBVK741B019
FSID: FDS995 3 A
D/C1: D9842 QTY1: SPEC REV:
SPEC:
QTY: 2500
D/C2: QTY2: CPN: N/F: F (F63TNR)3
F
852
NDS
9959
SOIC-8 Unit Orientation
F
852
NDS
9959
Pi n 1
Static D issipative
Embossed Carrier Tape
F63TNR
Label
Antistatic Cover Tape
ESD Label
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC
ELECTROMAGNETIC, MAGNETIC OR R ADIOACTIVE FIELDS
TN R DA T E
PT NUM B ER
PEEL STRENGTH MIN _________ __ ___gms
MAX _____________ gms
Customized
Label
Packaging Description:
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,5 00 uni t s pe r 13" or 33 0c m d ia met er re el . The re el s are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
co me s in di ffe re nt s iz es depe nd ing on th e nu mbe r of pa rts
shipped.
F
852
NDS
9959
F
852
NDS
9959
F
852
NDS
9959
SO-8 Tape and Reel Data and Package Dimensions
July 1999, Rev. B
1998 Fairchild Semiconductor Corporation
Dimensions are in millimeter
Pkg type
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
SOIC(8lds)
(12mm)
6.50
+/-0.10 5.30
+/-0.10 12.0
+/-0.3 1.55
+/-0.05 1.60
+/-0.10 1.75
+/-0.10 10.25
min 5.50
+/-0.05 8.0
+/-0.1 4.0
+/-0.1 2.1
+/-0.10
0.450
+/-
0.150
9.2
+/-0.3 0.06
+/-0.02
P1
A0 D1
P0
F
W
E1
D0
E2
B0
Tc
Wc
K0
T
Dimensions are in inches and millimeters
Tape Size Reel
Option Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
12m m 7" Dia 7.00
177.8 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 2.165
55 0.488 +0.078/-0.000
12.4 +2/0 0.724
18.4 0.469 – 0.606
11.9 – 15.4
12m m 13" Dia 13.00
330 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 7.00
178 0.488 +0.078/-0.000
12.4 +2/0 0.724
18.4 0.469 – 0.606
11.9 – 15.4
See detail AA
Dim A
max
13" Diameter Option
7" Diameter Option
Dim A
Max
See detail AA
W3
W2 max Measured at Hub
W1 Measured at Hub
Dim N
Dim D
min
Dim C
B Min
DETAIL AA
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum component rotation
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
Typical
component
cavity
center line
20 deg m aximum
Typical
component
center line
B0
A0
Sketch B (Top View)
Component Rotation
Sketch A (Side or Front Sectional View)
Component Rotation
User Direction of Feed
SOIC(8lds ) Embossed Carrier Tape
Configuration: Figure 3.0
SOIC(8ld s) Reel Confi gu ratio n: Figure 4.0
SO-8 Tape and Reel Data and Package Dimensions, continued
July 1999, Rev. B
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [m illimeters]
Part Weight per unit (gram): 0.0774
SO-8 Tape and Reel Data and Package Dimensions, continued
September 1998, Rev. A
9
TRADEMARKS
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT ST A TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS P ATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
UHC™
VCX™
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General description
This N-Channel MOSFET has been
designed specifically to improve the overall
efficiency of DC/DC converters using either
synchronous or conventional switching
PWM controllers.
These MOSFETs feature faster switching
and lower gate charge than other MOSFETs
with comparable RDS(ON) specifications.
The result is a MOSFET that is easy and
safer to drive (even at very high
frequencies), and DC/DC power supply
designs with higher overall efficiency.
back to top
Features
10 A, 60 V. RDS(ON) = 0.014 @ VGS
= 10 V, RDS(ON) = 0.017 @ VGS = 6
V.
Low gate charge.
Fast switching speed.
High performance trench technology
for extremely low RDS(ON).
High power and current handling
capability.
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Product status/pricing/packaging
Product Product
status Lead
free Pricing* Package
type Leads Packing
method
Package
Marking
Convention**
FDS5670 Full
Production $1.18 SO-8 8 TAPE
REEL
Line 1: $Y
(Fairchild logo)&Z
(Asm. Plant
Code)&2 (Date
Code)&T (Die
Trace Code) Line
2: FDS Line 3:
5670
FDS5670_NL Full
Production N/A SO-8 8 TAPE
REEL
Line 1: $Y
(Fairchild logo)&Z
(Asm. Plant
Code)&2 (Date
Code)&T (Die
Trace Code) Line
2: FDS Line 3:
5670
* Fairchild 1,000 piece Budgetary Pricing
** A sample button will appear if the part is available through Fairchild's on-line samples program. If
there is no sample button, please contact a Fairchild distributor to obtain samples
Indicates lead free product. For more information click here.
Package marking information for product FDS5670 is available. Click here for more information .
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Models
Package & leads Condition Temperature range Software version Revision date
PSPICE
SO-8-8 Electrical 25°C to 125°C Orcad 9.1 May 14, 2002
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Qualification Support
Click on a product for detailed qualification data
Product
FDS5670
FDS5670_NL
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