FEATURES Compensates cables up to 300 meters for wideband video 60 MHz equalized BW at 300 meters of UTP cable 120 MHz equalized BW at 150 meters of UTP cable Fast time domain performance 70 ns settling time to 1% at 300 meters of UTP cable 7 ns rise/fall times with 2 V step at 300 meters of UTP cable 3 frequency response gain adjustment pins High frequency peaking adjustment (VPEAK) Output low-pass filter cutoff adjustment (VFILTER) Broadband flat gain adjustment (VGAIN) Selectable for UTP or coaxial compensation DC output offset adjustment pin (VOFFSET) Low output offset voltage: 4 mV at G = 1 Compensates both RGB and YPbPr 2 on-chip comparators with hysteresis can be used for common-mode sync pulse extraction Available in 40-lead, 6 mm x 6 mm LFCSP APPLICATIONS FUNCTIONAL BLOCK DIAGRAM VPEAK VFILTER VOFFSET VGAIN COAX/UTP -INR OUTR +INR GAINR -ING OUTG +ING GAING -INB OUTB +INB GAINB -INCMP1 OUTCMP1 +INCMP1 -INCMP2 +INCMP2 OUTCMP2 AD8122 10780-001 Data Sheet Triple Differential Receiver with 300 Meter Adjustable Line Equalization AD8122 Figure 1. Keyboard-video-mouse (KVM) Digital signage RGB video over UTP cables Professional video projection and distribution HD video Security video GENERAL DESCRIPTION The AD8122 is a high speed, triple differential receiver and equalizer that compensates for the transmission losses of UTP cables up to 300 meters in length and coaxial cables up to 200 meters in length. Various gain stages are summed to best approximate the inverse frequency response of the cable. Each channel features a high impedance differential input with high rejection of common-mode (CM) signals that is ideal for interfacing directly with the cable. The AD8122 has two control inputs for optimal cable compensation, one LPF control input, an input to select UTP or coaxial cable, and an input to adjust the dc output offset. The cable compensation inputs are used to compensate for different cable lengths: the VPEAK input controls the amount of high frequency peaking, and the VGAIN input adjusts the broadband flat gain to compensate for the flat cable loss. The VFILTER input controls the cutoff frequency of output low-pass filters on each channel. The selection of UTP or coaxial cable compensation responses is determined by the binary COAX/UTP input, which can be left floating in UTP applications. The VOFFSET input allows the dc voltage at the output to be adjusted, which can be useful in dc-coupled systems. For added flexibility, the gain of each channel can be set to 1 or 2 using the associated gain control pin. The AD8122 is available in a 6 mm x 6 mm, 40-lead LFCSP and is rated to operate over the extended temperature range of -40C to +85C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2012 Analog Devices, Inc. All rights reserved. AD8122 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 On-Chip Comparators .............................................................. 12 Applications ....................................................................................... 1 Input Single-Ended Voltage Range Considerations .............. 12 Functional Block Diagram .............................................................. 1 Applications Information .............................................................. 13 General Description ......................................................................... 1 Basic Operation .......................................................................... 13 Revision History ............................................................................... 2 Input Overdrive Recovery and Protection .............................. 13 Specifications..................................................................................... 3 Comparator Applications .......................................................... 13 Absolute Maximum Ratings ............................................................ 5 Sync Pulse Extraction Using Comparators ............................. 14 Thermal Resistance ...................................................................... 5 Using the VPEAK, VGAIN, VFILTER, and VOFFSET Inputs ................. 15 Maximum Power Dissipation ..................................................... 5 Using the COAX/UTP Selector ................................................ 15 ESD Caution .................................................................................. 5 Driving High Impedance Capacitive Loads ........................... 15 Pin Configuration and Function Descriptions ............................. 6 Driving 75 Cable with the AD8122 ..................................... 15 Typical Performance Characteristics ............................................. 8 Layout and Power Supply Decoupling Considerations ......... 15 Theory of Operation ...................................................................... 12 Input Common-Mode Range ................................................... 15 Adjustable Control Voltages...................................................... 12 Power-Down ............................................................................... 16 Differential Inputs ...................................................................... 12 Outline Dimensions ....................................................................... 17 Outputs ........................................................................................ 12 Ordering Guide .......................................................................... 17 REVISION HISTORY 7/12--Revision 0: Initial Version Rev. 0 | Page 2 of 20 Data Sheet AD8122 SPECIFICATIONS TA = 25C, VS = 5 V, Category 5e UTP cable, input VCM = 0 V, VOFFSET = 0 V, VPEAK, VGAIN, and VFILTER are set to the recommended settings shown in Figure 24, unless otherwise noted. For G = 2, RL = 150 and VOUT = 2 V p-p; for G = 1, RL = 1 k and VOUT = 1 V p-p. Table 1. Parameter DYNAMIC AND NOISE PERFORMANCE -3 dB Large Signal Bandwidth Slew Rate 10% to 90% Rise/Fall Times Settling Time to 1% Integrated Output Voltage Noise INPUT PERFORMANCE Input Voltage Range Maximum Differential Voltage Swing Voltage Gain Error Channel-to-Channel Gain Matching Common-Mode Rejection (CMR) Input Resistance Input Capacitance Input Bias Current ADJUSTMENT PINS VPEAK Input Voltage Range VGAIN Input Voltage Range VOFFSET Input Current VGAIN Input Current VPEAK Input Current VFILTER Input Current VOFFSET to OUTx Gain OUTPUT CHARACTERISTICS Output Voltage Swing Output Offset Voltage Output Offset Voltage Drift Test Conditions/Comments Min Typ Max Unit AD8122 only, G = 1/G = 2 150 meters of cable, G = 1/G = 2 300 meters of cable, G = 1, G = 2 VOUT = 2 V p-p, AD8122 only, G = 1, G = 2 VOUT = 2 V step, 150 meters of cable, G = 2 VOUT = 2 V step, 300 meters of cable, G = 2 VOUT = 1 V step, 150 meters of cable, G = 1 VOUT = 1 V step, 300 meters of cable, G = 1 VOUT = 2 V step, 150 meters of cable, G = 2 VOUT = 2 V step, 300 meters of cable, G = 2 VOUT = 1 V step, 150 meters of cable, G = 1 VOUT = 1 V step, 300 meters of cable, G = 1 150 meters of cable, integrated to 160 MHz, G = 1/G = 2 300 meters of cable, integrated to 160 MHz, G = 1/G = 2 270/165 120/110 60 1000 6 7 6 7 70 70 85 70 3.7/6.2 MHz MHz MHz V/s ns ns ns ns ns ns ns ns mV rms 17/27 mV rms Common mode, -INx = +INx |(+INx) - (-INx)| VOUT/VIN, VGAIN set for 0 meters of cable, G = 1 VOUT/VIN, VGAIN set for 0 meters of cable, G = 2 G = 1, G = 2 VOUT/VIN, CM DC, VPEAK = VGAIN = 0 V, G = 1/G = 2 DC, 300 meters of cable, G = 1/G = 2 1 MHz, 300 meters of cable, G = 1/G = 2 50 MHz, 300 meters of cable, G = 1/G = 2 100 MHz, 300 meters of cable, G = 1/G = 2 Common mode Differential Common mode Differential 4.0 3 1.5 0.50 0.15 V V % % % -92/-87 -89/-85 -63/-57 5/10 10/14 4.4 3.7 1.0 0.5 1.1 dB dB dB dB dB M M pF pF A 0 to 2 0 to 2 1.1 -0.5 0.6 0.5 1 V V A A A A V/V -3.9 to +3.9 4/8 10/30 2.6/3.2 V mV mV V/C Relative to ground Relative to ground OUTx = OUTR, OUTG, OUTB, range limited by output swing, VGAIN = 0 V, G = 1 G = 1, G = 2 RTO, VPEAK = VGAIN = VFILTER = VOFFSET = 0 V, G = 1/G = 2 RTO, 300 meters of cable, G = 1/G = 2 RTO, G = 1/G = 2 Rev. 0 | Page 3 of 20 AD8122 Parameter COMPARATORS Output Voltage Level Low, VOL Output Voltage Level High, VOH Hysteresis, VHYST Propagation Delay Low to High, tPD, LH High to Low, tPD, HL Rise Time, tRISE Fall Time, tFALL Output Resistance, VOL Output Resistance, VOH DIGITAL CONTROLS COAX/UTP Pin Input Voltage Level Low, VIL Input Voltage Level High, VIH Input Current, Low Input Current, High PD Pin Input Voltage Level Low, VIL Input Voltage Level High, VIH Input Current, Low Input Current, High POWER SUPPLY Operating Voltage Range Positive Quiescent Supply Current Negative Quiescent Supply Current Supply Current Drift, ICC Supply Current Drift, IEE Positive Power Supply Rejection Negative Power Supply Rejection Positive Supply Current, Powered Down Negative Supply Current, Powered Down OPERATING TEMPERATURE RANGE Data Sheet Test Conditions/Comments Min Typ Max 0.3 3.3 70 V V mV 14 10 8 7 18 1 ns ns ns ns 1.5 V V A A 2.9 V V A A 5.5 120 66 210 -120 V mA mA A/C A/C -72/-66 -68/-62 5/8 dB dB dB -88/-80 -80/-74 18/14 3.4 0.4 dB dB dB mA mA C 3.5 0.7 24 3.2 1 1 4.5 VOUT/VSUPPLY DC, RTO, 0 meters of cable, G = 1/G = 2 DC, RTO, 300 meters of cable, G = 1/G = 2 100 MHz, RTO, 300 meters of cable, G = 1/G = 2 VOUT/VSUPPLY DC, RTO, 0 meters of cable, G = 1/G = 2 DC, RTO, 300 meters of cable, G = 1/G = 2 100 MHz, RTO, 300 meters of cable, G = 1/G = 2 VPEAK = VGAIN = VFILTER = 0 V VPEAK = VGAIN = VFILTER = 0 V -40 Rev. 0 | Page 4 of 20 Unit +85 Data Sheet AD8122 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Power Dissipation Input Voltage (Any Input) Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature Rating 11 V See Figure 2 VS- - 0.3 V to VS+ + 0.3 V -65C to +125C -40C to +85C 300C 150C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Airflow reduces JA. In addition, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes reduces JA. The exposed pad on the underside of the package must be soldered to a pad on the PCB surface that is thermally connected to a solid plane (usually the ground plane) to achieve the specified JA. Figure 2 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 40-lead LFCSP (JA = 39C/W) on a JEDEC standard 4-layer board with the exposed pad soldered to a pad that is thermally connected to a PCB plane. JA values are approximations. 6 MAXIMUM POWER DISSIPATION (W) Table 2. THERMAL RESISTANCE JA is specified for the worst-case conditions, that is, the device soldered in a circuit board in still air. This value was measured using a JEDEC standard 4-layer printed circuit board (PCB). 5 4 3 2 1 Package Type 40-Lead LFCSP JA 39 JC 1.3 Unit C/W 0 -40 -20 0 20 40 AMBIENT TEMPERATURE (C) 60 80 10780-003 Table 3. Thermal Resistance Figure 2. Maximum Power Dissipation vs. Ambient Temperature for a 4-Layer Board MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the AD8122 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8122. Exceeding a junction temperature of 175C for an extended period can result in changes in the silicon devices, potentially causing failure. ESD CAUTION The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS+ and VS-) times the quiescent current (IS). The power dissipation due to each load current is calculated by multiplying the load current by the voltage difference between the associated power supply and the output voltage. The total power dissipation due to load currents is then obtained by taking the sum of the individual power dissipations. RMS output voltages must be used when dealing with ac signals. Rev. 0 | Page 5 of 20 AD8122 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AD8122 40 39 38 37 36 35 34 33 32 31 NC AGND -INB +INB AGND -ING +ING AGND -INR +INR TOP VIEW (Not to Scale) 30 29 28 27 26 25 24 23 22 21 1 2 COAX/UTP DVS+ PD VFILTER VPEAK VGAIN DGND VOFFSET DVS- VS+ NOTES 1. TO ACHIEVE THE SPECIFIED THERMAL RESISTANCE, THE EXPOSED PAD ON THE UNDERSIDE OF THE PACKAGE MUST BE SOLDERED TO A PAD ON THE PCB SURFACE THAT IS THERMALLY CONNECTED TO A SOLID PLANE WITH A VOLTAGE BETWEEN VS+ AND VS-. 2. NC = NO INTERNAL CONNECTION. 10780-021 GAINB OUTB VS+ VS- GAING OUTG VS+ VS- GAINR OUTR 11 12 13 14 15 16 17 18 19 20 NC 1 +INCMP1 2 -INCMP1 3 OUTCMP1 4 VS+_CMP 5 VS-_CMP 6 OUTCMP2 7 -INCMP2 8 +INCMP2 9 VS- 10 Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1, 40 2 3 4 5 6 7 8 9 10, 14, 18 11 12 13, 17, 21 15 16 19 20 22 23 24 25 26 27 28 29 30 Mnemonic NC +INCMP1 -INCMP1 OUTCMP1 VS+_CMP VS-_CMP OUTCMP2 -INCMP2 +INCMP2 VS- GAINB OUTB VS+ GAING OUTG GAINR OUTR DVS- VOFFSET DGND VGAIN VPEAK VFILTER PD DVS+ COAX/UTP Description No Internal Connection. Positive Input, Comparator 1. Negative Input, Comparator 1. Output, Comparator 1. Positive Power Supply, Comparator. Connect to +5 V. Negative Power Supply, Comparator. Connect to -5 V. Output, Comparator 2. Negative Input, Comparator 2. Positive Input, Comparator 2. Negative Power Supply, Equalizer Sections. Connect to -5 V. Blue Channel Gain. Connect to OUTB for G = 1; connect to AGND for G = 2. Output, Blue Channel. Positive Power Supply, Equalizer Sections. Connect to +5 V. Green Channel Gain. Connect to OUTG for G = 1; connect to AGND for G = 2. Output, Green Channel. Red Channel Gain. Connect to OUTR for G = 1; connect to AGND for G = 2. Output, Red Channel. Negative Power Supply, Digital Control. Connect to -5 V. Output Offset Control Voltage. Digital Ground Reference. Broadband Flat Gain Control Voltage. Equalizer High Frequency Boost Control Voltage. Low-Pass Filter Cutoff Frequency Adjustment Control Voltage. Power-Down. Positive Power Supply, Digital Control. Connect to +5 V. Cable Compensation Control Input. Connect this pin to Logic 1 for coaxial cable; connect this pin to Logic 0 for UTP cable. This input can be left floating in UTP applications. Rev. 0 | Page 6 of 20 Data Sheet Pin No. 31 32 33, 36, 39 34 35 37 38 Mnemonic +INR -INR AGND +ING -ING +INB -INB EP AD8122 Description Positive Input, Red Channel. Negative Input, Red Channel. Analog Ground Reference. Positive Input, Green Channel. Negative Input, Green Channel. Positive Input, Blue Channel. Negative Input, Blue Channel. Exposed Pad. To achieve the specified thermal resistance, the exposed pad on the underside of the package must be soldered to a pad on the PCB surface that is thermally connected to a solid plane with voltage between VS+ and VS-. Rev. 0 | Page 7 of 20 AD8122 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 6 12 3 9 0 6 -3 3 GAIN (dB) -6 100m 150m 200m 250m 300m -9 -12 -3 -6 -15 10 100 FREQUENCY (MHz) -12 0.1 10780-004 1 3 9 0 6 GAIN (dB) -3 100m 150m 200m 3 -3 -12 -6 -15 -9 100 FREQUENCY (MHz) Figure 5. Equalized Frequency Response for Various Coaxial Cable Lengths, G=1 100m 150m 200m 0 -9 -12 0.1 10780-005 1 10 100 FREQUENCY (MHz) Figure 8. Equalized Frequency Response for Various Coaxial Cable Lengths, G=2 12 3 VGAIN = 1.37V VPEAK = 1.86V VGAIN = 1.37V VPEAK = 1.86V 9 0 GAIN (dB) GAIN (dB) 6 -3 VFILTER = 2V -6 3 VFILTER = 2V VFILTER = 1.7V VFILTER = 1.7V 0 VFILTER = 0V VFILTER = 0V -9 1 10 FREQUENCY (MHz) 100 -6 0.1 10780-006 -12 0.1 -3 1 10 FREQUENCY (MHz) Figure 6. Equalized Frequency Response for Various VFILTER Levels, 300 m Cable Length, G = 1 100 10780-009 GAIN (dB) 12 10 100 Figure 7. Equalized Frequency Response for Various UTP Cable Lengths, G = 2 6 1 10 FREQUENCY (MHz) Figure 4. Equalized Frequency Response for Various UTP Cable Lengths, G = 1 -6 1 10780-007 -9 -18 0.1 -18 0.1 100m 150m 200m 250m 300m 0 10780-008 GAIN (dB) TA = 25C, VS = 5 V, Category 5e UTP cable, input VCM = 0 V, VOFFSET = 0 V, VPEAK, VGAIN, and VFILTER are set to the recommended settings shown in Figure 24, unless otherwise noted. For G = 2, RL = 150 and VOUT = 2 V p-p; for G = 1, RL = 1 k and VOUT = 1 V p-p. Figure 9. Equalized Frequency Response for Various VFILTER Levels, 300 m Cable Length, G = 2 Rev. 0 | Page 8 of 20 Data Sheet AD8122 10000 140 OUTPUT VOLTAGE NOISE (nV/Hz) 130 -3dB BANDWIDTH (MHz) 120 110 G=1 100 G=2 90 80 70 60 300m, G = 2 1000 300m, G = 1 100 150m, G = 1 150m, G = 2 180 200 220 240 260 280 300 CABLE LENGTH (m) 10 0.1 6 25 5 INTEGRATED OUTPUT NOISE FOR 150m SETTINGS (mV rms) 30 20 15 G=1 10 70 60 150m, G = 2 50 150m, G = 1 4 40 300m, G = 2 3 300m, G = 1 30 2 20 1 5 0 50 100 150 200 250 300 CABLE LENGTH (m) 10 0 10780-011 INTEGRATED OUTPUT NOISE (mV rms) 100 Figure 13. Voltage Noise Density vs. Frequency for 300 m and 150 m Cable Lengths, RTO 0 0 0.2 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 2.0 Figure 14. Integrated Output Noise (1 MHz to 160 MHz) vs. VFILTER for 300 m and 150 m Cable Lengths 20 20 0 0 -20 CROSSTALK (dB) -20 300m -40 150m -60 300m -40 150m -60 -80 -80 -100 -100 1 10 FREQUENCY (MHz) 100 -120 0.1 10780-012 -120 0.1 0.4 VFILTER (V) Figure 11. Integrated Output Noise (1 MHz to 160 MHz) vs. Cable Length CROSSTALK (dB) 10 FREQUENCY (MHz) Figure 10. Equalized -3 dB Bandwidth vs. Cable Length G=2 1 INTEGRATED OUTPUT NOISE FOR 300m SETTINGS (mV rms) 160 10780-014 140 1 10 FREQUENCY (MHz) Figure 12. Crosstalk vs. Frequency for 300 m and 150 m Cable Lengths, G = 1 100 10780-015 120 10780-010 40 100 10780-013 50 Figure 15. Crosstalk vs. Frequency for 300 m and 150 m Cable Lengths, G = 2 Rev. 0 | Page 9 of 20 AD8122 Data Sheet 20 20 VOUT/VIN, CM VOUT/VIN, CM 0 0 -20 -40 150m 300m -40 150m -60 -60 -80 -80 -100 0.1 1 10 100 -100 0.1 FREQUENCY (MHz) 10 0 0 VOUT/VSUPPLY -10 NEGATIVE, 300m PSR (dB) PSR (dB) 20 10 -20 100 Figure 19. Input Common-Mode Rejection vs. Frequency for 300 m and 150 m Cable Lengths, G = 2 VOUT/VSUPPLY -10 10 FREQUENCY (MHz) Figure 16. Input Common-Mode Rejection vs. Frequency for 300 m and 150 m Cable Lengths, G = 1 20 1 10780-019 CMR (dB) 300m 10780-016 CMR (dB) -20 NEGATIVE, 150m -30 NEGATIVE, 300m -20 NEGATIVE, 150m -30 -40 -40 -50 -50 POSITIVE, 300m POSITIVE, 300m -60 POSITIVE, 150m POSITIVE, 150m 1 10 -70 0.1 10780-017 -70 0.1 100 FREQUENCY (MHz) 10 100 FREQUENCY (MHz) Figure 17. Power Supply Rejection vs. Frequency for 300 m and 150 m Cable Lengths, G = 1 Figure 20. Power Supply Rejection vs. Frequency for 300 m and 150 m Cable Lengths, G = 2 6 4 4 2 2 VOLTAGE (V) 6 0 0 -2 -4 INPUT OUTPUT WITHOUT INPUT CLAMPS OUTPUT WITH INPUT CLAMPS -4 -6 0 100 200 300 400 500 600 700 800 TIME (ns) 900 1000 INPUT x 2 OUTPUT -6 0 100 200 300 400 500 600 700 800 TIME (ns) Figure 21. Overdrive Recovery, G = 2 Figure 18. Overdrive Recovery, G = 1 Rev. 0 | Page 10 of 20 900 1000 10780-121 -2 10780-018 VOLTAGE (V) 1 10780-020 -60 Data Sheet AD8122 150m 1V/DIV 500mV/DIV 150m 300m 350 300 400 450 TIME (ns) 100 250 200 150 300 350 450 400 TIME (ns) Figure 25. Equalized Pulse Response for 300 m and 150 m Cable Lengths (2 MHz), G = 2 Figure 22. Equalized Pulse Response for 300 m and 150 m Cable Lengths (2 MHz), G = 1 2 1.00 2 50 0 2.0 1.5 0.50 0 VOUT (V) 0.25 VIN - VOUT 0 -0.25 -0.50 -1 VOUT 1 SETTLING ERROR (%) 1 1.0 0.5 2VIN - VOUT 0 0 -0.5 -1.0 -1 -1.5 -0.75 0 100 200 300 400 500 600 700 -1.00 800 10780-123 -2 -100 TIME (ns) -2 -100 0 100 200 300 400 500 600 700 -2.0 800 TIME (ns) Figure 26. Settling Time to 1%, 300 m Cable Length, G = 2 Figure 23. Settling Time to 1%, 300 m Cable Length, G = 1 2.0 1.6 1.8 1.4 CONTROL VOLTAGE (V) 1.6 1.4 1.2 VPEAK AND VFILTER 1.0 0.8 VGAIN 0.6 1.2 VGAIN 1.0 0.8 0.6 VPEAK AND VFILTER 0.4 0.4 0 0 50 100 150 200 250 CABLE LENGTH (m) 300 Figure 24. Recommended Settings for UTP Cable 0 0 20 40 60 80 100 120 140 CABLE LENGTH (m) 160 180 Figure 27. Recommended Settings for Coaxial Cable Rev. 0 | Page 11 of 20 200 10780-127 0.2 0.2 10780-124 CONTROL VOLTAGE (V) SETTLING ERROR (%) 0.75 VOUT 10780-126 250 200 150 10780-125 100 VOUT (V) 50 0 10780-122 300m AD8122 Data Sheet THEORY OF OPERATION The AD8122 is a triple, wideband, low noise analog line equalizer that compensates for losses in UTP cables up to 300 meters in length and coaxial cables up to 200 meters in length. The 3-channel architecture is targeted at high resolution RGB applications, but can be used in HD YPbPr applications as well. The transfer function of the AD8122 can be pin selected for UTP or coaxial cable, and the gain of each channel can be set to 1 or 2. ADJUSTABLE CONTROL VOLTAGES OUTPUTS The AD8122 has low impedance outputs that are capable of driving a 150 load. In systems where the AD8122 must drive a high impedance capacitive load, it is recommended that a small series resistor be placed between the output and the load to buffer the capacitance. The resistor should not be so large as to reduce the overall bandwidth to an unacceptable level. For more information, see the Driving High Impedance Capacitive Loads section. Four continuously adjustable control voltages, common to the RGB channels, are available to the designer to provide compensation for various cable lengths, as well as for variations in the cable itself. ON-CHIP COMPARATORS * Each comparator can be used in a source-only cable termination scheme by placing a resistor in series with the comparator output. For more information, see the Comparator Applications section. * * * The VPEAK pin is used to control the amount of high frequency peaking. The VPEAK control is used to compensate for frequency dependent losses and cable length dependent losses that are present due to the skin effect of the cable. The VGAIN pin is used to adjust broadband gain to compensate for low frequency flat losses present in the cable. The VFILTER pin is used to adjust the cutoff frequency of the output low-pass filters. The VOFFSET pin is an output offset adjustment control that allows the designer to shift the output dc level. DIFFERENTIAL INPUTS The AD8122 has high impedance differential inputs that make termination simple and allow dc-coupled signals to be received directly from the cable. The AD8122 inputs can also be used in a single-ended fashion in coaxial cable applications. For differential systems that require a very wide input common-mode range, the AD8143 high voltage, triple differential receiver can be placed in front of the AD8122. For more information, see the Input Common-Mode Range section. Two on-chip comparators can be used for sync pulse extraction in systems that use common-mode sync pulse encoding (see the Sync Pulse Extraction Using Comparators section). INPUT SINGLE-ENDED VOLTAGE RANGE CONSIDERATIONS When using the AD8122 as a receiver, it is important to ensure that its single-ended input voltages stay within their specified ranges. The received single-ended level for each input is calculated by adding the common-mode level of the driver, the singleended peak amplitude of the received signal, the amplitude of any sync pulses, and other induced common-mode signals, such as ground shifts between the driver and the AD8122 and pickup from external sources, such as power lines and fluorescent lights. For more information, see the Input Common-Mode Range section. Rev. 0 | Page 12 of 20 Data Sheet AD8122 APPLICATIONS INFORMATION BASIC OPERATION COMPARATOR APPLICATIONS The AD8122 is easy to apply because it contains on chip all components needed for cable loss compensation. Figure 30 shows a basic application circuit for common-mode sync pulse extraction that is compatible with the common-mode sync pulse encoding technique used in the AD8134, AD8142, AD8147, and AD8148 triple differential drivers. If sync pulse extraction is not required, the terminations can be single 100 resistors, and the comparator inputs can be left floating. The two on-chip comparators are most often used to extract video sync pulses from the received common-mode voltages (see the Sync Pulse Extraction Using Comparators section). However, the comparators can also be used to recover sync pulses in sync-on-color applications, to receive differential digital information received on other channels such as the fourth UTP pair, or as general-purpose comparators. Built-in hysteresis helps to eliminate false triggers from noise. INPUT OVERDRIVE RECOVERY AND PROTECTION An ideal source terminated transmission line has a source resistance that exactly matches the characteristic impedance of the line and a load impedance that is infinite. When the signal is launched into the source termination, the initial value of the signal is one-half the source value because the signal amplitude is divided by 2 in the voltage divider formed by the source termination and the transmission line. At the load, the signal experiences 100% positive reflection due to the infinite load impedance and is restored to its full value. This technique is commonly used in PCB layouts that involve high speed digital logic. Occasional large differential transients can occur on the cable due to a number of causes, such as ESD and switching. When operating the AD8122 at G = 1, a differential input that exceeds +3.4 V or -3.4 V causes the output to "stick" at the associated power supply rail (positive rail for positive overdrive, negative rail for negative overdrive). The overdrive condition does not occur in applications with G = 2. The AD8122 recovers from the overdrive condition when the magnitude of the differential input falls below 200 mV. Most video signals return to 0 V nominal during the blanking intervals; therefore, recovery from the overdrive condition in systems that use these signals occurs during the first blanking interval after the overdrive event has ended. In systems with G = 1 and video signals that do not return to 0 V--for example, systems that include dc offsets--it is necessary to prevent the overdrive condition from occurring. Figure 28 shows a protection circuit that limits the differential input voltage to a little over 2 V. This circuit should be placed between the termination resistors and each AD8122 differential input. 49.9 1 2 3 4 5 6 TERMINATION RESISTORS AD8122 4 HN2D02FUTW1T1G 3 2 1 HN2D02FUTW1T1G 49.9 Figure 28. Required Input Protection for Applications with G = 1 Impedance mismatches occur in both the high state and the low state due to the differences in output resistances, resulting in a reflection coefficient of approximately +8.4% (21.5 dB return loss) in the low state, where the total source resistance is 59.2 , and -8.4% (21.5 dB return loss) in the high state, where the total source resistance is 42.2 . This source match is acceptable for digital sync pulses. Figure 29 shows how to apply source termination to the comparators when driving a 50 transmission line that is high impedance at its receive end. HIGH-Z 41.2 Z0 = 50 10780-023 5 10780-022 INPUT 6 The comparators are designed to drive source terminated transmission lines and have output resistances of 18 in the low state and 1 in the high state. Because the output resistances are different for each state, a compromise must be made in selecting the external source termination resistor value to match the transmission line impedance. The best approximation to a 50 match that can be achieved in this case is with an external resistor value of approximately 41.2 , which is available as a standard 1% value. See Figure 29 for an illustration of the source termination technique. Figure 29. Using a Comparator with Source Termination Rev. 0 | Page 13 of 20 AD8122 Data Sheet SYNC PULSE EXTRACTION USING COMPARATORS Blue VCM = The AD8122 is useful in many systems that transport computer video signals, which typically comprise red, green, and blue video signals, as well as separate horizontal and vertical sync signals (RGBHV). Because the sync signals are separate and not embedded in the color signals, it is advantageous to transmit them using a simple scheme that encodes them on the three common-mode voltages of the RGB signals. The AD8134, AD8142, AD8147, and AD8148 triple differential drivers are natural complements to the AD8122 because they perform the sync pulse encoding with the necessary circuitry on chip. [ K V -H 2 [ K -2 V 2 For more information about the encoding scheme, see the data sheets for the AD8134, AD8142, AD8147, and AD8148 drivers. Figure 30 shows how the AD8122 comparators can be used to extract the horizontal and vertical sync pulses that are encoded on the RGB common-mode voltages by the drivers. (1) ] (3) (2) ANALOG CONTROL INPUTS 26 VPEAK 25 VGAIN AD8122 27 VFILTER 23 VOFFSET POWER-DOWN CONTROL 28 PD CABLE SELECT CONTROL 30 COAX/UTP RED RECEIVED RED VIDEO 49.9 31 49.9 32 49.9 34 49.9 35 49.9 37 49.9 38 20 RED VIDEO OUTPUT 19 RED GAIN 16 GREEN VIDEO OUTPUT 15 GREEN GAIN 12 BLUE VIDEO OUTPUT 11 BLUE GAIN 1 4 HSYNC OUTPUT 2 7 VSYNC OUTPUT GREEN RECEIVED GREEN VIDEO BLUE RECEIVED BLUE VIDEO 1k 1k BLUE VCM RED VCM 2 3 9 475 GREEN VCM 47pF 8 47pF 10780-024 Green VCM = ] ] where: Red VCM, Green VCM, and Blue VCM are the transmitted commonmode voltages of the respective color signals. K is an adjustable gain constant that is set by the driver. V and H are the vertical and horizontal sync pulses, respectively, defined with a weight of -1 when the pulses are in their low states and a weight of +1 when the pulses are in their high states. The sync encoding equations are as follows: Red VCM = [ K V +H 2 Figure 30. Basic Application Circuit with Common-Mode Sync Pulse Extraction (Supplies and Input Protection Not Shown) Rev. 0 | Page 14 of 20 Data Sheet AD8122 The VPEAK input is the main peaking control and is used to compensate for the low-pass roll-off in the cable response. The VGAIN input controls the broadband flat gain and is used to compensate for the cable loss that is nominally flat. The output of each channel contains an on-chip adjustable lowpass filter to reduce high frequency noise. In most applications, the filter cutoff frequency control, VFILTER, is connected directly to the VPEAK voltage to provide the maximum bandwidth and minimum noise for a given VPEAK setting. External low-pass filters are generally not required. The VOFFSET input is used to produce an offset at the AD8122 output. The output offset is equal to the voltage applied to the VOFFSET input, limited by the output swing limits. USING THE COAX/UTP SELECTOR Connect the COAX/UTP input to Logic 1 for coaxial cable or to Logic 0 for UTP cable (see Table 1 for the logic levels). This input has an internal pull-down resistor and can, therefore, be left floating in UTP applications. DRIVING HIGH IMPEDANCE CAPACITIVE LOADS In many applications that use RGB over UTP cable, delay correction is required to remove the skew that exists among the three pairs used to carry the RGB signals. The AD8120 is ideally suited to perform this skew correction and can be placed immediately following the AD8122 in the receiver signal chain. The AD8120 has a high input impedance and a fixed gain of 2. When using the AD8120 with the AD8122, configure the AD8122 for a gain of 1 by connecting each video output (OUTR, OUTG, and OUTB) to its respective gain pin (GAINR, GAING, and GAINB). In systems where the AD8122 must drive a high impedance capacitive load, a small series resistor must be placed between each of the three AD8122 video outputs and the load to buffer the input capacitance of the device being driven. The resistor value must be small enough to preserve the required bandwidth. LAYOUT AND POWER SUPPLY DECOUPLING CONSIDERATIONS Standard high speed PCB layout practices should be adhered to when designing with the AD8122. A solid ground plane is required, and controlled impedance traces should be used when interconnecting the high speed signals. Place source termination resistors on all of the outputs as close as possible to the output pins. The exposed pad on the underside of the AD8122 must be soldered to a pad on the PCB surface that is thermally connected to a solid plane (usually the ground plane) to achieve the specified JA. Use several thermal vias to make the connection between the pad and the PCB planes. Place high quality 0.1 F power supply decoupling capacitors as close as possible to all of the supply pins; use small surface-mount ceramic capacitors. For bulk supply decoupling, tantalum capacitors are recommended. INPUT COMMON-MODE RANGE Most applications that use the AD8122 as a receiver use a driver powered from 5 V supplies. (Suggested drivers include the AD8146, AD8147, AD8148, AD8133, and AD8134.) In such applications, the common-mode voltage on the line is placed at a nominal 0 V relative to the ground potential at the driver and provides optimum immunity from any common-mode anomalies picked up along the cable (including ground shifts between the driver and receiver ends). The AD8122 input voltage range of 4 V typical is sufficient for many of these applications. If a wider input range is required, the AD8143 triple receiver (with an input common-mode range of 10.5 V on 12 V supplies) can be placed in front of the AD8122. Figure 31 shows this configuration for one channel. ONE AD8143 CHANNEL POWER SUPPLIES = 12V RECEIVED SIGNAL 100 2 49.9 DRIVING 75 CABLE WITH THE AD8122 When the RGB outputs must drive a 75 line instead of a high impedance load, an additional gain of 2 is required to make up for the double termination loss (75 source and load terminations). Each output of the AD8122 (OUTR, OUTG, or OUTB) is easily configured for a gain of 2 by grounding its respective gain pin (GAINR, GAING, or GAINB). ONE AD8122 INPUT +5V 3 HBAT-540C 1 -5V 10780-025 USING THE VPEAK, VGAIN, VFILTER, AND VOFFSET INPUTS Figure 31. Optional Use of the AD8143 in Front of the AD8122 for Wide Input Common-Mode Range The Schottky diodes are required to protect the AD8122 from any AD8143 outputs that exceed the AD8122 input limits. The 49.9 resistor limits the fault current and produces a pole at approximately 800 MHz with the effective diode capacitance of 3 pF and the AD8122 input capacitance of 1 pF. The pole lowers the response by only 0.07 dB at 100 MHz and, therefore, has a negligible effect on the signal. Rev. 0 | Page 15 of 20 AD8122 Data Sheet When using a single 5 V supply on the driver side, the commonmode voltage at the driver output is typically 2.5 V (in the case of the AD8142 driver, the common-mode voltage at the output is fixed at 1.5 V). The largest received differential video signal is approximately 700 mV p-p, which adds 175 mVPEAK to each singleended side of the differential signal and results in a worst-case peak voltage of 2.675 V or 1.675 V on an AD8122 single-ended input (assuming that there is no ground shift between the driver and receiver). Because these levels are within the AD8122 input voltage swing limits, such a system works well as long as the difference in ground potential between the driver and receiver does not cause the input voltage swing to exceed these limits. When used, common-mode sync signals are generally applied with a peak deviation of 500 mV during the blanking intervals (video signal = 0 V), increasing the common-mode level from 2.5 V to 3.0 V (1.5 V to 2.0 V in the case of the AD8142 driver). These common-mode levels are below the upper input voltage swing limit of 4 V and, therefore, leave a margin of 1 V or 2 V for ground shifts between the driver and receiver. To increase the common-mode range of the overall system, use one or both of these techniques: * * Power the driver from dual supplies (output common-mode voltage = 0 V). Place an AD8143 in front of the AD8122, as shown in Figure 31. These techniques can be combined or applied separately. POWER-DOWN The power-down feature can be used to reduce power consumption when a particular device is not in use. When asserted, the PD pin does not place the output in a high-Z state. The input logic levels and supply current in power-down mode are listed in Table 1. Rev. 0 | Page 16 of 20 Data Sheet AD8122 OUTLINE DIMENSIONS 0.30 0.25 0.18 31 40 30 0.50 BSC 1 TOP VIEW 0.80 0.75 0.70 10 11 20 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 4.85 4.70 SQ 4.55 EXPOSED PAD 21 0.45 0.40 0.35 PIN 1 INDICATOR BOTTOM VIEW 0.25 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WJJD-5. 05-06-2011-A PIN 1 INDICATOR 6.10 6.00 SQ 5.90 Figure 32. 40-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 6 mm x 6 mm Body, Very Very Thin Quad (CP-40-12) Dimensions shown in millimeters ORDERING GUIDE Model1 AD8122ACPZ AD8122ACPZ-R7 AD8122-EVALZ 1 Temperature Range -40C to +85C -40C to +85C Package Description 40-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 40-Lead Lead Frame Chip Scale Package [LFCSP_WQ] Evaluation Board Z = RoHS Compliant Part. Rev. 0 | Page 17 of 20 Package Option CP-40-12 CP-40-12 AD8122 Data Sheet NOTES Rev. 0 | Page 18 of 20 Data Sheet AD8122 NOTES Rev. 0 | Page 19 of 20 AD8122 Data Sheet NOTES (c)2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10780-0-7/12(0) Rev. 0 | Page 20 of 20