2009-2013 Microchip Technology Inc. DS60001156H-page 1
PIC32MX5XX/6XX/7XX
Operating Conditions
• 2.3V to 3.6V, -40ºC to +105ºC, DC to 80 MHz
Core: 80 MHz/105 DMIPS MIPS32® M4K®
• MIPS16e® mode for up to 40% smaller code size
• Code-efficient (C and Assembly) architecture
• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Clock Management
• 0.9% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent W atchdog Timer
• Fast wake-up and start-up
Power Management
• Low-power management modes (Sleep and Idle)
• Integrated Power-on Reset, Brown-out Reset
• 0.5 mA/MHz dynamic current (typical)
• 41 µA IPD current (typical)
Graphics Features
• External graphics interface with up to 34 Parallel Master
Port (PMP) pins:
- Interface to external graphics controller
- Capable of driving LCD directly with DMA and
internal or external memory
Analog Features
• ADC Module:
- 10-bit 1 Msps rate wit h one Sample and Hold (S&H)
- 16 analog inputs
- Can operate during Sleep mode
• Flexible and independent ADC trigger sources
•Comparators:
- Two dual-input Comparator modules
- Programmable references with 32 voltage points
Timers/Output Compare/Input Capture
• Five General Purpose Timers:
- Five 16-bit and up to two 32-bi t Timers/Counters
• Five Output Compare (OC) modules
• Five Input Capture (IC) modules
• Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
• USB 2.0-compliant Full-S peed OTG controller
• 10/100 Mbps Ethernet MAC with MII and RMII interface
• CAN module:
- 2.0B Active with DeviceNet™ addressing support
• Six UART modules (20 Mbps):
- Supports LIN 1.2 protocols and IrDA® support
• Up to four 4-wire SPI modules (25 Mbps)
• Up to five I2C modules (up to 1 Mbaud) with SMBus
support
• Parallel Master Port (PMP)
Direct Memory Access (DMA)
• Up to eight channels of hardware DMA with automatic
data size detection
• 32-bit Programmable Cyclic Redundancy Check (CRC)
• Six additional channels dedicated to USB, Ethernet and
CAN modules
Input/Output
• 15 mA or 10 mA source/sink for standard VOH/VOL and
up to 22 mA for non-standard VOH1
• 5V-tolerant pins
• Selectable open drain and pull-ups
• External interrupts
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
• In-circuit and in-application programming
•4-wire MIPS
® Enhanced JTAG interface
• Unlimited program and six complex data breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
Packages
Type QFN TQFP TFBGA VTLA
Pin Count 64 64 100 100 121 124
I/O Pins (up to) 51 51 83 83 83 83
Contact/Lead Pitch 0.50 0.50 0.40 0.50 0.80 0.50
Dimensions 9x9x0.9 10x10x1 12x12x1 14x14x1 10x10x1.1 9x9x0.9
Note: All dimensions are in millimeters (mm) unless specified.
32-bit Microcontrollers (up to 512 KB Flash and 128 KB SRAM)
with Graphics Interface, USB, CAN, and Ethernet