SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
www.ti.com
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
Check for Samples: SN65LVDS179-Q1,SN65LVDS180-Q1,SN65LVDS050-Q1,SN65LVDS051-Q1
1FEATURES
•Qualified for Automotive Applications
•ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
•Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard
•Signaling Rates up to 400 Mbps
•Bus-Terminal ESD Exceeds 12 kV
•Operates From a Single 3.3-V Supply
•Low-Voltage Differential Signaling With Typical
Output Voltages of 350 mV and a 100-ΩLoad
•Propagation Delay Times
–Driver: 1.7 ns Typ
–Receiver: 3.7 ns Typ
•Power Dissipation at 200 MHz
–Driver: 25 mW Typical
–Receiver: 60 mW Typical
•LVTTL Input Levels Are 5-V Tolerant
•Receiver Maintains High Input Impedance With
VCC <1.5 V
•Receiver Has Open-Circuit Fail Safe
DESCRIPTION
The SN65LVDS179, SN65LVDS180, SN65LVDS050,
and SN65LVDS051 are differential line drivers and
receivers that use low-voltage differential signaling
(LVDS) to achieve signaling rates as high as 400
Mbps. The TIA/EIA-644 standard compliant electrical
interface provides a minimum differential output
voltage magnitude of 247 mV into a 100-Ωload and
receipt of 50-mV signals with up to 1 V of ground
potential difference between a transmitter and
receiver.
The intended application of this device and signaling
technique is for point-to-point baseband data
transmission over controlled impedance media of
approximately 100-Ωcharacteristic impedance. The
transmission media may be printed-circuit board
traces, backplanes, or cables. (Note: The ultimate
rate and distance of data transfer is dependent upon
the attenuation characteristics of the media, the noise
coupling to the environment, and other application
specific characteristics).
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright ©2003–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
www.ti.com
DESCRIPTION (CONTINUED)
The devices offer various driver, receiver, and enabling combinations in industry standard footprints. Since these
devices are intended for use in simplex or distributed simplex bus structures, the driver enable function does not
put the differential outputs into a high-impedance state but rather disconnects the input and reduces the
quiescent power used by the device. (For these functions with a high-impedance driver output, see the
SN65LVDM series of devices.) All devices are characterized for operation from −40°C to 85°C.
ORDERING INFORMATION(1)
TAPACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING
SOIC (D) Tape and reel SN65LVDS179DRQ1(3) VDS179Q
TSSOP (PW) Tape and reel SN65LVDS179PWRQ1(3) VDS179Q
SOIC (D) Tape and reel SN65LVDS180DRQ1 VDS180Q
TSSOP (PW) Tape and reel SN65LVDS180PWRQ1 VDS180Q
-40°C to 85°CSOIC (D) Tape and reel SN65LVDS050DRQ1(3) VDS050Q
TSSOP (PW) Tape and reel SN65LVDS050IPWRQ1 VDS050Q
SOIC (D) Tape and reel SN65LVDS051DRQ1 VDS051Q
TSSOP (PW) Tape and reel SN65LVDS051PWRQ1 VDS051Q
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) Product Preview
2Submit Documentation Feedback Copyright ©2003–2011, Texas Instruments Incorporated
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
www.ti.com
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
FUNCTION TABLES
SN65LVDS179 RECEIVER
INPUTS OUTPUT(1)
VID = VA- VBR
VID ≥50 mV H
-50 mV <VID <50 mV ?
VID ≤-50 mV L
Open H
(1) H = high level, L = low level, ? = indeterminate
SN65LVDS179 DRIVER(1)
INPUT OUTPUTS
D Y Z
L L H
H H L
Open L H
(1) H = high level, L = low level
SN65LVDS180, SN65LVDS050, and
SN65LVDS051 RECEIVER(1)
INPUTS OUTPUT
VID = VA- VBRE R
VID≥50 mV L H
-50 mV <VID <50 mV L ?
VID≤-50 mV L L
Open L H
X H Z
(1) H = high level, L = low level, Z = high impedance, X = don't care,
? = indeterminate
SN65LVDS180, SN65LVDS050, and
SN65LVDS051 DRIVER(1)
INPUTS OUTPUTS
D DE Y Z
L H L H
H H H L
Open H L H
X L OFF OFF
(1) H = high level, L = low level, Z = high impedance, X = don't care,
OFF = no output
Copyright ©2003–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
www.ti.com
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
4Submit Documentation Feedback Copyright ©2003–2011, Texas Instruments Incorporated
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
2.4*
ŤVIDŤ
2
ŤVIDŤ
2
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
www.ti.com
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted) UNIT
VCC Supply voltage range(2) –0.5 V to 4 V
D, R, DE, RE –0.5 V to 6 V
Voltage range Y, Z, A, and B –0.5 V to 4 V
|VOD| Differential output voltage 1 V
Electrostatic discharge Y, Z, A, B , and GND (see (3)) Class 3, A:12 kV, B:600 V
All Class 3, A:7 kV, B:500 V
Continuous power dissipation See Dissipation Rating Table
Storage temperature range –65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 250°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages are with respect to network ground terminal.
(3) Tested in accordance with MIL-STD-883C Method 3015.7.
DISSIPATION RATING TABLETA≤25°C DERATING FACTOR TA= 85°C
PACKAGE POWER RATING ABOVE TA= 25°C(1) POWER RATING
PW(14) 736 mW 5.9 mW/°C 383 mW
PW(16) 839 mW 6.7 mW/°C 437 mW
D(8) 635 mW 5.1 mW/°C 330 mW/°C
D(14) 987 mW 7.9 mW/°C 513 mW/°C
D(16) 1110 mW 8.9 mW/°C 577 mW/°C
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no airflow.
RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT
VCC Supply voltage 3 3.3 3.6 V
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
|VID| Magnitude of differential input voltage 0.1 0.6 V
|VOD(dis)| Magnitude of differential output voltage with disabled driver 520 mV
VOY or VOZ Driver output voltage 0 2.4 V
VIC Common-mode input voltage (see Figure 5) V
VCC- 0.8
TAOperating free-air temperature –40 85 °C
Copyright ©2003–2011, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
www.ti.com
DEVICE ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
SN65LVDS179 No receiver load, driver RL= 100 Ω9 12 mA
Driver and receiver enabled, no receiver load, driver RL= 100 Ω9 12
Driver enabled, receiver disabled, RL= 100 Ω5 7
SN65LVDS180 mA
Driver disabled, receiver enabled, no load 1.5 2
Disabled 0.5 1
Supply
ICC Drivers and receivers enabled, no receiver loads, driver RL= 100 Ω12 20
current Drivers enabled, receivers disabled, RL= 100 Ω10 16
SN65LVDS050 mA
Drivers disabled, receivers enabled, no loads 3 6
Disabled 0.5 1
Drivers enabled, No receiver loads, driver RL= 100 Ω12 20
SN65LVDS051 mA
Drivers disabled, no loads 3 6
(1) All typical values are at 25°C and with a 3.3-V supply.
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|VOD| Differential output voltage magnitude 247 340 454
RL= 100 Ω, See mV
Change in differential output voltage magnitude between logic Figure 3 and Figure 2
Δ|VOD| -50 50
states
VOC(SS) Steady-state common-mode output voltage 1.125 1.2 1.375 V
Change in steady-state common-mode output voltage between
ΔVOC(SS) See Figure 3 –50 50 mV
logic states
VOC(PP) Peak-to-peak common-mode output voltage 50 150 mV
DE –0.5 –20
IIH High-level input current VIH = 5 V μA
D 2 20
DE –0.5 –10
IIL Low-level input current VIL = 0.8 V μA
D 2 10
VOY or VOZ = 0 V 3 10
IOS Short-circuit output current mA
VOD = 0 V 3 10
DE = OV
VOY = VOZ = OV
IO(OFF) Off-state output current –1 1 μA
DE = VCC
VOY = VOZ = OV,
VCC <1.5 V
CIN Input capacitance 3 pF
6Submit Documentation Feedback Copyright ©2003–2011, Texas Instruments Incorporated
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
www.ti.com
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIT+ Positive-going differential input voltage threshold 50
See Figure 5 and mV
VIT- Negative-going differential input voltage threshold –50
IOH = -8 mA 2.4
VOH High-level output voltage V
IOH = -4 mA 2.8
VOL Low-level output voltage IOL = 8 mA 0.4 V
VI= 0 –2–11 –20
IIInput current (A or B inputs) μA
VI= 2.4 V –1.2 –3
II(OFF) Power-off input current (A or B inputs) VCC = 0 ±20 μA
IIH High-level input current (enables) VIH = 5 V ±10 μA
IIL Low-level input current (enables) VIL = 0.8 V ±10 μA
IOZ High-impedance output current VO= 0 or 5 V ±10 μA
CIInput capacitance 5 pF
(1) All typical values are at 25°C and with a 3.3-V supply.
DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
tPLH Propagation delay time, low-to-high-level output 1.7 2.7 ns
tPHL Propagation delay time, high-to-low-level output 1.7 2.7 ns
RL= 100 Ω,
trDifferential output signal rise time 0.8 1 ns
CL= 10 pF,
tfDifferential output signal fall time 0.8 1 ns
See Figure 2
tsk(p) Pulse skew (|tpHL - tpLH|)(2) 300 ps
tsk(o) Channel-to-channel output skew(3) 150 ps
ten Enable time 4.3 10 ns
See Figure 4
tdis Disable time 3.1 10 ns
(1) All typical values are at 25°C and with a 3.3-V supply.
(2) tsk(p) is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.
(3) tsk(o) is the magnitude of the time difference between the outputs of a single device with all of their inputs connected together.
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
tPLH Propagation delay time, low-to-high-level output 3.7 4.5 ns
tPHL Propagation delay time, high-to-low-level output 3.7 4.5 ns
CL= 10 pF,
tsk(p) Pulse skew (|tpHL - tpLH|)(2) 0.3 ns
See Figure 6
trOutput signal rise time 0.7 1.5 ns
tfOutput signal fall time 0.9 1.5 ns
tPZH Propagation delay time, high-impedance-to-high-level output 2.5 ns
tPZL Propagation delay time, high-impedance-to-low-level output 2.5 ns
See Figure 7
tPHZ Propagation delay time, high-level-to-high-impedance output 7 ns
tPLZ Propagation delay time, low-level-to-high-impedance output 4 ns
(1) All typical values are at 25°C and with a 3.3-V supply.
(2) tsk(p) is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.
Copyright ©2003–2011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
VOD
VOZ
VOY
VOC
VI
IOY
IOZ
IIA
Z
Y
VOY )VOZ
2
Driver Enable
2 V
1.4 V
0.8 V
100%
80%
20%
0%
0 V
VOD(H)
VOD(L)
Output
Input
VOD
Z
Y
Input 100 Ω
±1%
CL = 10 pF
(2 Places)
tPHL
tPLH
tftr
Driver Enable
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION
DRIVER
Figure 1. Driver Voltage and Current Definitions
A. All input pulses are supplied by a generator having the following characteristics: tror tf≤1 ns, pulse repetition rate
(PRR) = 50 Mpps, pulse width = 10 ±0.2 ns. CLincludes instrumentation and fixture capacitance within 0,06 mm of
the D.U.T.
Figure 2. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal
8Submit Documentation Feedback Copyright ©2003–2011, Texas Instruments Incorporated
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
www.ti.com
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
PARAMETER MEASUREMENT INFORMATION (continued)
A. All input pulses are supplied by a generator having the following characteristics: tror tf≤1 ns, pulse repetition rate
(PRR) = 50 Mpps, pulse width = 10 ±0.2 ns. CLincludes instrumentation and fixture capacitance within 0,06 mm of
the D.U.T. The measurement of VOC(PP) is made on test equipment with a –3-dB bandwidth of at least 300 MHz.
Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage
A. All input pulses are supplied by a generator having the following characteristics: tror tf≤1 ns, pulse repetition rate
(PRR) = 0.5 Mpps, pulse width = 500 ±10 ns. CLincludes instrumentation and fixture capacitance within 0,06 mm of
the D.U.T.
Figure 4. Enable and Disable Time Circuit and Definitions
Copyright ©2003–2011, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
VIB
VID
VIA
VIC VO
A
B
R
VIA )VIB
2
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
RECEIVER
Figure 5. Receiver Voltage Definitions
Receiver Minimum and Maximum Input Threshold Test Voltages
APPLIED VOLTAGES RESULTING DIFFERENTIAL RESULTING COMMON-
(V) INPUT VOLTAGE (mV) MODE INPUT VOLTAGE (V)
VIA VIB VID VIC
1.25 1.15 100 1.2
1.15 1.25 –100 1.2
2.4 2.3 100 2.35
2.3 2.4 –100 2.35
0.1 0 100 0.05
0 0.1 –100 0.05
1.5 0.9 600 1.2
0.9 1.5 –600 1.2
2.4 1.8 600 2.1
1.8 2.4 –600 2.1
0.6 0 600 0.3
0 0.6 –600 0.3
10 Submit Documentation Feedback Copyright ©2003–2011, Texas Instruments Incorporated
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
www.ti.com
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
A. All input pulses are supplied by a generator having the following characteristics: tror tf≤1 ns, pulse repetition rate
(PRR) = 50 Mpps, pulse width = 10 ±0.2 ns. CLincludes instrumentation and fixture capacitance within 0,06 m of the
D.U.T.
Figure 6. Timing Test Circuit and Waveforms
Copyright ©2003–2011, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
www.ti.com
Figure 7. Enable/Disable Time Test Circuit and Waveforms
12 Submit Documentation Feedback Copyright ©2003–2011, Texas Instruments Incorporated
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
−30
−20
−10
0
10
20
30
40
0 0.5 1 1.5 2 2.5 3
Other output at 0 V
VCC = 3.3 V
TA = 25°C
DE = 0 V
Other output at 1.2 V
VOZ = VOY
Other output at 2.4 V
Disabled Driver Output Current − mA
− Output Voltage − V
VO
−4 IOH − High-Level Output Current − mA
3.5
2.5
0−2 0
1.5
−3
0.5
VOH− High-Level Output Voltage − V
−1
3
2
1
VCC = 3.3 V
TA = 25°C
0IOL − Low-Level Output Current − mA
4
3
04 6
2
2
VCC = 3.3 V
TA = 25°C
1
VOL − Low-Level Output Voltage − V
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
www.ti.com
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
TYPICAL CHARACTERISTICS
DISABLED DRIVER OUTPUT CURRENT
vs
OUTPUT VOLTAGE
Figure 8.
DRIVER DRIVER
LOW-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE
vs vs
LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT CURRENT
Figure 9. Figure 10.
Copyright ©2003–2011, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
0IOL − Low-Level Output Current − mA
5
060
2
10
VOL
20 30
3
1
− Low-Level Output Votlage − V
40 50
4
VCC = 3.3 V
TA = 25°C
−80 IOH − High-Level Output Current − mA
4
00
2
−60
VOH
−40 −20
3
1
− High-Level Output Voltage − V
VCC = 3.3 V
TA = 25°C
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
RECEIVER RECEIVER
LOW-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE
vs vs
LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT CURRENT
Figure 11. Figure 12.
DRIVER DRIVER
HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME LOW-TO-HIGH LEVEL PROPAGATION DELAY TIME
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 13. Figure 14.
14 Submit Documentation Feedback Copyright ©2003–2011, Texas Instruments Incorporated
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
−50 TA − Free−Air Temperature − °C
4.5
2.5 50 90
3.5
−10
tPLH
−30 30 70
10
VCC = 3.6 V
VCC = 3 V
4
3
VCC = 3.3 V
− High-To-Low Level Propagation Delay Time − ms
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
www.ti.com
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
TYPICAL CHARACTERISTICS (continued)
RECEIVER
HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
Figure 15.
RECEIVER
LOW-TO-HIGH LEVEL PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
Figure 16.
Copyright ©2003–2011, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
10
0.1 1M Data Rate – Hz
1
100k 10M 100M
100
Transmission Distance – m
1000
5% Jitter
30% Jitter
24 AWG UTP 96 Ω (PVC Dielectric)
Rt
100 Ω Typ
300 kΩ300 kΩ
VCC
VIT ≈ 2.3 V
A
BY
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
www.ti.com
APPLICATION INFORMATION
The devices are generally used as building blocks for high-speed point-to-point data transmission. Ground
differences are less than 1 V with a low common-mode output and balanced interface for low noise emissions.
Devices can interoperate with RS-422, PECL, and IEEE-P1596. Drivers/receivers maintain ECL speeds without
the power and dual supply requirements.
Figure 17. Data Transmission Distance Versus Rate
FAIL SAFE
One of the most common problems with differential signaling applications is how the system responds when no
differential voltage is present on the signal pair. The LVDS receiver is like most differential line receivers, in that
its output logic state can be indeterminate when the differential input voltage is between -100 mV and 100 mV
and within its recommended input common-mode voltage range. TI's LVDS receiver is different in how it handles
the open-input circuit situation, however.
Open-circuit means that there is little or no input current to the receiver from the data line itself. This could be
when the driver is in a high-impedance state or the cable is disconnected. When this occurs, the LVDS receiver
pulls each line of the signal pair to near VCC through 300-kΩresistors as shown in Figure 11. The fail-safe
feature uses an AND gate with input voltage thresholds at about 2.3 V to VCC - 0.4 V to detect this condition and
force the output to a high-level regardless of the differential input voltage.
Figure 18. Open-Circuit Fail Safe of the LVDS Receiver
16 Submit Documentation Feedback Copyright ©2003–2011, Texas Instruments Incorporated
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
SN65LVDS179-Q1, SN65LVDS180-Q1
SN65LVDS050-Q1, SN65LVDS051-Q1
www.ti.com
SGLS204B –SEPTEMBER 2003–REVISED NOVEMBER 2011
It is only under these conditions that the output of the receiver will be valid with less than a 100-mV differential
input voltage magnitude. The presence of the termination resistor, Rt, does not affect the fail-safe function as
long as it is connected as shown in the figure. Other termination circuits may allow a dc current to ground that
could defeat the pullup currents from the receiver and the fail-safe feature.
Copyright ©2003–2011, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN65LVDS050IPWRQ1 ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LVDS051DRG4Q1 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LVDS051DRQ1 ACTIVE SOIC D 16 TBD Call TI Call TI
SN65LVDS051PWRG4Q1 ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LVDS051PWRQ1 ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LVDS180DRG4Q1 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LVDS180DRQ1 ACTIVE SOIC D 14 TBD Call TI Call TI
SN65LVDS180PWRG4Q1 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LVDS180PWRQ1 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 2
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN65LVDS050-Q1, SN65LVDS051-Q1, SN65LVDS180-Q1 :
•Catalog: SN65LVDS050, SN65LVDS051, SN65LVDS180
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
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