Rev: 1.01 3/2002 6/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74117AX
AC Characteristics
* These parameters are sampled and are not 100% tested.
Read Cycle 1: CE = OE = VIL, WE = VIH, UB and, or LB = VIL
Read Cycle
Parameter Symbol
-6 -7 -8 -10 -12
Unit
Min Max Min Max Min Max Min Max Min Max
Read cycle time tRC 6—7—8 —10—12—ns
Address access time tAA —6—7— 8 —10—12ns
Chip enable access time (CE)t
AC —6—7— 8 —10—12ns
Byte enable access time (UB, LB)t
AB —3—3—3.5— 4 — 5 ns
Output enable to output valid (OE)tOE —3—3—3.5— 4 — 5 ns
Output hold from address change tOH 3—3—3 — 3 — 3 —ns
Chip enable to output in low Z (CE)tLZ*3—3—3 — 3 — 3 —ns
Output enable to output in low Z (OE)tOLZ*0—0—0 — 0 — 0 —ns
Byte enable to output in low Z (UB, LB)tBLZ*0—0—0 — 0 — 0 —ns
Chip disable to output in High Z (CE)tHZ*—3—3.5—4—5—6ns
Output disable to output in High Z (OE)tOHZ*—3—3—3.5— 4 — 5 ns
Byte disable to output in High Z (UB, LB)tBHZ*—3—3—3.5— 4 — 5 ns
tAA
tOH
tRC
Address
Data Out Previous Data Data valid