austriamicrosystems AG is now ams AG The technical content of this austriamicrosystems datasheet is still valid. Contact information: Headquarters: ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 e-Mail: ams_sales@ams.com Please visit our website at www.ams.com Datasheet AS5163 12-Bit Automotive Angle Position Sensor 1 General Description 2 Key Features 360 contactless high resolution angular position encoding The AS5163 is a contactless magnetic angle position sensor for accurate angular measurement over a full turn of 360. A sub range can be programmed to achieve the best resolution for the application. It is a system-on-chip, combining integrated Hall elements, analog front-end, digital signal processing and best in class automotive protection features in a single device. al id User programmable start and end point of the application region User programmable clamping levels and programming of the transition point Powerful analog output - Short circuit monitor - High driving capability for resistive and capacitive loads lv To measure the angle, only a simple two-pole magnet, rotating over the center of the chip, is required. The magnet may be placed above or below the IC. Wide temperature range: -40C to +150C The absolute angle measurement provides instant indication of the magnet's angular position with a resolution of 0.022 = 16384 positions per revolution. According to this resolution the adjustment of the application specific mechanical positions are possible. The angular output data is available over a 12-bit PWM signal or 12-bit ratiometric analog output. am lc s on A te G nt st il Small Pb-free package: 14-pin TSSOP Broken GND and VDD detection over a wide range of different load conditions 3 Applications The AS5163 operates at a supply voltage of 5V and the supply and output pins are protected against overvoltage up to +27V. In addition, the supply pins are protected against reverse polarity up to -18V. The AS5163 is ideal for automotive applications like Throttle and valve position sensing, Gearbox position sensor, Headlight position control, Torque sensing, Pedal position sensing and non contact Potentiometers. Figure 1. AS5163 Block Diagram VDD3 VDD5 VDD High voltage/ Reverse polarity protection ni ca AS5163 Hall Array Single pin Interface Zero Position Sin Cos ch Frontend Amplifier OTP Register CORDIC 14-bit Angle Output DSP 12-bit PWM 12 ADC 12-bit DAC M U X Te Programable Angle OUT Driver OUT KDOWN GND www.austriamicrosystems.com/AS5163 Revision 2.7 1 - 36 AS5163 Datasheet - C o n t e n t s Contents 1 2 Key Features............................................................................................................................................................................. 1 3 Applications............................................................................................................................................................................... 1 4 Pin Assignments ....................................................................................................................................................................... 3 4.1 Pin Descriptions.................................................................................................................................................................................... 3 al id 1 General Description .................................................................................................................................................................. 5 Absolute Maximum Ratings ...................................................................................................................................................... 4 6 Electrical Characteristics........................................................................................................................................................... 5 6.1 Operating Conditions............................................................................................................................................................................ 5 6.2 Magnetic Input Specification................................................................................................................................................................. 5 6 6 7 Detailed Description.................................................................................................................................................................. 7 7.1 Operation.............................................................................................................................................................................................. 8 am lc s on A te G nt st il lv 6.3 Electrical System Specifications........................................................................................................................................................... 6.4 Timing Characteristics .......................................................................................................................................................................... 7.1.1 VDD Voltage Monitor ................................................................................................................................................................... 8 7.2 Analog Output....................................................................................................................................................................................... 7.2.1 7.2.2 7.2.3 7.2.4 7.2.5 7.2.6 7.2.7 7.3 Pulse Width Modulation (PWM) Output.............................................................................................................................................. 7.4 Kick Down Function............................................................................................................................................................................ 8 Application Information ........................................................................................................................................................... ch ni ca 8.1.1 Hardware Setup......................................................................................................................................................................... 8.1.2 Protocol Timing and Commands of Single Pin Interface ........................................................................................................... 8.1.3 UNBLOCK ................................................................................................................................................................................. 8.1.4 WRITE128 ................................................................................................................................................................................. 8.1.5 READ128................................................................................................................................................................................... 8.1.6 DOWNLOAD.............................................................................................................................................................................. 8.1.7 UPLOAD .................................................................................................................................................................................... 8.1.8 FUSE ......................................................................................................................................................................................... 8.1.9 PASS2FUNC ............................................................................................................................................................................. 8.1.10 READ....................................................................................................................................................................................... 8.1.11 WRITE ..................................................................................................................................................................................... 8.2 OTP Programming Data ..................................................................................................................................................................... Read / Write User Data.............................................................................................................................................................. Programming Procedure............................................................................................................................................................ Physical Placement of the Magnet ............................................................................................................................................ Magnet Placement..................................................................................................................................................................... Te 13 14 16 8.1 Programming the AS5163 .................................................................................................................................................................. 8.2.1 8.2.2 8.2.3 8.2.4 9 Programming Parameters............................................................................................................................................................ 9 Application Specific Angular Range Programming ...................................................................................................................... 9 Application Specific Programming of the Break Point ............................................................................................................... 10 Full Scale Mode ......................................................................................................................................................................... 10 Resolution of the Parameters .................................................................................................................................................... 11 Analog Output Diagnostic Mode ................................................................................................................................................ 12 Analog Output Driver Parameters.............................................................................................................................................. 12 16 16 17 19 20 21 22 22 22 23 23 24 25 30 30 31 31 9 Package Drawings and Markings ........................................................................................................................................... 32 10 Ordering Information............................................................................................................................................................. 35 www.austriamicrosystems.com/AS5163 Revision 2.7 2 - 36 AS5163 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments 14 OUT VDD5 2 13 NC NC 3 12 GNDP VDD3 4 11 KDOWN GNDA 5 10 NC NC 6 9 NC NC 7 8 GNDD am lc s on A te G nt st il lv 1 AS5163 VDD al id Figure 2. Pin Assignments (Top View) 4.1 Pin Descriptions Table 1 provides the description of each pin of the standard TSSOP14 package (14-Lead Thin Shrink Small Outline Package) (see Figure 2). Table 1. Pin Descriptions Pin Number Pin Name Pin Type Supply pin Supply pin 4.5V- Regulator output, internally regulated from VDD. This pin needs an external ceramic capacitor of minimum 2.2F. 1 VDD 2 VDD5 3 NC 4 VDD3 5 GNDA 6 NC 7 NC 8 GNDD Supply pin NC DIO/AIO multi purpose pin DIO/AIO multi purpose pin Test pin for fabrication. Connected to ground in the application board. Supply pin 3.45V- Regulator output, internally regulated from VDD5. This pin needs an external ceramic capacitor of minimum 2.2F. Supply pin Analog ground pin. Connected to ground in the application board. Test pin for fabrication. Connected to ground in the application board. DIO/AIO multi purpose pin Test pin for fabrication. Open in the application. ca DIO/AIO multi purpose pin ni ch 9 Description Positive supply pin. This pin is high voltage protected. Digital ground pin. Connected to ground in the application board. Test pins for fabrication. Connected to ground in the application board. NC DIO/AIO multi purpose pin 11 KDOWN Digital output open drain 12 GNDP Supply pin 13 NC DIO/AIO multi purpose pin Test pin for fabrication. Connected to ground in the application board. 14 OUT DIO/AIO multi purpose pin Output pin. This pin is used for the analog output or digital PWM signal. In addition, this pin is used for programming of the device. Te 10 www.austriamicrosystems.com/AS5163 Additional output pin with Kick down functionality. This pin can be used for a compare function including a hysteresis. An open drain configuration is used. If the internal angle is above a programmable threshold, then the output is switched to low. Below the threshold the output is high using a pull-up resistor. Analog ground pin. Connected to ground in the application board. Revision 2.7 3 - 36 AS5163 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 5 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Min Max Units Comments VDD DC supply voltage at pin VDD Overvoltage -18 27 V No operation VOUT Output voltage OUT -0.3 27 V VKDOWN Output voltage KDOWN -0.3 27 V VDD3 DC supply voltage at pin VDD3 -0.3 5 V VDD5 DC supply voltage at pin VDD5 -0.3 7 V Iscr Input current (latchup immunity) -100 100 mA Electrostatic Discharge Electrostatic discharge ESD permanent Norm: JEDEC 78 am lc s on A te G nt st il Electrical Parameters al id Parameter lv Symbol 4 kV Norm: MIL 883 E method 3015 This value is applicable to pins VDD, GND, OUT, and KDOWN. All other pins 2 kV. +150 C Min -67F; Max +257F 260 C t=20 to 40s, The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020 "Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices". The lead finish for Pb-free leaded packages is matte tin (100% Sn). 85 % Temperature Ranges and Storage Conditions Storage temperature Tstrg TBody Body temperature (Lead-free package) H Humidity non-condensing 5 3 Represents a maximum floor life time of 168h Te ch ni ca Moisture Sensitive Level -55 www.austriamicrosystems.com/AS5163 Revision 2.7 4 - 36 AS5163 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics 6.1 Operating Conditions In this specification, all the defined tolerances for external components need to be assured over the whole operation conditions range and also over lifetime. Table 3. Operating Conditions Parameter Conditions Min TAMB Ambient temperature -40F...+302F -40 Isupp Supply current Lowest magnetic input field Typ Max Units +150 C 20 mA lv Symbol al id TAMB = -40 to +150C, VDD = +4.5V to +5.5V, CLREG5 = 2.2F, CLREG3 = 2.2F, RPU = 1K, RPD = 1K to 5.6K (Analog only), CLOAD = 0 to 42nF, RPUKDWN = 1K to 5.6K, CLOAD_KDWN = 0 to 42nF, unless otherwise specified. A positive current is intended to flow into the pin. 6.2 Magnetic Input Specification am lc s on A te G nt st il TAMB = -40 to +150C, VDD = 4.5 to 5.5V (5V operation), unless otherwise noted. Two-pole cylindrical diametrically magnetized source: Table 4. Magnetic Input Specification Parameter Conditions Min Bpk Magnetic input field amplitude Required vertical component of the magnetic field strength on the die's surface, measured along a concentric circle with a radius of 1.1mm 30 Boff Magnetic offset Field non-linearity Typ Max Units 70 mT Constant magnetic stray field 10 mT Including offset gradient 5 % Te ch ni ca Symbol www.austriamicrosystems.com/AS5163 Revision 2.7 5 - 36 AS5163 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.3 Electrical System Specifications TAMB = -40 to +150C, VDD = 4.5 - 5.5V (5V operation), Magnetic Input Specification, unless otherwise noted. Table 5. Electrical System Specifications Parameter Conditions RES Resolution Analog and PWM Output INLopt INLtemp Max Units Angular operating range 90C 12 bit Integral non-linearity (optimum) 360 degree full turn Maximum error with respect to the best line fit. Centered magnet without calibration, TAMB=25C 0.5 deg Integral non-linearity (optimum) 360 degree full turn Maximum error with respect to the best line fit. Centered magnet without calibration, TAMB = -40 to +150C 0.9 deg Typ lv Best line fit = (Errmax - Errmin) / 2 Over displacement tolerance with 6mm diameter magnet, without calibration, TAMB = -40 to +150C. Note: This parameter is a system parameter and is dependant on the selected magnet. 1.4 deg am lc s on A te G nt st il Integral non-linearity 360 degree full turn INL Min al id Symbol 1 sigma; Note: The noise performance is dependent on the programming of the output characteristic. Deg RMS TN Transition noise VDD5LowTH Undervoltage lower threshold VDD5HighTH Undervoltage higher threshold tPwrUp Power-up time Fast mode, times 2 in slow mode 10 ms tdelay System propagation delay absolute output: delay of ADC, DSP and absolute interface Fast mode, times 2 in slow mode 100 s VDD5 = 5V 0.06 3.1 3.4 3.7 3.6 3.9 4.2 V Note: The INL performance is specified over the full turn of 360 degrees. An operation in an angle segment increases the accuracy. A two point linearization is recommended to achieve the best INL performance for the chosen angle segment. 6.4 Timing Characteristics ca Table 6. Timing Conditions Symbol Parameter TCLK Interface Clock Time TCLK = 1/ FRCOT WatchDog error detection time Min Typ Max Units 4.05 4.5 4.95 MHz 202 222.2 247 ns 12 ms Te ch TDETWD Internal Master Clock ni FRCOT Conditions www.austriamicrosystems.com/AS5163 Revision 2.7 6 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7 Detailed Description The AS5163 is manufactured in a CMOS process and uses a spinning current Hall technology for sensing the magnetic field distribution across the surface of the chip. The integrated Hall elements are placed around the center of the device and deliver a voltage representation of the magnetic field at the surface of the IC. al id Through Sigma-Delta Analog / Digital Conversion and Digital Signal-Processing (DSP) algorithms, the AS5163 provides accurate high-resolution absolute angular position information. For this purpose, a Coordinate Rotation Digital Computer (CORDIC) calculates the angle and the magnitude of the Hall array signals. The DSP is also used to provide digital information at the outputs that indicate movements of the used magnet towards or away from the device's surface. A small low cost diametrically magnetized (two-pole) standard magnet provides the angular position information. lv The AS5163 senses the orientation of the magnetic field and calculates a 14-bit binary code. This code is mapped to a programmable output characteristic. The type of output is programmable and can be selected as PWM or analog output. This signal is available at the pin 14 (OUT). am lc s on A te G nt st il The analog and PWM output can be configured in many ways. The application angular region can be programmed in a user friendly way. The start angle position T1 and the end point T2 can be set and programmed according to the mechanical range of the application with a resolution of 14 bits. In addition, the T1Y and T2Y parameter can be set and programmed according to the application. The transition point 0 to 360 degree can be shifted using the break point parameter BP. This point is programmable with a high resolution of 14 bits of 360 degrees. The voltage for clamping level low CLL and clamping level high CLH can be programmed with a resolution of 7 bits. Both levels are individually adjustable. These parameters are also used to adjust the PWM duty cycle. The AS5163 also provides a compare function. The internal angular code is compared to a programmable level using hysteresis. The function is available over the output pin 11 (KDOWN). The output parameters can be programmed in an OTP register. No additional voltage is required to program the AS5163. The setting may be overwritten at any time and will be reset to default when power is cycled. To make the setting permanent, the OTP register must be programmed by using a lock bit. Else, the content could be frozen for ever. The AS5163 is tolerant to magnet misalignment and unwanted external magnetic fields due to differential measurement technique and Hall sensor conditioning circuitry. Te ch ni ca Figure 3. Typical Arrangement of AS5163 and Magnet www.austriamicrosystems.com/AS5163 Revision 2.7 7 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.1 Operation The AS5163 operates at 5V 10%, using two internal Low-Dropout (LDO) voltage regulators. For operation, the 5V supply is connected to pin VDD. While VDD3 and VDD5 (LDO outputs) must be buffered by 2.2F capacitors, the VDD requires a 1F capacitor. All capacitors (low ESR ceramic) are supposed to be placed close to the supply pins (see Figure 4). The VDD3 and VDD5 outputs are intended for internal use only. It must not be loaded with an external load. al id Figure 4. Connections for 5V Supply Voltages 2.2F VDD 5 lv 5V Operation 2.2 F VDD 3 am lc s on A te G nt st il 1F VDD LDO LDO Internal VDD 4. 5 V Internal VDD 3.45V 4. 5 - 5.5V GND Notes: VDD Voltage Monitor ch 7.1.1 ni ca 1. The pins VDD3 and VDD5 must always be buffered by a capacitor. These pins must not be left floating, as this may cause unstable internal supply voltages, which may lead to larger output jitter of the measured angle. 2. Only VDD is overvoltage protected up to 27V. In addition, the VDD has a reverse polarity protection. VDD Overvoltage Management. If the voltage applied to the VDD pin exceeds the overvoltage upper threshold for longer than the detection Te time, then the device enters a low power mode reducing the power consumption. When the overvoltage event has passed and the voltage applied to the VDD pin falls below the overvoltage lower threshold for longer than the recovery time, then the device enters the normal mode. VDD5 Undervoltage Management. When the voltage applied to the VDD5 pin falls below the undervoltage lower threshold for longer than the VDD5_detection time, then the device stops the clock of the digital part and the output drivers are turned off to reduce the power consumption. When the voltage applied to the VDD5 pin exceeds the VDD5 undervoltage upper threshold for longer than the VDD5_recovery time, then the clock is restarted and the output drivers are turned on. www.austriamicrosystems.com/AS5163 Revision 2.7 8 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2 Analog Output The reference voltage for the Digital-to-Analog converter (DAC) is taken internally from VDD. In this mode, the output voltage is ratiometric to the supply voltage. 7.2.1 Programming Parameters Mechanical angle start point T2 Mechanical angle end point T1Y Voltage level at the T1 position T2Y Voltage level at the T2 position Clamping Level Low Clamping Level High BP Break point (transition point 0 to 360 degree) am lc s on A te G nt st il CLL CLH lv T1 al id The Analog output voltage modes are programmable by OTP. Depending on the application, the analog output can be adjusted. The user can program the following application specific parameters: The above listed parameters are input parameters. Over the provided programming software and programmer, these parameters are converted and finally written into the AS5163 128-bit OTP memory. 7.2.2 Application Specific Angular Range Programming The application range can be selected by programming T1 with a related T1Y and T2 with a related T2Y into the AS5163. The internal gain factor is calculated automatically. The clamping levels CLL and CLH can be programmed independent from the T1 and T2 position and both levels can be separately adjusted. Figure 5. Programming of an Individual Application Range Application range 90 degree electrical range T2 mechanical range T1 100%VDD clamping range high CLH 180 degree ca CLL 0 degree ni CLH T1Y BP CLL 0 clamping range low T1 T2 ch 270 degree T2Y Te Figure 5 shows a simple example of the selection of the range. The mechanical starting point T1 and the mechanical end point T2 define the mechanical range. A sub range of the internal Cordic output range is used and mapped to the needed output characteristic. The analog output signal has 12 bit, hence the level T1Y and T2Y can be adjusted with this resolution. As a result of this level and the calculated slope the clamping region low is defined. The break point BP defines the transition between CLL and CLH. In this example, the BP is set to 0 degree. The BP is also the end point of the clamping level high CLH. This range is defined by the level CLH and the calculated slope. Both clamping levels can be set independently form each other. The minimum application range is 10 degrees. www.austriamicrosystems.com/AS5163 Revision 2.7 9 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2.3 Application Specific Programming of the Break Point The break point BP can be programmed as well with a resolution of 14 bits. This is important when the default transition point is inside the application range. In such a case, the default transition point must be shifted out of the application range. The parameter BP defines the new position. The function can be used also for an on-off indication. Application range 90 degree electrical range T2 mechanical range T1 100%VDD CLH T2Y am lc s on A te G nt st il 180 degree T1Y CLL CLL BP 0 270 degree 7.2.4 clamping range high lv CLH 0 degree al id Figure 6. Individual Programming of the Break Point BP Full Scale Mode clamping range low T1 T2 clamping range low The AS5163 can be programmed as well in the full scale mode. The BP parameter defines the position of the transition. Figure 7. Full Scale Mode 0 360 Te ch ni Analog output Voltage ca 100 % VDD For simplification, Figure 7 describes a linear output voltage from rail to rail (0V to VDD) over the complete rotation range. In practice, this is not feasible due to saturation effects of the output stage transistors. The actual curve will be rounded towards the supply rails (as indicated Figure 7). www.austriamicrosystems.com/AS5163 Revision 2.7 10 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2.5 Resolution of the Parameters The programming parameters have a wide resolution of up to 14 bits. Table 7. Resolution of the Programming Parameters Parameter Resolution T1 Mechanical angle start point 14 bits T2 Mechanical angle stop point 14 bits T1Y Mechanical start voltage level 12 bits T2Y Mechanical stop voltage level 12 bits CLL Clamping level low 7 bits 4096 LSBs is the maximum level CLH Clamping level high 7 bits 31 LSBs is the minimum level BP Break point 14 bits lv am lc s on A te G nt st il Figure 8. Overview of the Angular Output Voltage Note al id Symbol 100 96 Failure Band High Clamping Region High T2Y Application Region ca Output Voltage in percent of VDD CLH ni T1Y 4 0 Clamping Region Low Failure Band Low Te ch CLL Figure 8 gives an overview of the different ranges. The failure bands are used to indicate a wrong operation of the AS5163. This can be caused due to a broken supply line. By using the specified load resistors, the output level will remain in these bands during a fail. It is recommended to set the clamping level CLL above the lower failure band and the clamping level CLH below the higher failure band. www.austriamicrosystems.com/AS5163 Revision 2.7 11 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2.6 Analog Output Diagnostic Mode Due to the low pin count in the application, a wrong operation must be indicated by the output pin OUT. This could be realized using the failure bands. The failure band is defined with a fixed level. The failure band low is specified from 0% to 4% of the supply range. The failure band high is defined from 100% to 96%. Several failures can happen during operation. The output signal remains in these bands over the specified operating and load conditions. All the different failures can be grouped into the internal alarms (failures) and the application related failures. CLOAD 42 nF, RPU= 2k...5.6k al id RPD= 2k...5.6k load pull-up Table 8. Different Failure Cases of AS5163 Failure Mode Symbol Failure Band Note MAGRng High/Low Could be switched off by one OTP bit ALARM_DISABLE. Programmable by OTP bit DIAG_HIGH Cordic overflow COF High/Low Programmable by OTP bit DIAG_HIGH Offset compensation finished OCF High/Low Programmable by OTP bit DIAG_HIGH Watchdog fail WDF High/Low Programmable by OTP bit DIAG_HIGH Oscillator fail OF High/Low Programmable by OTP bit DIAG_HIGH Overvoltage condition OV High/Low Dependant on the load resistor Pull up failure band high Pull down failure band low High/Low Switch off short circuit dependent Internal alarms (failures) Application related failures am lc s on A te G nt st il Out of magnetic range (too less or too high magnetic input) lv Type Broken VDD BVDD Broken VSS BVSS Short circuit output SCO For efficient use of diagnostics, it is recommended to program to clamping levels CLL and CLH. 7.2.7 Analog Output Driver Parameters The output stage is configured in a push-pull output. Therefore it is possible to sink and source currents. CLOAD 42 nF, RPU= 2k...5.6k RPD= 2k...5.6k load pull-up Table 9. General Parameters for the Output Driver Parameter Min Typ Max Unit Note Short circuit output current (low side driver) 8 32 mA VOUT=27V IOUTSCH Short circuit output current (high side driver) -8 -32 mA VOUT=0V TSCDET Short circuit detection time 20 600 s output stage turned off Short circuit recovery time 2 20 ms output stage turned on Output Leakage current -20 20 A VOUT=VDD=5V TSCREC ch ILEAKOUT ni IOUTSCL ca Symbol Output voltage broken GND with pull-up 96 100 %VDD RPU = 2k...5.6k BGNDPD Output voltage broken GND with pull-down 0 4 %VDD RPD = 2k...5.6k BVDDPU Output voltage broken VDD with pull-up 96 100 %VDD RPU = 2k...5.6k BVDDPD Output voltage broken VDD with pull-down 0 4 %VDD RPD = 2k...5.6k Te BGNDPU Note: A Pull-Up/Down load is up to 1k with increased diagnostic bands from 0%-6% and 94%-100%. www.austriamicrosystems.com/AS5163 Revision 2.7 12 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n Table 10. Electrical Parameters for the Analog Output Stage Min Output Voltage Range VOUTINL Output Integral nonlinearity VOUTDNL Output Differential nonlinearity VOUTOFF Output Offset VOUTUD Update rate of the Output VOUTSTEP Output Step Response VOUTDRIFT Output Voltage Temperature drift VOUTRATE Output ratiometricity error Max 4 96 6 94 Unit % VDD Note Valid when 1k RLOAD < 2k 10 LSB -10 10 LSB -50 50 mV At 2048 LSB level s Info parameter 550 s Between 10% and 90%, RPU/RPD =1k, CLOAD=1nF; VDD=5V 2 2 % Of value at mid code -1.5 1.5 %VDD 100 al id VOUT Typ lv Parameter 0.04*VDD VOUT 0.96*VDD am lc s on A te G nt st il Symbol 1 VOUTNOISE 10 Noise mVpp 1Hz...30kHz; at 2048 LSB level 1. Not tested in production; characterization only. 7.3 Pulse Width Modulation (PWM) Output The AS5163 provides a pulse width modulated output (PWM), whose duty cycle is proportional to the measured angle. This output format is selectable over the OTP memory OP_MODE(0) bit. If output pin OUT is configured as open drain configuration, then an external load resistor (pull up) is required. The PWM frequency is internally trimmed to an accuracy of 10% over full temperature range. This tolerance can be cancelled by measuring the ratio between the on and off state. In addition, the programmed clamping levels CLL and CLH will also adjust the PWM signal characteristic. Figure 9. PWM Output Signal ca PWmax PWmin Position 0 ni Position 1 ch Position 4094 Te Position 4095 www.austriamicrosystems.com/AS5163 TPWM = 1/fPWM Revision 2.7 13 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n The PWM frequency can be programmed by the OTP bits PWM_frequency (1:0). Therefore, four different frequencies are possible. Table 11. PWM Signal Parameters Parameter Min Typ Max Unit Note fPWM1 PWM frequency1 123.60 137.33 151.06 Hz PWM_frequency (1:0) = "00" fPWM2 PWM frequency2 247.19 274.66 302.13 Hz PWM_frequency (1:0) = "01" fPWM3 PWM frequency3 494.39 549.32 604.25 Hz PWM_frequency (1:0) = "10" fPWM4 PWM frequency4 988.77 1098.63 1208.50 Hz PWM_frequency (1:0) = "11" PWMIN MIN pulse width (1+1)*1/ fPWM s PWMAX MAX pulse width (1+4094)*1/ fPWM ms lv al id Symbol am lc s on A te G nt st il Taking into consideration the AC characteristic of the PWM output including load, it is recommended to use the clamping function. The recommended range is 0% to 4% and 96% to 100%. Table 12. Electrical Parameters for the PWM Output Mode Symbol Parameter Min PWMVOL Output voltage low ILEAK Typ Max Unit 0 0.4 V IOUT=8mA Output leakage -20 20 A VOUT=VDD=5V PWMDC PWM duty cycle range 4 96 % PWMSRF PWM slew rate 1 4 V/s 2 Note Between 75% and 25% RPU/RPD = 1k, CLOAD = 1nF, VDD = 5V 7.4 Kick Down Function The AS5163 provides a special compare function. This function is implemented using a programmable angle value with a programmable hysteresis. It will be indicated over the open drain output pin KDOWN. If the actual angle is above the programmable value plus the hysteresis, the output is switched to low. The output will remain at low level until the value KD is reached in the reverse direction. KDHYS ni ca Figure 10. Kick Down Hysteresis Implementation Te ch KDOWN www.austriamicrosystems.com/AS5163 KD(5:0)+KDHYS KD(5:0) Revision 2.7 14 - 36 AS5163 Datasheet - D e t a i l e d D e s c r i p t i o n Table 13. Programming Parameters for the Kick Down Function Resolution KD Kick Down angle 6 bits KDHYS Kick Down Hysteresis 2 bits Note KDHYS (1:0) = "00" 8 LSB hysteresis KDHYS (1:0) = "01" 16 LSB hysteresis KDHYS (1:0) = "10" 32 LSB hysteresis KDHYS (1:0) = "11" 64 LSB hysteresis al id Parameter Pull-up resistance 1k to 5.6K to VDD CLOAD max 42nF Table 14. Electrical Parameters of the KDOWN Output Parameter Min IKDSC Short circuit output current (Low Side Driver) TSCDET Typ Max Unit Note 6 24 mA VKDOWN = 27V Short circuit detection time 20 600 s output stage turned off TSCREC Short circuit recovery time 2 20 ms output stage turned on KDVOL Output voltage low 0 1.1 V IKDOWN = 6mA Output leakage -20 20 A VKDOWN = 5V am lc s on A te G nt st il Symbol lv Symbol KDILEAK KDOWN slew rate (falling edge) 1 2 4 V/s Te ch ni ca KDSRF Between 75% and 25%, RPUKDWN = 1k, CLOAD_KDWN = 1nF, VDD = 5V www.austriamicrosystems.com/AS5163 Revision 2.7 15 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8 Application Information The benefits of AS5163 are as follows: Unique fully differential patented solution Best protection for automotive applications Easy to program Ideal for applications in harsh environments due to contactless position sensing Robust system, tolerant to magnet misalignment, airgap variations, temperature variations and external magnetic fields No calibration required because of inherent accuracy High driving capability of analog output (including diagnostics) lv 8.1 Programming the AS5163 al id Flexible interface selection PWM, analog output The AS5163 programming is a one-time-programming (OTP) method, based on polysilicon fuses. The advantage of this method is that no additional programming voltage is needed. The internal LDO provides the current for programming. am lc s on A te G nt st il The OTP consists of 128 bits, wherein several bits are available for user programming. In addition, factory settings are stored in the OTP memory. Both regions are independently lockable by built-in lock bits. A single OTP cell can be programmed only once. By default, each cell is "0"; a programmed cell will contain a "1". While it is not possible to reset a programmed bit from "1" to "0", multiple OTP writes are possible, as long as only unprogrammed "0"-bits are programmed to "1". Independent of the OTP programming, it is possible to overwrite the OTP register temporarily with an OTP write command. This is possible only if the user lock bit is not programmed. Due to the programming over the output pin, the device will initially start in the communication mode. In this mode, the digital angle value can be read with a specific protocol format. It is a bidirectional communication possible. Parameters can be written into the device. A programming of the device is triggered by a specific command. With another command (pass2funcion), the device can be switched into operation mode (analog or PWM output). In case of a programmed user lock bit, the AS5163 automatically starts up in the functional operation mode. No communication of the specific protocol is possible after this. 8.1.1 Hardware Setup The pin OUT and the supply connection are required for OTP memory access. Without the programmed Mem_Lock_USER OTP bit, the device will start up in the communication mode and will remain into an IDLE operation mode. The pull up resistor RCommunication is required during startup. Figure 1 shows the configuration of an AS5163. ca Figure 11. Programming Schematic of the AS5163 SENSOR PCB VDD ni VDD 1F Te ch AS5163 2.2F (low ESR) VDD5 VDD3 2.2F (low ESR) 0.3 ohm VDD Programmer RCommunication OUT DIO KDOWN GNDA GNDD GNDP GND www.austriamicrosystems.com/AS5163 GND Revision 2.7 16 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.2 Protocol Timing and Commands of Single Pin Interface During the communication mode, the output level is defined by the external pull up resistor RCommunication. The output driver of the device is in tristate. The bit coding (see Figure 18) has been chosen in order to allow the continuous synchronization during the communication, which can be required due to the tolerance of the internal clock frequency. Figure 18 shows how the different logic states '0' and '1' are defined. The period of the clock TCLK is defined with 222.2 ns. The voltage levels VH and VL are CMOS typical. lv al id Each frame is composed by 20 bits. The 4 MSB (CMD) of the frame specifies the type of command that is passed to the AS5163. The 16 data bits contain the communication data. There will be no operation when the `not specified' CMD is used. The sequence is oriented in such a way that the LSB of the data is followed by the command. The number of frames vary depending on the command. The single pin programming interface block of the AS5163 can operate in slave communication or master communication mode. In the slave communication mode, the AS5163 receives the data organized in frames. The programming tool is the driver of the single communication line and can pull down the level. In case of the master communication mode, the AS5163 transmits data in the frame format. The single communication line can be pulled down by the AS5163. am lc s on A te G nt st il Figure 12. Bit Coding of the Single Pin Programming Interface Bit "0" Bit "1" VH VH VL VL T1 T1 T2 T1 = 128 * TCLK T2 TBIT = T1 + T2 = 512 * TCLK T2 = 384 * TCLK ch ni ca Figure 13. Protocol Definition IDLE START IDLE PACKET COMMAND Te DATA START www.austriamicrosystems.com/AS5163 Revision 2.7 17 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 15. OTP Commands and Communication Interface Modes Description AS5163 Communication Mode Command CMD Number of Frames UNBLOCK Resets the interface SLAVE 0x0 1 WRITE128 Writes 128 bits (user + factory settings) into the device SLAVE 0x9 (0x1) 8 READ128 Reads 128 bits (user + factory settings) from the device SLAVE and MASTER 0xA Transfers the register content into the OTP memory SLAVE 0x6 Transfers the OTP content to the register content SLAVE 0x5 FUSE Command for permanent programming SLAVE 0x4 PASS2FUNC Change operation mode from communication to operation SLAVE READ Read related to address the user data SLAVE and MASTER WRITE Write related to address the user data SLAVE 9 1 1 1 lv UPLOAD DOWNLOAD al id Possible Interface Commands 1 2 0xC 1 am lc s on A te G nt st il 0x7 0xB Note: Other commands are reserved and shall not be used. When single pin programming interface bus is in high impedance state, the logical level of the bus is held by the pull up resistor RCommunication. Each communication begins by a condition of the bus level which is called START. This is done by forcing the bus in logical low level (done by the programmer or AS5163 depending on the communication mode). Afterwards the bit information of the command is transmitted as shown in Figure 14. DATA14 MSB LSB DATA2 1 0 0 1 MSB MSB LSB LSB DATA3 MSB LSB MSB DATA0 MSB LSB DATA1 LSB LSB START IDLE MSB Figure 14. Bus Timing for the WRITE128 Command 1 0 0 0 1 0 0 0 ca 20*TBIT Te 0 1 0 1 IDLE 0 0 0 P DATA3 DATA14 MSB LSB DATA0 MSB DATA1 MSB LSB LSB DO NOT CARE MSB LSB START IDLE DO NOT CARE MSB LSB MSB LSB ch ni Figure 15. Bus Timing for the READ128 Command 0 0 0 P 20*TBIT Slave Communication Mode www.austriamicrosystems.com/AS5163 Master Communication Mode TSW Revision 2.7 18 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n In case of READ or READ128 command (see Figure 15) the idle phase between the command and the answer is 10 TBIT (TSW). DATA0 IDLE 0 0 0 P al id 0 1 0 1 20*TBIT Slave Communication Mode MSB LSB DATA1 MSB LSB MSB ADDR1 MSB LSB MSB ADDR2 LSB START IDLE LSB Figure 16. Bus Timing for the READ Commands Master Communication Mode am lc s on A te G nt st il lv TSW In case of a WRITE command, the device stays in slave communication mode and will not switch to master communication mode. When using other commands like DOWNLOAD, UPLOAD, etc. instead of READ or WRITE, it does not matter what is written in the address fields (ADDR1, ADDR2). 8.1.3 UNBLOCK The Unblock command can be used to reset only the one-wire interface of the AS5163 in order to recover the possibility to communicate again without the need of a POR after a stacking event due to noise on the bus line or misalignment with the AS5163 protocol. The command is composed by a not idle phase of at least 6 TBIT followed by a packet with all 20 bits at zero (see Figure 17). Figure 17. Unblock Sequence VH NOT IDLE IDLE START = 6 * TBIT => 3072* TCLK = 512*TCLK = 512*TCLK PACKET[19:0] = 0x00000 20*TBIT => 10240*TCLK IDLE = 512*TCLK ca VL Te ch ni COMMAND FROM EXT MASTER www.austriamicrosystems.com/AS5163 Revision 2.7 19 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.4 WRITE128 Figure 18 illustrates the format of the frame and the command. Figure 18. Frame Organization of the WRITE128 Command DATA0 MSB LSB LSB CMD MSB LSB 1 DATA3 DATA2 MSB LSB LSB LSB DATA4 MSB MSB 0 0 MSB LSB 1 DATA7 DATA6 MSB LSB LSB DATA8 MSB LSB DATA10 MSB LSB DATA12 LSB LSB ca MSB DATA14 LSB 0 0 MSB 0 0 0 MSB 0 0 0 MSB 0 CMD MSB LSB 1 MSB 0 0 0 ch ni 0 LSB 1 LSB MSB CMD MSB DATA15 0 LSB 1 MSB 0 CMD MSB DATA13 0 LSB 1 LSB MSB CMD MSB DATA11 0 LSB 1 LSB 0 CMD MSB DATA9 0 CMD am lc s on A te G nt st il LSB 1 lv 1 LSB 0 CMD MSB DATA5 MSB 0 al id DATA1 Te The command contains 8 frames. With this command, the AS5163 receives only frames. This command will transfer the data in the special function registers (SFRs) of the device. The data is not permanent programmed using this command. Table 16 describe the organization of the OTP data bits. The access is performed with CMD field set to 0x9. The next 7 frames with CMD field set to 0x1. The 2 bytes of the first command will be written at address 0 and 1 of the SFRs; the 2 bytes of the second command will be written at address 2 and 3; and so on, in order to cover all the 16 bytes of the 128 SFRs. Note: It is important to always complete the command. All 8 frames are needed. In case of a wrong command or a communication error, a power on reset must be performed. The device will be delivered with the programmed Mem_Lock_AMS OTP bit. This bit locks the content of the factory settings. It is impossible to overwrite this particular region. The written information will be ignored. www.austriamicrosystems.com/AS5163 Revision 2.7 20 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.5 READ128 Figure 19 illustrates the format of the frame and the command. Figure 19. Frame Organization of the READ128 Command DO NOT CARE MSB LSB LSB CMD MSB LSB 0 DATA1 DATA0 MSB LSB LSB MSB DATA2 0 0 MSB 0 DATA5 DATA4 MSB LSB LSB DATA8 LSB ca LSB 0 0 ni ch P 0 0 P 0 0 P MSB DATA14 LSB 0 0 P CMD DUMMY MSB 0 0 0 P Te MSB 0 CMD DUMMY DATA12 LSB DATA15 LSB 0 MSB DATA13 LSB P CMD DUMMY DATA10 MSB 0 MSB DATA11 MSB 0 CMD DUMMY 0 LSB P MSB DATA9 MSB 0 CMD DUMMY DATA6 LSB 0 LSB 0 MSB DATA7 LSB P CMD DUMMY 0 MSB 1 CMD DUMMY am lc s on A te G nt st il LSB 0 lv DATA3 MSB 1 CMD DUMMY 0 LSB MSB al id DO NOT CARE The command is composed by a first frame transmitted to the AS5163. The device is in slave communication mode. The device remains for the time TSWITCH in IDLE mode before changing into the master communication mode. The AS5163 starts to send 8 frames. This command will read the SFRs. The numbering of the data bytes correlates with the address of the related SFR. An even parity bit is used to guarantee a correct data transmission. Each parity (P) is related to the frame data content of the 16 bit word. The MSB of the CMD dummy (P) is reserved for the parity information. www.austriamicrosystems.com/AS5163 Revision 2.7 21 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.6 DOWNLOAD Figure 20 shows the format of the frame. Figure 20. Frame Organization of the DOWNLOAD Command DO NOT CARE MSB LSB LSB CMD MSB LSB MSB 0 1 0 lv 1 al id DO NOT CARE The command consists of one frame received by the AS5163 (slave communication mode). The OTP cell fuse content will be downloaded into the SFRs. 8.1.7 UPLOAD am lc s on A te G nt st il The access is performed with CMD field set to 0x5. Figure 21 shows the format of the frame. Figure 21. Frame Organization of the UPLOAD Command DO NOT CARE DO NOT CARE MSB LSB LSB CMD MSB LSB 0 1 1 MSB 0 The command consists of one frame received by the AS5163 (slave communication mode) and transfers the data from the SFRs into the OTP fuse cells. The OTP fuses are not permanent programmed using this command. The access is performed with CMD field set to 0x6. 8.1.8 FUSE ca Figure 22 shows the format of the frame. ni Figure 22. Frame Organization of the FUSE Command ch DO NOT CARE MSB LSB CMD MSB LSB 0 MSB 0 1 0 Te LSB DO NOT CARE The command consists of one frame received by the AS5163 (slave communication mode) and it is giving the trigger to permanent program the non volatile fuse elements. The access is performed with CMD field set to 0x4. Note: After this command, the device automatically starts to program the built-in programming procedure. It is not allowed to send other commands during this programming time. This time is specified to 4ms after the last CMD bit. www.austriamicrosystems.com/AS5163 Revision 2.7 22 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.9 PASS2FUNC Figure 23 shows the format of the frame. DO NOT CARE DO NOT CARE MSB LSB LSB al id Figure 23. Frame Organization of the PASS2FUNCTION Command CMD MSB LSB MSB 1 1 0 am lc s on A te G nt st il lv 1 The command consists of one frame received by the AS5163 (slave communication mode). This command stops the communication receiving mode, releases the reset of the DSP of the AS5163 device and starts to work in functional mode with the values of the SFR currently written. The access is performed with CMD field set to 0x7. 8.1.10 READ Figure 24 shows the format of the frame. Figure 24. Frame Organization of the READ Command ADDR2 ADDR1 MSB LSB LSB CMD MSB LSB 1 DATA2 DATA1 MSB LSB 0 MSB 1 CMD DUMMY MSB 0 0 0 P ch ni ca LSB 1 The command is composed by a first frame sent to the AS5163. The device is in slave communication mode. The device remains for the time TSWITCH in IDLE mode before changing into the master communication mode. The AS5163 starts to send the second frame transmitted by the AS5163. Te The access is performed with CMD field set to 0xB. When the AS5163 receives the first frame, it sends a frame with data value of the address specified in the field of the first frame. Table 17 shows the possible readable data information for the AS5163 device. An even parity bit is used to guarantee a correct data transmission. The parity bit (P) is generated by the 16 data bits. The MSB of the CMD dummy (P) is reserved for the parity information. www.austriamicrosystems.com/AS5163 Revision 2.7 23 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.11 WRITE Figure 25 shows the format of the frame. DATA ADDR MSB LSB LSB al id Figure 25. Frame Organization of the WRITE Command CMD MSB LSB MSB 0 1 1 am lc s on A te G nt st il lv 0 The command consists of one frame received by the AS5163 (slave communication mode). The data byte will be written to the address. The access is performed with CMD field set to 0xC. Table 17 shows the possible write data information for the AS5163 device. Te ch ni ca Note: It is not recommended to access OTP memory addresses using this command. www.austriamicrosystems.com/AS5163 Revision 2.7 24 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.2 OTP Programming Data Table 16. OTP Data Organization 0 AMS_Test FS 1 AMS_Test FS 2 AMS_Test FS 3 AMS_Test FS 4 AMS_Test FS 5 AMS_Test FS 6 AMS_Test FS 7 AMS_Test FS 0 AMS_Test FS 1 AMS_Test FS 2 AMS_Test FS 3 AMS_Test FS 4 ChipID<0> FS 5 ChipID<1> FS 6 ChipID<2> FS 7 ChipID<3> FS 0 ChipID<4> FS 1 ChipID<5> FS 2 ChipID<6> FS 3 ChipID<7> FS 4 ChipID<8> FS 5 ChipID<9> FS 6 ChipID<10> FS 7 ChipID<11> FS DATA14 (0x0E) ca DATA13 (0x0D) ChipID<12> FS 1 ChipID<13> FS 2 ChipID<14> FS 3 ChipID<15> FS 4 ChipID<16> FS 5 ChipID<17> FS 6 ChipID<18> FS 7 ChipID<19> FS ni 0 Te ch DATA12 (0x0C) Description AMS Test Area al id Default www.austriamicrosystems.com/AS5163 Revision 2.7 Factory Settings Symbol am lc s on A te G nt st il DATA15 (0x0F) Bit Number lv Data Byte Chip ID 25 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 16. OTP Data Organization Default Description 0 ChipID<20> FS Chip ID 1 MemLock_AMS 1 Lock of the Factory Setting Area 2 KD<0> 0 3 KD<1> 0 4 KD<2> 0 5 KD<3> 0 6 KD<4> 0 7 KD<5> 0 0 ClampLow<0> 0 1 ClampLow<1> 0 2 ClampLow<2> 0 DATA10 (0x0A) ClampLow<3> 0 4 ClampLow<4> 0 5 ClampLow<5> 0 6 ClampLow<6> 0 7 DAC_MODE 0 0 ClampHi<0> 0 1 ClampHi<1> 0 2 ClampHi<2> 0 3 ClampHi<3> 0 4 ClampHi<4> 0 5 ClampHi<5> 0 6 ClampHi<6> 0 7 DIAG_HIGH 0 0 OffsetIn<0> 0 1 OffsetIn<1> 0 2 OffsetIn<2> 0 3 OffsetIn<3> 0 4 OffsetIn<4> 0 5 OffsetIn<5> 0 6 OffsetIn<6> 0 7 OffsetIn<7> 0 Clamping Level Low DAC12/DAC10 Mode Clamping Level High Diagnostic Mode, default=0 for Failure Band Low Offset Te ch ni ca 3 Customer Settings DATA9 (0x09) DATA8 (0x08) Kick Down Threshold al id Symbol am lc s on A te G nt st il DATA11 (0x0B) Bit Number lv Data Byte www.austriamicrosystems.com/AS5163 Revision 2.7 26 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 16. OTP Data Organization DATA6 (0x06) 0 OffsetIn<8> 0 1 OffsetIn<9> 0 2 OffsetIn<10> 0 3 OffsetIn<11> 0 4 OffsetIn<12> 0 5 OffsetIn<13> 0 6 OP_Mode<0> 0 7 OP_Mode<1> 0 0 OffsetOut<0> 0 1 OffsetOut<1> 0 2 OffsetOut<2> 0 Description Offset al id Default Selection of Analog=`00' or PWM Mode=`01' OffsetOut<3> 0 4 OffsetOut<4> 0 5 OffsetOut<5> 0 6 OffsetOut<6> 0 7 OffsetOut<7> 0 0 OffsetOut<8> 0 1 OffsetOut<9> 0 2 OffsetOut<10> 0 3 OffsetOut<11> 0 4 KDHYS<0> 0 5 KDHYS<1> 0 6 PWM Frequency<0> 0 7 PWM Frequency<1> 0 0 BP<0> 0 ca 3 BP<1> 0 2 BP<2> 0 3 BP<3> 0 4 BP<4> 0 5 BP<5> 0 6 BP<6> 0 7 BP<7> 0 Kick Down Hysteresis Select the PWM frequency (4 frequencies) Break Point Te ch ni 1 Output Offset Customer Settings DATA5 (0x05) DATA4 (0x04) Symbol am lc s on A te G nt st il DATA7 (0x07) Bit Number lv Data Byte www.austriamicrosystems.com/AS5163 Revision 2.7 27 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 16. OTP Data Organization Symbol Default DATA2 (0x02) 0 BP<8> 0 1 BP<9> 0 2 BP<10> 0 3 BP<11> 0 4 BP<12> 0 5 BP<13> 0 6 FAST_SLOW 0 Output Data Rate 7 EXT_RANGE 0 Enables a wider z-Range 0 Gain<0> 0 1 Gain<1> 0 2 Gain<2> 0 al id Break Point Gain<3> 0 4 Gain<4> 0 5 Gain<5> 0 6 Gain<6> 0 7 Gain<7> 0 0 Gain<8> 0 1 Gain<9> 0 2 Gain<10> 0 3 Gain<11> 0 4 Gain<12> 0 5 Gain<13> 0 6 Invert_Slope 0 Clockwise /Counterclockwise rotation 7 Lock_OTPCUST 0 Customer Memory Lock 0 redundancy<0> 0 1 redundancy<1> 0 2 redundancy<2> 0 3 redundancy<3> 0 4 redundancy<4> 0 5 redundancy<5> 0 6 redundancy<6> 0 7 redundancy<7> 0 Gain Gain Redundancy Bits Te ch ni ca 3 Customer Settings DATA1 (0x01) DATA0 (0x00) Description am lc s on A te G nt st il DATA3 (0x03) Bit Number lv Data Byte Note: Factory settings (FS) are used for testing and programming at AMS. These settings are locked (only read access possible). www.austriamicrosystems.com/AS5163 Revision 2.7 28 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Data Content. Redundancy (7:0): For a better programming reliability, a redundancy is implemented. In case the programming of one bit fails, then this function can be used. With an address (7:0) one bit can be selected and programmed. Redundancy Code OTP Bit Selection none 1 OP_Mode<1> 2 DIAG_HIGH PWM Frequency<0> ClampHi<6> - ClampHi<0> 11 - 17 ClampLow<6> - ClampLow<0> 18 OP_Mode<0> 19 - 32 OffsetIn<13> - OffsetIn<0> 33 - 46 Gain<13> - Gain<0> am lc s on A te G nt st il 3 4 - 10 lv 0 al id Redundancy <7:0> in decimal 47 - 60 BP<13> - BP<0> 61 - 72 OffsetOut<11> - OffsetOut<0> 73 Invert_Slope 74 FAST_SLOW 75 EXT_RANGE 76 DAC_MODE 77 Lock_OTPCUST 78 - 83 KD<5> - KD<0> 84 - 85 KDHYS<1> - KDHYS<0> 86 PWM Frequency<1> Lock_OTPCUST = 1, locks the customer area in the OTP and the device is starting up from now on in operating mode. Invert_Slope = 1, inverts the output characteristic in analog output mode. Gain (7:0): With this value one can adjust the steepness of the output slope. EXT_RANGE = 1, provides a wider z-Range of the magnet by turning off the alarm function. ca FAST_SLOW = 1, improves the noise performance due to internal filtering. BP (13:0): The breakpoint can be set with resolution of 14 bit. PWM Frequency (1:0): Four different frequency settings are possible. Please refer to Table 11. ni KDHYS (1:0): Avoids flickering at the KDOWN output (pin 11). For settings, refer to Table 13. OffsetOut (11:0): Output characteristic parameter ch ANALOG_PWM = 1, selects the PWM output mode. OffsetIn (13:0): Output characteristic parameter DIAG_HIGH = 1: In case of an error, the signal goes into high failure-band. Te ClampHI (6:0): Sets the clamping level high with respect to VDD. DAC_MODE disables filter at DAC ClampLow (6:0): Sets the clamping level low with respect to VDD. KD (5:0): Sets the kick-down level with respect to VDD. www.austriamicrosystems.com/AS5163 Revision 2.7 29 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.2.1 Read / Write User Data Area Region Address Address R/W User Data Table 17. Read / Write Data 0x10 16 0x11 17 0 0 0x12 18 OCF COF 0x17 23 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CORDIC_OUT[7:0] CORDIC_OUT[13:8] 0 0 0 DSP_RES R1K_10K al id 0 AGC_VALUE[7:0] Read only lv Read and Write Data Content: Data only for read: am lc s on A te G nt st il CORDIC_OUT(13:0): 14-bit absolute angular position data. OCF (Offset Compensation Finished): logic high indicates the finished Offset Compensation Algorithm. As soon as this bit is set, the AS5163 has completed the startup and the data is valid. COF (Cordic Overflow): Logic high indicates an out of range error in the CORDIC part. When this bit is set, the CORDIC_OUT(13:0) data is invalid. The absolute output maintains the last valid angular value. This alarm may be resolved by bringing the magnet within the X-Y-Z tolerance limits. AGC_VALUE (7:0): magnetic field indication. Data for write and read: DSP_RES resets the DSP part of the AS5163 the default value is 0. This is active low. The interface is not affected by this reset. R1K_10K defines the threshold level for the OTP fuses. This bit can be changed for verification purpose. A verification of the programming of the fuses is possible. The verification is mandatory after programming. 8.2.2 Programming Procedure Note: After programming the OTP fuses, a verification is mandatory. The procedure described below must be strictly followed to ensure properly programmed OTP fuses. Pull-up / Pull-down on OUT pin ca VDD=5V Wait startup time, device enters communication mode Write128 command: The trimming bits are written in the SFR memory. ni Read128 command: The trimming bits are read back. Upload command: The SFR memory is transferred into the OTP RAM. ch Fuse command: The OTP RAM is written in the Poly Fuse cells. Wait fuse time (6 ms) Write command (R1K_10K=1): Poly Fuse cells are transferred into the RAM cells compared with 10K resistor. Te Download command: The OTP RAM is transferred into the SFR memory. Read128 command: The fused bits are read back. Write command (R1K_10K=0): Poly Fuse cells are transferred into the RAM cells compared with 1K resistor. Download command: The OTP RAM is transferred into the SFR memory. Read128 command: The fused bits are read back. Pass2Func command or POR: Go to Functional mode. For further information, please refer to Application Note AN5163-10 available at www.austriamicrosystems.com www.austriamicrosystems.com/AS5163 Revision 2.7 30 - 36 AS5163 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.2.3 Physical Placement of the Magnet The best linearity can be achieved by placing the center of the magnet exactly over the defined center of the chip as shown in Figure 26. Figure 26. Defined Chip Center and Magnet Displacement Radius 3.2mm al id 3.2mm lv 2.5mm 1 Defined center am lc s on A te G nt st il 2.5mm Rd Area of recommended maximum magnet misalignment 8.2.4 Magnet Placement The magnet's center axis should be aligned within a displacement radius Rd of 0.25mm (larger magnets allow more displacement) from the defined center of the IC. The magnet may be placed below or above the device. The distance should be chosen such that the magnetic field on the die surface is within the specified limits (see Figure 26). The typical distance "z" between the magnet and the package surface is 0.5mm to 1.5mm, provided the recommended magnet material and dimensions (6mm x 3mm) are used. Larger distances are possible, as long as, the required magnetic field strength stays within the defined limits. However, a magnetic field outside the specified range may still produce usable results, but the out-of-range condition will be indicated by an alarm forcing the output into the failure band. N S Package surface Die surface 0. 22990. 100 www.austriamicrosystems.com/AS5163 0. 23 410. 10 0 0. 77 010. 1 50 Te ch ni ca Figure 27. Vertical Placement of the Magnet Revision 2.7 31 - 36 AS5163 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 9 Package Drawings and Markings The device is available in a 14-Lead Thin Shrink Small Outline Package. lv al id Figure 28. Package Drawings and Dimensions AS5163 Nom 1.00 5.00 6.40 BSC 4.40 0.65 BSC 0.60 1.00 REF ni Min 0.05 0.80 0.19 0.09 4.90 4.30 0.45 - Te ch Symbol A A1 A2 b c D E E1 e L L1 ca am lc s on A te G nt st il YYWWMZZ Max 1.20 0.15 1.05 0.30 0.20 5.10 4.50 0.75 - Symbol R R1 S 1 2 3 aaa bbb ccc ddd N Min 0.09 0.09 0.20 0 - Typ 12 REF 12 REF 0.10 0.10 0.05 0.20 14 Max 8 - Notes: 1. Dimensions and tolerancing confirm to ASME Y14.5M-1994. 2. All dimensions are in miilimeters. Angles are in degrees. www.austriamicrosystems.com/AS5163 Revision 2.7 32 - 36 AS5163 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s Marking: YYWWMZZ. YY WW M ZZ Year (i.e. 04 for 2004) Week Assembly plant identifier Assembly traceability code JEDEC Package Outline Standard: MO - 153 Te ch ni ca am lc s on A te G nt st il lv al id Thermal Resistance Rth(j-a): 89 K/W in still air, soldered on PCB www.austriamicrosystems.com/AS5163 Revision 2.7 33 - 36 AS5163 Datasheet - R e v i s i o n H i s t o r y Revision History Revision Date 0.1 Oct 06, 2008 1.1 Nov 04, 2008 May 31, 2010 2.4 Owner Description Initial version Added package drawings and dimensions apg Updated according to 2.4 specification document Changed DITH_DISABLE to DAC_MODE, updated Ordering Information. 2.5 Sep 21, 2010 Updated Absolute Maximum Ratings, Operating Conditions, Magnetic Input Specification, Electrical System Specifications, Figure 4, Table 9, Table 10, Table 14, Figure 11, Programming Procedure, Figure 28, Ordering Information. Deleted chapter on "Choosing the Proper Magnet". 2.6 Oct 14, 2010 2.7 Oct 28, 2010 Updated Section 6.3 Updated Table 5, Table 6, Table 10, Table 14, Table 15, page 29, Figure 28. am lc s on A te G nt st il mub lv rfu al id Jun 18, 2010 Te ch ni ca Note: Typos may not be explicitly mentioned under revision history. www.austriamicrosystems.com/AS5163 Revision 2.7 34 - 36 AS5163 Datasheet - O r d e r i n g I n f o r m a t i o n 10 Ordering Information The devices are available as the standard products shown in Table 18. Table 18. Ordering Information AS5163-HTSM Delivery Form 12-Bit High Voltage Rotary Magnetic Encoder Tape & Reel (4500 pcs/reel) Tape & Reel (500 pcs/reel) Note: All products are RoHS compliant and austriamicrosystems green. Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect Technical Support is found at http://www.austriamicrosystems.com/Technical-Support 14-pin TSSOP Te ch ni ca a l c ms on A te G nt st ill For further information and requests, please contact us mailto: sales@austriamicrosystems.com or find your local distributor at http://www.austriamicrosystems.com/distributor Package lid AS5163-HTSP Description va Ordering Code www.austriamicrosystems.com/AS5163 Revision 2.7 35 - 36 AS5163 Datasheet - C o p y r i g h t s Copyrights Copyright (c) 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered (R). All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. al id Disclaimer lv Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. Contact Information ca Headquarters am lc s on A te G nt st il The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. ni austriamicrosystems AG Tobelbaderstrasse 30 A-8141 Unterpremstaetten, Austria ch Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: Te http://www.austriamicrosystems.com/contact www.austriamicrosystems.com/AS5163 Revision 2.7 36 - 36 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: ams: AS5163-HTSM